I need to be able to count to 4,000,000 (24 bits) and when complete I wish
to address serially for the result. The counter is clocked at about 0.5MHz
which is a little fast for the PIC to keep up with. Can anyone suggest a
chip that would do this for me. I do not want a parallel output as it uses
too many pins. If this is not possible then perhaps a counter and shift
register??
At 20:28 02/15/99 +1100, Peter Grey wrote:
>I need to be able to count to 4,000,000 (24 bits) and when complete I wish
>to address serially for the result. The counter is clocked at about 0.5MHz
>which is a little fast for the PIC to keep up with.
> I need to be able to count to 4,000,000 (24 bits) and when complete I
> wish to address serially for the result. The counter is clocked at
> about 0.5MHz which is a little fast for the PIC to keep up with. Can
> anyone suggest a chip that would do this for me.
Sounds like a job for either a Scenix or an AVR.
--
Cheers,
Paul B.
>
> I need to be able to count to 4,000,000 (24 bits) and when complete I wish
> to address serially for the result. The counter is clocked at about 0.5MHz
> which is a little fast for the PIC to keep up with. Can anyone suggest a
> chip that would do this for me. I do not want a parallel output as it uses
> too many pins. If this is not possible then perhaps a counter and shift
> register??
I'm a bit confused. While this may be a bit much for a PIC to count solely
in software, using its hardware counter is an ideal application. The keep
the software interaction down you can simply interrupt on rollover and have
a short interrupt routine that bumps up the top two bytes.
In short you're going to create a whole lot of extra hardware doing this
with discretes.
If you really feel you must have an extra piece of hardware, then I suggest
using a second PIC whose sole purpose is to count and report the count
serially to the master PIC. A 12C508 could give you the requested functionality
in an 8 pin package. a three line serial interface should be sufficient for
both interrupting the master PIC, and commanding and reading the counter PIC.
This is the type of application where microcontrollers excell.
On Mon, 15 Feb 1999 20:28:23 +1100 Peter Grey <spam_OUTmartechTakeThisOuTOZEMAIL.COM.AU>
writes:
>I need to be able to count to 4,000,000 (24 bits) and when complete I
>wish
>to address serially for the result. The counter is clocked at about
>0.5MHz
>which is a little fast for the PIC to keep up with.
Timer 0 will count this fast, but it's only 8 bits. It's no problem to
expand the count in software though. On a 14-bit PIC, you can have teh
timer cause an interrupt that increments a 16-bit high count in RAM. Or
just poll the T0IF flag in software and advance the high count whenever
you find it set. The polling has to be done fast enough that the timer
doesn't overflow twice before it is polled again.
Another method I've used is to periodically read TMR0 and add any change
it has made to a large variable holding the final count:
read timer (call that value N)
I = N - L (L is the last timer value read)
L = N
C = C + I (C is the 24 bit count)
Do this process as often as you want but at least fast enough that the
counter won't count more than 256 counts inbetween. This process, though
more complicated than using T0IF, works on 12-bit PICs as well. You
could dedicate a 12C508 to the counter function and have it feed the
results serially to another PIC.
>a
>chip that would do this for me. I do not want a parallel output as it
>uses
>too many pins. If this is not possible then perhaps a counter and
>shift
>register??
>
>TIA,
>
>
>Peter Grey
>
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> I need to be able to count to 4,000,000 (24 bits) and when complete I wish
> to address serially for the result. The counter is clocked at about 0.5MHz
> which is a little fast for the PIC to keep up with. Can anyone suggest a
> chip that would do this for me. I do not want a parallel output as it uses
> too many pins. If this is not possible then perhaps a counter and shift
> register??
>
> TIA,
>
> Peter Grey
At 08:28 PM 2/15/99 +1100, Peter Grey wrote:
>I need to be able to count to 4,000,000 (24 bits) and when complete I wish
>to address serially for the result. The counter is clocked at about 0.5MHz
>which is a little fast for the PIC to keep up with. Can anyone suggest a
>chip that would do this for me. I do not want a parallel output as it uses
>too many pins. If this is not possible then perhaps a counter and shift
>register??
There's a counter chip, 74HC4020 I think, that can be cascaded to do the
job, there are three in that seires, 4020, 4040, 4060, one of them has all
stages with outputs, that's the one you want..
Otherwise, an AVR8515 or 1200 running at 4 MHz or less will do it, and give
you a uart or SPI port as well. One of my apps uses a 300kHz interrupt
with some fair work to do, and I've got plenty of time remaining.
Peter Grey wrote:
>
> I need to be able to count to 4,000,000 (24 bits) and when complete I wish
> to address serially for the result. The counter is clocked at about 0.5MHz
> which is a little fast for the PIC to keep up with. Can anyone suggest a
> chip that would do this for me. I do not want a parallel output as it uses
> too many pins. If this is not possible then perhaps a counter and shift
> register??
You will need only a single resistor (abt 1K) in series with TMR0 and an
extra pin shorted to it. Set the prescaler to /256. This will give you
16 bit resolution and up to 50 MHz count (limit of the prescaler). The
extra 8 bits overflow can be counted via software which is only abt
800Hz. TMR0 register can be read directly but the prescaler is nearly
impossible. But there is a nice technique to get the value by self
clocking.
1. set to TMR0 to external count, prescaler /256, advance on low to high
2. tristate pin (RA3 for example)
3. wait for a certain time while counting TMR0 overflow
4. pull pin low and remove tristate
5. save overflow value to cnt1 (cnt1 msb, cnt2, cnt3 lsb)
6. save TMR0 value to cnt2
7. pulse pin (low to high) until value of TMR0 changes and count the
pulses
6. compute cnt3, cnt3 = 256 - pulses
7. goto 2
At 02:15 AM 15/02/99 -0800, you wrote:
Sorry for short explanation. I have an external clock signal which is gated
with data. I need to count the number of times that data is high when a
clock pulse arrives. To use a PIC would involve an external clock. I cannot
use the internal timers. Also as each instructiona cyclye is 0.4microsecs, I
do not have the time to store this.
>At 20:28 02/15/99 +1100, Peter Grey wrote:
>>I need to be able to count to 4,000,000 (24 bits) and when complete I wish
>>to address serially for the result. The counter is clocked at about 0.5MHz
>>which is a little fast for the PIC to keep up with.
>
>how that? can't you use eg. timer 1 as a counter?
>
>ge
>
>
To translate, 0.5MHz means 0.5 microseconds. If I clocked a PIC at 10MHz
then I would have time to do about 1.25 instructions during this time. I do
not want to go above 10 MHz for my crystal. I am also doing a lot of other
things inthe micro and wish to be informed when the counts have finished
(another signal)
>>
>> I need to be able to count to 4,000,000 (24 bits) and when complete I wish
>> to address serially for the result. The counter is clocked at about 0.5MHz
>> which is a little fast for the PIC to keep up with. Can anyone suggest a
>> chip that would do this for me. I do not want a parallel output as it uses
>> too many pins. If this is not possible then perhaps a counter and shift
>> register??
>
>I'm a bit confused. While this may be a bit much for a PIC to count solely
>in software, using its hardware counter is an ideal application. The keep
>the software interaction down you can simply interrupt on rollover and have
>a short interrupt routine that bumps up the top two bytes.
>
>In short you're going to create a whole lot of extra hardware doing this
>with discretes.
>
>If you really feel you must have an extra piece of hardware, then I suggest
>using a second PIC whose sole purpose is to count and report the count
>serially to the master PIC. A 12C508 could give you the requested functionality
>in an 8 pin package. a three line serial interface should be sufficient for
>both interrupting the master PIC, and commanding and reading the counter PIC.
>
>This is the type of application where microcontrollers excell.
>
>BAJ
>>
>> TIA,
>>
>>
>> Peter Grey
>>
>
>
At 11:31 AM 15/02/99 -0500, you wrote:
This is about where I have headed. I was going to use 2 of the 74HC4040
cascaded to give me 24 bits and then attached a 74HC166 (3 off) to the
outputs and read the counts out serially when finished.
>At 08:28 PM 2/15/99 +1100, Peter Grey wrote:
>>I need to be able to count to 4,000,000 (24 bits) and when complete I wish
>>to address serially for the result. The counter is clocked at about 0.5MHz
>>which is a little fast for the PIC to keep up with. Can anyone suggest a
>>chip that would do this for me. I do not want a parallel output as it uses
>>too many pins. If this is not possible then perhaps a counter and shift
>>register??
>
>There's a counter chip, 74HC4020 I think, that can be cascaded to do the
>job, there are three in that seires, 4020, 4040, 4060, one of them has all
>stages with outputs, that's the one you want..
>
>Otherwise, an AVR8515 or 1200 running at 4 MHz or less will do it, and give
>you a uart or SPI port as well. One of my apps uses a 300kHz interrupt
>with some fair work to do, and I've got plenty of time remaining.
>
>
>
> At 08:05 AM 15/02/99 -0500, you wrote:
>
> To translate, 0.5MHz means 0.5 microseconds. If I clocked a PIC at 10MHz
> then I would have time to do about 1.25 instructions during this time. I do
> not want to go above 10 MHz for my crystal. I am also doing a lot of other
> things inthe micro and wish to be informed when the counts have finished
> (another signal)
Peter,
By setting the counter to overflow, you'll only see an interrupt every 128 uS
by using the TMR0 counter. As I said below it's a bit much to do in software
but by using the timer hardware, it because doable if not easy.
If the timer isn't available, you definitely need another external part.
>
> Thanks,
>
> Peter
>
> >>
> >> I need to be able to count to 4,000,000 (24 bits) and when complete I wish
> >> to address serially for the result. The counter is clocked at about 0.5MHz
> >> which is a little fast for the PIC to keep up with. Can anyone suggest a
> >> chip that would do this for me. I do not want a parallel output as it uses
> >> too many pins. If this is not possible then perhaps a counter and shift
> >> register??
> >
> >I'm a bit confused. While this may be a bit much for a PIC to count solely
> >in software, using its hardware counter is an ideal application. The keep
> >the software interaction down you can simply interrupt on rollover and have
> >a short interrupt routine that bumps up the top two bytes.
> >
> >In short you're going to create a whole lot of extra hardware doing this
> >with discretes.
> >
> >If you really feel you must have an extra piece of hardware, then I suggest
> >using a second PIC whose sole purpose is to count and report the count
> >serially to the master PIC. A 12C508 could give you the requested functionali
> >in an 8 pin package. a three line serial interface should be sufficient for
> >both interrupting the master PIC, and commanding and reading the counter PIC.
> >
> >This is the type of application where microcontrollers excell.
> >
> >BAJ
> >>
> >> TIA,
> >>
> >>
> >> Peter Grey
> >>
> >
> >
>
>
> At 02:15 AM 15/02/99 -0800, you wrote:
> Sorry for short explanation. I have an external clock signal which is gated
> with data. I need to count the number of times that data is high when a
> clock pulse arrives. To use a PIC would involve an external clock. I cannot
> use the internal timers. Also as each instructiona cyclye is 0.4microsecs, I
> do not have the time to store this.
More information which helps. If the internal timers are not available then
you definitely need another part. I'd vote for a second PIC (for its timer
and serial capabilities) with an extern and gate to gate the clock signal. So
the second PIC would count whenever the data signal is high using its internal
counter, and could then transmit the information to the primary PIC when
requested. Would take an 8 pin and a 14 pin part which is a smaller part and
pin count than the 74HC4040 and serial shift register solution I saw in the
other post.
Well worth taking a look at before committing to the multiple counter
solution I think....
>
> TIA
>
> Peter
> >At 20:28 02/15/99 +1100, Peter Grey wrote:
> >>I need to be able to count to 4,000,000 (24 bits) and when complete I wish
> >>to address serially for the result. The counter is clocked at about 0.5MHz
> >>which is a little fast for the PIC to keep up with.
> >
> >how that? can't you use eg. timer 1 as a counter?
> >
> >ge
> >
> >
>
>More information which helps. If the internal timers are not available then
>you definitely need another part. I'd vote for a second PIC (for its timer
>and serial capabilities) with an extern and gate to gate the clock signal. So
>the second PIC would count whenever the data signal is high using its internal
>counter, and could then transmit the information to the primary PIC when
>requested. Would take an 8 pin and a 14 pin part which is a smaller part and
>pin count than the 74HC4040 and serial shift register solution I saw in the
>other post.
An interesting approach might be to use a single 4040, and a pic, instead
of multiple 4040s and multiple buffers.
> At 02:15 AM 15/02/99 -0800, you wrote:
> Sorry for short explanation. I have an external clock signal which is gated
> with data. I need to count the number of times that data is high when a
> clock pulse arrives. To use a PIC would involve an external clock. I cannot
> use the internal timers. Also as each instructiona cyclye is 0.4microsecs, I
> do not have the time to store this.
24bits, .5us resolution? What's producing the pulse? Why does it have to
be measured so accurately?
It's possible to sample a signal with a resolution of 3 instruction cycles
AND do other things at the same time. Dwayne and I solved this problem a
while back when he had the task to accurately measure the pulse width
produced by a temperature sensor. At 10Mhz, 3 instruction cycles will give
you a sample resolution of 1.2uS. (If I had the code handy, I'd post
it...).
-----
Also, for the external counters, you're implying that there's an
external clock too. Why can't you use this clock to gate TMR0? An AND gate
who's inputs are the clock and data signal could control when the TMR is
being clocked.
>>
>> At 08:05 AM 15/02/99 -0500, you wrote:
>>
>> To translate, 0.5MHz means 0.5 microseconds. If I clocked a PIC at 10MHz
>> then I would have time to do about 1.25 instructions during this time. I do
>> not want to go above 10 MHz for my crystal. I am also doing a lot of other
>> things inthe micro and wish to be informed when the counts have finished
>> (another signal)
>
>Peter,
>
>By setting the counter to overflow, you'll only see an interrupt every 128 uS
>by using the TMR0 counter. As I said below it's a bit much to do in software
>but by using the timer hardware, it because doable if not easy.
>
>If the timer isn't available, you definitely need another external part.
>
>BAJ
>>
>> Thanks,
>>
>> Peter
>>
>> >>
>> >> I need to be able to count to 4,000,000 (24 bits) and when complete I wish
>> >> to address serially for the result. The counter is clocked at about 0.5MHz
>> >> which is a little fast for the PIC to keep up with. Can anyone suggest a
>> >> chip that would do this for me. I do not want a parallel output as it uses
>> >> too many pins. If this is not possible then perhaps a counter and shift
>> >> register??
>> >
>> >I'm a bit confused. While this may be a bit much for a PIC to count solely
>> >in software, using its hardware counter is an ideal application. The keep
>> >the software interaction down you can simply interrupt on rollover and have
>> >a short interrupt routine that bumps up the top two bytes.
>> >
>> >In short you're going to create a whole lot of extra hardware doing this
>> >with discretes.
>> >
>> >If you really feel you must have an extra piece of hardware, then I suggest
>> >using a second PIC whose sole purpose is to count and report the count
>> >serially to the master PIC. A 12C508 could give you the requested
functionality
>> >in an 8 pin package. a three line serial interface should be sufficient for
>> >both interrupting the master PIC, and commanding and reading the counter
PIC. {Quote hidden}
>> >
>> >This is the type of application where microcontrollers excell.
>> >
>> >BAJ
>> >>
>> >> TIA,
>> >>
>> >>
>> >> Peter Grey
>> >>
>> >
>> >
>>
>
>
Thanks for the suggestion. I was overlooking the fact that the timer0
overflows only every 128 clocks so I have plenty of time to store this data.
I am using a CCD device to scan some paper for marks. The resolution is 2048
bits wide by 2048 bits long. The 500KHz clock is necessary to drive the CCD
device. This is made by Sony.
>On Tue, 16 Feb 1999, Peter Grey wrote:
>
>> At 02:15 AM 15/02/99 -0800, you wrote:
>> Sorry for short explanation. I have an external clock signal which is gated
>> with data. I need to count the number of times that data is high when a
>> clock pulse arrives. To use a PIC would involve an external clock. I cannot
>> use the internal timers. Also as each instructiona cyclye is 0.4microsecs, I
>> do not have the time to store this.
>
>24bits, .5us resolution? What's producing the pulse? Why does it have to
>be measured so accurately?
>
>It's possible to sample a signal with a resolution of 3 instruction cycles
>AND do other things at the same time. Dwayne and I solved this problem a
>while back when he had the task to accurately measure the pulse width
>produced by a temperature sensor. At 10Mhz, 3 instruction cycles will give
>you a sample resolution of 1.2uS. (If I had the code handy, I'd post
>it...).
>
>-----
>
>Also, for the external counters, you're implying that there's an
>external clock too. Why can't you use this clock to gate TMR0? An AND gate
>who's inputs are the clock and data signal could control when the TMR is
>being clocked.
>
>Scott
>
>
On Tue, 16 Feb 1999 10:54:59 +1100 Peter Grey <martechKILLspamOZEMAIL.COM.AU>
writes:
>At 02:15 AM 15/02/99 -0800, you wrote:
>Sorry for short explanation. I have an external clock signal which is
>gated
>with data. I need to count the number of times that data is high when
>a
>clock pulse arrives.
Use an external AND gate to combine the clock and the data. The output
of the AND gate will go high only if the data is high while the clock is
also high. That signal is suitable to apply to the counter input of a
PIC.
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>then I would have time to do about 1.25 instructions during this time. I do
>not want to go above 10 MHz for my crystal. I am also doing a lot of other
>things inthe micro and wish to be informed when the counts have finished
>(another signal)
>
>Thanks,
>
>Peter
>
>>>
>>> I need to be able to count to 4,000,000 (24 bits) and when complete I
wish
>>> to address serially for the result. The counter is clocked at about
0.5MHz
>>> which is a little fast for the PIC to keep up with. Can anyone suggest a
>>> chip that would do this for me. I do not want a parallel output as it
uses
>>> too many pins. If this is not possible then perhaps a counter and shift
>>> register??
>>
>>I'm a bit confused. While this may be a bit much for a PIC to count solely
>>in software, using its hardware counter is an ideal application. The keep
>>the software interaction down you can simply interrupt on rollover and
have
>>a short interrupt routine that bumps up the top two bytes.
>>
>>In short you're going to create a whole lot of extra hardware doing this
>>with discretes.
>>
>>If you really feel you must have an extra piece of hardware, then I
suggest
>>using a second PIC whose sole purpose is to count and report the count
>>serially to the master PIC. A 12C508 could give you the requested
functionality
>>in an 8 pin package. a three line serial interface should be sufficient
for
>>both interrupting the master PIC, and commanding and reading the counter
PIC. {Quote hidden}
>>
>>This is the type of application where microcontrollers excell.
>>
>>BAJ
>>>
>>> TIA,
>>>
>>>
>>> Peter Grey
>>>
>>
>>
>Add the contents of the RTCC to the 24 bit counter in a contineous
>loop.
>
>The RTCC accumulates the count upto 255 which can be added to the 24
>bit
>counter. After adding, clear the RTCC.
Don't write to RTCC while it is counting. Hardware prevents it from
counting for 2 instruction cycles after a write. If a pulse comes in
during that time, it may not be counted.
You can read the counter at any time without disturbing the counting
process. Use the method I presented involving storing the last reading
and subtracting the new reading from it. It can be optimized to this:
movfw oldrtcc ;Get old count
subwf RTCC,w ;(TMR0 on newer PICs) W = new - old
addwf oldrtcc,f ;old = old + (new - old) = new
;Now add the value in W to the 24 bit count.
addwf count,f ;Add low bytes.
skpnc ;Skip if no carry to high bytes
incfsz count+1,f ; Carry - advance middle byte
goto done ;No need to advance MSB
incf count+2,f ; Advance high byte
done
The whole process takes exactly 8 PIC cycles. It only has to be done
every 255 cycles or less (assuming the counter is counting as fast as it
can, at abput 1 per instruction). So 97% of the PIC's processing time is
available for something else.
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This looks very interesting. However, I only need to know the final count
not any intermediate counts. Thus I should be able to count the number of
times timer 0 overflows and store in a couter (3 off) and then when I get
the command to stop, just read timer 0 and add this to the counts.
>On Mon, 15 Feb 1999 20:58:29 +0530 Ravi Pailoor <chiptechspam_OUTVSNL.COM>
>writes:
>
>>Add the contents of the RTCC to the 24 bit counter in a contineous
>>loop.
>>
>>The RTCC accumulates the count upto 255 which can be added to the 24
>>bit
>>counter. After adding, clear the RTCC.
>
>Don't write to RTCC while it is counting. Hardware prevents it from
>counting for 2 instruction cycles after a write. If a pulse comes in
>during that time, it may not be counted.
>
>You can read the counter at any time without disturbing the counting
>process. Use the method I presented involving storing the last reading
>and subtracting the new reading from it. It can be optimized to this:
>
> movfw oldrtcc ;Get old count
> subwf RTCC,w ;(TMR0 on newer PICs) W = new - old
> addwf oldrtcc,f ;old = old + (new - old) = new
>
>;Now add the value in W to the 24 bit count.
> addwf count,f ;Add low bytes.
> skpnc ;Skip if no carry to high bytes
> incfsz count+1,f ; Carry - advance middle byte
> goto done ;No need to advance MSB
> incf count+2,f ; Advance high byte
>done
>
>The whole process takes exactly 8 PIC cycles. It only has to be done
>every 255 cycles or less (assuming the counter is counting as fast as it
>can, at abput 1 per instruction). So 97% of the PIC's processing time is
>available for something else.
>
>___________________________________________________________________
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>Get completely free e-mail from Juno at http://www.juno.com/getjuno.html
>or call Juno at (800) 654-JUNO [654-5866]
>
>
>Peter Grey wrote:
>
>> To translate, 0.5MHz means 0.5 microseconds. If I clocked a PIC at
>
>I think that should be 2uS.
>
>--
>Best regards
>
>Tony
>
>Multimedia 16F84 Beginners PIC Tools.
>** NEW PicNPro Programmer and Port Interface **
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