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'[OT] What is a Sigma-Delta AtoD converter? [EE]'
2000\04\12@115610 by Mark Skeels

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Hi, folks.

TelCom has a new AtoD part, a TC3401. It claims to be a 16 bit AtoD
converter and it's cost at 1000 pcs is $4.63 US.

I never heard of a Sigma-Delta AtoD converter before. Can anyone tell me how
it works, and has anyone had experience with this new part?

Thanks on advance,

Mark

2000\04\12@121456 by Wagner Lipnharski

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All ADCs for high bit counting (bigger than 14 bits) use Sigma-Delta
conversion for a lower cost production. Sigma Delta use a capacitor ramp
measurement based on voltage comparison. They use integration, discharge
and other techniques to get great precision and accuracy. Actually they
are quire precise, and much cheaper than the regular instantaneous
multiple voltage comparison technique used in lower bit count.

Personal experiences about ADC's point the latest Linear Technologies
LT2400 and LT2408 one of the easier to use, with a low cost. They run at
24 bits !!! in just 8 pin DIP package for the 2400.  The 2408 has an
embebed input mux at the chip.

Wagner.

Mark Skeels wrote:
{Quote hidden}

2000\04\12@175622 by Plunkett, Dennis

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I don't agree to this reasoning,
A sigma delta converter is different to how one might expect that they work.
The sigma part is an intergration point of the converter. This is used to
only reduce the delta of the incomming signal so that a simple comparator
can be used in the desission process (Have a look at stuff on one bit DSP).
The great thing about this style of converter is that the noise is high pass
filtered by nature of design. The basic concept of sigma (intregation) delta
(Change in) has been around since the 1950's but only in recent times has it
been of use.


Dennis





> {Original Message removed}

2000\04\12@195548 by Brandon, Tom

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www.dspguide.com/ has the full text to the Scientist's And Engineer's
Guide to DSP. Chapter 4 (ADC And DAC) has a nice low-maths explanation of
how they work.

Wagner's quite right, except I believe that you will still find a few
high(ish) accuracy non sigma delta converters as sigma delta converters
aren't very appropriate for time domain encoded information (e.g. any form
of echo location system (sonar, radar et al)). Sigma delta converters (sigma
= sum, delta = change = sum of changes converter) produce a value that
represents the AVERAGE voltage in the conversion period (or average slope of
voltage (not commercially used I don't think)) rather than the instantaneous
voltage at a known point in the conversion process. i.e. in a 1kHz SD
converter you'd know the average coltage for each 1ms period. This is fine
for frequency encoded signals such as audio but if you need to know the
shape of a wave then they're not especially suitable.

Tom.
{Original Message removed}

2000\04\12@205218 by Plunkett, Dennis

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> Wagner's quite right, except I believe that you will still find a few
> high(ish) accuracy non sigma delta converters as sigma delta converters
> aren't very appropriate for time domain encoded information (e.g. any form
> of echo location system (sonar, radar et al)). Sigma delta converters
> (sigma
> = sum, delta = change = sum of changes converter) produce a value that
> represents the AVERAGE voltage in the conversion period (or average slope
> of
> voltage (not commercially used I don't think))
>
       I think that this is a dual slope style converter that your are
thinking of
       Sigma is to integrate. This is done in the front end
       of the converter so that the rate of change in the incomming signal
is reduced, so then the delta area can run
       at a lower speed so as to produce a small rate of change in period,
it is then the period of the rate of change of the output multiplied by the
sigma value that then represents the actual input value.

       A simple signal delta converter of this type can be represented as
the following:-

       input-------> sigma--------------Comparator----------->output

       (forgive the ASCII art)


> rather than the instantaneous
> voltage at a known point in the conversion process. i.e. in a 1kHz SD
> converter you'd know the average coltage for each 1ms period.
>
       OK you are talking about averaging here so I do think that the
converter you are looking at is a dual slope type, and is good for removing
CMR.

>  This is fine for frequency encoded signals such as audio but if you need
> to know the
> shape of a wave then they're not especially suitable
       Only for slope converters, else my current DSP project would not be
working :), else we  would also have to come up with a valid explanation as
to why Sigma Delata converters are used in the French radar system and in
the Australian Jindalee over  the horizon radar


       Dennis





> Tom.
> {Original Message removed}

2000\04\13@045257 by Alan B Pearce

face picon face
>The basic concept of sigma (intregation) delta
>(Change in) has been around since the 1950's but only in recent times has it
>been of use.

I believe the early digital telephone a/d converters were sigma delta types as
it was possible to do the u-law or A-law encoding directly in the a/d converter
by changing the delta size as the digital value changed. This saved doing a high
precision a/d conversion and then doing a conversion to the A-law or u-law
value. I think you will find these converters have actually been in commercial
use longer than you think.

2000\04\14@203454 by Russell McMahon

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>I never heard of a Sigma-Delta AtoD converter before. Can anyone tell me
how
>it works, and has anyone had experience with this new part?

I am using a software implemented Sigma Delta converter in a current project
(using a Z8 :-))


The SD converter is essentially a tracking integrator.

A comparator is used to compare the input voltage with the voltage on a
capacitor.
Once per clock cycle, if the capacitor voltage is lower than the input then
a positive drive signal is applied via a resistor to the capacitor. If the
capacitor voltage is too high a negative drive signal is applied. The drive
signal continues for the rest of the clock cycle EVEN IF THE COMPARATOR
CHANGES STATE BEFORE THE END OF THE CYCLE. The relative number of highs and
lows of the driving signal allow one to calculate the value of the input
relative to the reference.

Using a Z8 with an internal comparator this essentially allows a converter
to be made with a reference, one capacitor and 2 resistors. In practice I
add 2 opamp sections before this to provide voltage gain and buffering.
Still a cheap and accurate converter. I get about 10 bits of accuracy but
more can be had with longer conversion times.



     Russell McMahon
_____________________________

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{Original Message removed}

2000\04\15@165321 by Scott Dattalo

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On Sat, 15 Apr 2000, Russell McMahon wrote:

{Quote hidden}

I was wondering when you were going to chime in Russel.

A pic version of what Russel describes can be found here:

http://www.dattalo.com/technical/software/software.html

I know one person that's trying to use this. I won't mention names, but let's
say that she's pulling her hair out to get it to work.

The point being, there are subtleties with this circuit that aren't immediately
obvious. For one, the circuit has a relatively low input impedance compared to
most A/D converters.  In addition, the output impedance of the signal being
measured is assumed to be low.  But a buffer amplifier like Russel mentions can
fix both of these problems. Depending on the source, you could add a 'large'
capacitor - say 10 times the integrating one - instead of a buffer at the input
of this poor person's sigma-delta converter and some what alleviate problems
associated with high impedance signals.

Another caveat is that the R's and the C need to be tightly coupled with the
loop time of the software. If the RC time constant is too large you run the
risk of not being able to have the pic charge or discharge the capacitor during
a pass through the algorithm. If the RC time constant is too small then every
iteration through the algorithm would cause the digital input to switch
states. The values on my web page for the R and C are 10k and 0.56uF were the
result of convenience - I'm not sure if they're optimum.

Scott

2000\04\15@165731 by David VanHorn

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Hash: SHA1


>> I am using a software implemented Sigma Delta converter in a current
project
>> (using a Z8 :-))

>> Using a Z8 with an internal comparator this essentially allows a converter
>> to be made with a reference, one capacitor and 2 resistors. In practice I
>> add 2 opamp sections before this to provide voltage gain and buffering.
>> Still a cheap and accurate converter. I get about 10 bits of accuracy but
>> more can be had with longer conversion times.


I had a bad experience with one of these.  We were stepping a motor
(microstepping) and sampling, and the best we could get to was 6 bits at
7200s/s.
That /12 on the xtal is a real killer.

- --
Are you an ISP?  Tired of spam?
http://www.spamwhack.com  A pre-emptive strike against spam!

Where's Dave? http://www.findu.com/cgi-bin/find.cgi?kc6ete-9

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2000\04\17@131746 by Alice Campbell

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Guilty Party Replies:

Ha!! It's all true, what Scott says.  Spent about 3 weeks
getting the silly thing to work, it finally worked sunday at
about noon.  And i still have 1 hair left.

Last thursday, Scott told me that i might have an impedance
problem, and suggested a cap beneath the pot to match
impedance.  Didnt work.  But it gave me an idea, so i dropped
the pot like a hot potato and put in a cheesy old lm358 from
the junk pile.  Fearing to fry my new pin photodiode, i put
in a reverse-biased led and 4M of feedback and VOILA! it
works.  AND i used tris on the ports, both on 16F84 and
16F877.

And try as i might, a pot just doesnt seem to work well in
this circuit.  When i get a chance, i will investigate
further, but i have not been successful in getting it to read
a pot.  It really likes to work with an opamp.  I agree that
the r-c constant for the main A2D is important, but it's more
important that any stabilizing cap on the output of the opamp
be a couple of orders of magnitude bigger than the one used
by the ADC.  The software can handle down to .01 uF caps at 4
MHz, but i wouldnt try such a small cap at 32kHz--well, maybe
i might try it later, just to confirm suspicion.  And i used
a mylar film cap for the A2D, no way after all that work will
i use leaky old caps.

Wheeeeeeeeeeeeeeeeeeeeeeee-Haa

alice

{Quote hidden}

2000\04\17@134838 by jamesnewton

face picon face
Can you post a quick schematic and the code? Or is this a commercial thing?

---
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Members can add private/public comments/pages ($0 TANSTAAFL web hosting)


{Original Message removed}

2000\04\17@142644 by Alice Campbell

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OK, since you asked.  BUT this is still interim code, i have
not yet tested the 2-wire routine.  Instead of testing it all
afternoon yesterday i dug up the garden and planted tomatoes.
And took the night off.

schematic & code is waaaaay down at bottom.

{Quote hidden}

;       mostly by Scott, the fiddly stuff by alice 4/00
     list    p=16F84,t=ON,c=132,n=80,st=off
      __CONFIG   _CP_OFF & _WDT_OFF & _PWRTE_ON & _XT_OSC
       include "P16F84.INC"
;;      list    p=16F877
;;      __CONFIG   _CP_OFF & _WDT_OFF & _RC_OSC &_LVP_OFF
;;      include "P16F877.INC"
 cblock   0x0C
   count
   t1,t2,freq
   error_code
   total_lo,total_hi
   count_lo,count_hi
 endc
out_port        =       PORTB;PORTC
A2D_PORT        EQU     PORTA
A2D_IN_BIT      EQU     0
A2D_OUT_BIT     EQU     1
ERROR_STUCK_HI  EQU     .255
ERROR_STUCK_LO  EQU     2
beep_pin        equ     3
;          pot
;+5V __/\/\/\/\__ gnd
;          ^
;          |                 +---------------- pic input
;          |        10K      |       10k
;          +------/\/\/\/\---+----/\/\/\/\---- pic output
;          |                 |
;         === 100u          === .1 to 1u
;          |                 |
;         gnd               gnd
;
;The big 100u (or bigger if you want) cap will provide a low impedance
;voltage source.  This runs at 4 MHz.
;-----------------------------------------------------------
       nop
       ORG     0               ;Reset Vector
       ORG     4               ;Interrupt Vector
restart
;;      bcf     STATUS,RP1
;;      BCF     STATUS,RP0
       CLRF    A2D_PORT
       bsf     STATUS,RP0
       CLRF    out_port
       movlw   b'00000001'
       movwf   A2D_PORT
;;   movlw   b'00000110'
;;   movwf   ADCON1
       bcf     STATUS,RP0
       CLRF    A2D_PORT
       clrf    error_code
start:
loop:
       clrf    count_lo
       clrf    count_hi
       call    a2d_convert2
;       movfw   count_lo        ;varying pitch
;       call    beep            ;using squeeker
      movfw   count_lo         ;in lights
      movwf   out_port         ;on board
       call    big_delay
       call    big_delay
       CLRF    A2D_PORT
       clrf    error_code
       goto    loop
;--------------------------------------------------------
;a2dconvert
;
; 2I/O pins
a2d_convert:
       call    precharge
a2d_loop
       RLF     A2D_PORT,W        ;roll it in
      andlw   b'00000010'       ;isolate it  so it wont screw up the other buttons
      xorwf   A2D_PORT,F        ;flip it
       clrc
       movlw   1
       btfss   A2D_PORT,A2D_OUT_BIT
        addwf  count_lo,f
       skpnc
        addwf  count_hi,f
       addwf   total_lo,f
       skpnc
        addwf  total_hi,f
     clrf    t1        ;SLOW DOWN SPIKES
     decfsz  t1,f
     goto   $-1
       btfss   total_hi,0;4
        goto   a2d_loop
       return
;--------------------------------------------------------
; precharge
precharge:
       movlw   1
       clrf    total_lo
       clrf    total_hi
       bcf     A2D_PORT,A2D_OUT_BIT
   ; Make the capacitor voltage go below the trip threshold
pc_low_loop
       btfss   A2D_PORT,A2D_IN_BIT
        goto   pc_high
       addwf   total_lo,f
       skpnc
        addwf  total_hi,f
;;      btfss   total_hi,0
       skpc
        goto   pc_low_loop
       movlw   ERROR_STUCK_HI
       movwf   error_code
       goto    display_error
   ; Now make the capacitor voltage go above the trip threshold
pc_high:
       BSF     A2D_PORT,A2D_OUT_BIT
       clrf    total_lo
       clrf    total_hi
pc_high_loop:
       btfsc   A2D_PORT,A2D_IN_BIT
        goto   precharged
       addwf   total_lo,f
       skpnc
        addwf  total_hi,f
;;      btfss   total_hi,0
       skpc
        goto   pc_high_loop
       movlw   ERROR_STUCK_LO
       movwf   error_code
       goto    display_error
precharged:
       clrf    total_lo
       clrf    total_hi
       bcf     A2D_PORT,A2D_OUT_BIT
       return
;-----------------------------------------------------------------
; a2d_convert
;
;1 I/O pin
a2d_convert2:
   ;Put the A2D_PORT's tris into the FSR so that we can
   ;access it with out having to do those damn bank selects
       movlw   TRISA
       movwf   FSR
       movlw   1
       clrf    count_lo
       clrf    count_hi
       clrf    total_lo
       clrf    total_hi
       clrf    t1
   ; Step 1 is the pre-charging cycle where the capacitor
   ;is made to pass through the low-to-high threshold and
   ;then again through the high-to-low threshold.
   ; This ensures that the voltage on the capacitor is the
   ;same for each time we pass through the algorithm.
   ;Make the capacitor go through the low to high threshold
       bsf     A2D_PORT,A2D_OUT_BIT
       bcf     INDF,A2D_OUT_BIT
a2d2_l1
       call    delay16
       call    delay16
       call    delay16
       call    delay16
       bsf     INDF,A2D_OUT_BIT
       call    delay16
       btfsc   A2D_PORT,A2D_OUT_BIT
        goto   a2d2_l2
       bsf     A2D_PORT,A2D_OUT_BIT
       bcf     INDF,A2D_OUT_BIT
       decfsz  t1,f
        goto   a2d2_l1
;       movlw   ERROR_STUCK_LO
;       movwf   error_code
;       goto    display_error
  ;now pass through the high to low threshold
a2d2_l2
       clrf    t1
       bcf     A2D_PORT,A2D_OUT_BIT
       bcf     INDF,A2D_OUT_BIT
a2d2_l3
       call    delay16
       call    delay16
       call    delay16
       call    delay16
       bsf     INDF,A2D_OUT_BIT
       call    delay16
       btfss   A2D_PORT,A2D_OUT_BIT
        goto   a2d2_l4
       bcf     A2D_PORT,A2D_OUT_BIT
       bcf     INDF,A2D_OUT_BIT
       decfsz  t1,f
        goto   a2d2_l3
;       movlw   ERROR_STUCK_HI
;       movwf   error_code
;       goto    display_error
a2d2_l4    ;If we get then we've successfully precharged the capacitor
   ;Also, the capacitor voltage is just below the high-to-low
   ;threshold (Vil) so let's begin by ramping it positive
       bsf     A2D_PORT,A2D_OUT_BIT
       bcf     INDF,A2D_OUT_BIT
a2d2_l5
       addwf   total_lo,f
       skpnc
        addwf  total_hi,f
       btfsc   total_hi,0
        return
       call    delay16
       call    delay16
       call    delay16
       call    delay16
       bsf     INDF,A2D_OUT_BIT
       call    delay4
       btfss   A2D_PORT,A2D_OUT_BIT
        goto   a2d2_low
       addwf   count_lo,F
       ;The cap voltage is too high
       bcf     A2D_PORT,A2D_OUT_BIT
       bcf     INDF,A2D_OUT_BIT
       skpnc
        addwf  count_hi,F
       goto    a2d2_l5
a2d2_low
       ;The cap voltage is too high
       bsf     A2D_PORT,A2D_OUT_BIT
       bcf     INDF,A2D_OUT_BIT
       goto    $+1
       goto    a2d2_l5
       return
;--------------------------------------------------------
;; error - write an error code to output device
display_error:
       bsf     STATUS,RP0
       clrf    out_port          ;Make portb i/o pins outputs
       bcf     STATUS,RP0
error_loop:
       movf    error_code,W
;       CALL    beep    ;if device is beeper
       movwf   out_port
;       skpz
;        goto   error_loop
       ;If the error code is zero, then flash the LEDs
      call    big_delay
;       comf    out_port,f      ;flasher
      call    big_delay
       GOTO    restart
       goto    error_loop
;----------------------------------------------------
big_delay:
       clrf    t1
       clrf    t2
       decfsz  t1,f
        goto   $-1
       decfsz  t2,f
        goto   $-3
       return
;------------------------------------------------------
delay16 NOP
delay15 NOP
delay14 NOP
delay13 NOP
delay12 NOP
delay11 NOP
delay10 NOP
delay9  NOP
delay8  NOP
delay7  NOP
delay6  NOP
delay5  NOP
delay4
       RETURN
;------------------------------------------------------
beep                            ;normally assumes freq is in work
;       movfw   count_lo        ;freq proportional to answer
       movwf   freq            ; get frequency
       movlw   .25
       movwf   t1              ;shorten up loop for simulator
;       clrf    t1
       clrwdt
beeploop
       movfw   freq
       movwf   t2
       bsf     A2D_PORT,beep_pin
        clrwdt
        movlw   b'00001000'     ;beeper is on porta,3.
        xorwf   A2D_PORT,f
        decfsz t2,f
        goto   $-4
       decfsz     t1,f
       goto    beeploop
       return
;------------------------------------------------------------------
;-------------------------------------------------------
       END
;==========================================================

2000\04\17@153125 by Dan Michaels

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At 10:47 AM 4/17/00 -0700, you wrote:
>Can you post a quick schematic and the code? Or is this a commercial thing?
>

You might check this out too: "Care and Feeding of the 1-Bit DAC"

http://www.ee.washington.edu/conselec/CE/kuhn/onebit/primer.htm

2000\04\17@171137 by Walter Banks

picon face
----------
> From: Alice Campbell <1502amcspamKILLspamLO.SCSENG.COM>

> And try as i might, a pot just doesnt seem to work well in
> this circuit.  When i get a chance, i will investigate
> further, but i have not been successful in getting it to read
> a pot.  It really likes to work with an opamp.

The opamp isolates the circuit from the pot.
When you are using a pot as a reference then you
need to account for the fact that the output
impedance of the pot varies with voltage.

As Scott said the input impedance is quite low
but we and many of our customers have used this
in commercial products.

Walter Banks

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