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'[OT] Protecting CMOS from ESD'
1999\01\08@134331 by Gabriel Gonzalez

flavicon
face
Sorry about the OT!

Does anyone have any pointers on info regarding protection of CMOS inputs
from ESD, especifically a human touching th terminals.

In my application the I/O pins of the CD4051 mux constantly come in contact
with humans, they are supposed to be ESD protected, but every once in a
while a pin blows, sometimes the whole IC literally blows up. I am 99% sure
it is caused by ESD and am trying to find info on how to prevent this.

TIA

Gabriel

1999\01\08@143252 by dave vanhorn

flavicon
face
>In my application the I/O pins of the CD4051 mux constantly come in contact
>with humans, they are supposed to be ESD protected, but every once in a
>while a pin blows, sometimes the whole IC literally blows up. I am 99% sure
>it is caused by ESD and am trying to find info on how to prevent this.


Take the humans out if the loop.

There isn't any way to do what you're trying to do. I can't figure why
you'd WANT people touching circuitry in the forst place, except as some
sort of touch-switch, and this isn't the way to do that.

The CMOS gates are protected, up to a certain level of discharge. This is
intended to protect them during assembly, NOT to allow them to come into
contact with static on a routine basis.

I'm very much afraid that you are looking at 100% eventual failure of all
your devices. Although a gate may continue to run after being damaged,
you've blown a crater in the insulation, and it will eventually short
across and die.

1999\01\08@150131 by Chip Weller

flavicon
face
Gabriel Gonzalez wrote:
>Does anyone have any pointers on info regarding protection of CMOS inputs
>from ESD, especifically a human touching th terminals.
>
>In my application the I/O pins of the CD4051 mux constantly come in contact
>with humans, they are supposed to be ESD protected, but every once in a
>while a pin blows, sometimes the whole IC literally blows up. I am 99% sure
>it is caused by ESD and am trying to find info on how to prevent this.


First put a series resistance between the external contact and the CD4051.
If you can affort a 10K ohm this will help a lot. Another thing to do is to
place two resisters in series and then between them use a diode to Vdd and
another to Vss to conduct any excessive charge. The second resistor will
then better protect the CMOS part from the diode voltages. Also use a small
(1000pF) cap to take some of the static charge, it can be placed at the
input location, or after a series resistor. Watch out for the low pass
filtering effects, depending on your application.


The typical models for static discharges is a cap of 100 to 150pF charged to
15KV with a series resistance of 330 to 1500 ohms. Using a cap to absorb the
majority of the charge is very helpful. Having more series resistance help
dissipate the energy before it gets to your IC. The internal IC projection
consists of diodes to Vdd and Vss and some series resistance.

Analog input tend to be the hardest to protect, as increasing the series
resistance tends to create errors and increasing the capacitance tends to
decrease the bandwidth.

Chip

1999\01\08@151218 by Gerhard Fiedler

picon face
At 11:39 01/08/99 -0700, Gabriel Gonzalez wrote:
>Does anyone have any pointers on info regarding protection of CMOS inputs
>from ESD, especifically a human touching th terminals.
>
>In my application the I/O pins of the CD4051 mux constantly come in contact
>with humans, they are supposed to be ESD protected, but every once in a
>while a pin blows, sometimes the whole IC literally blows up. I am 99% sure
>it is caused by ESD and am trying to find info on how to prevent this.

i'd start with a series resistor and a TVS. you find info on that subject
with the manufacturers of tvs (like motorola etc.)

ge

1999\01\08@164956 by Gabriel Gonzalez
flavicon
face
Unfortunately taking the humans out is out of the question, the application
requires it. They are not touching the circuits directly, but wires
connected directly to the circuit pins.
I've seen similar (comercial) devices doing exactly the same thing, but
using different methods and circuitry, but the interface is exactly the
same, humans get in contact with the circuits thru wires; and I don't know
their failure rate, but I assume they face a simmilar problem.

Gabriel

{Original Message removed}

1999\01\08@165006 by Gabriel Gonzalez

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face
>Gabriel Gonzalez wrote:
>>Does anyone have any pointers on info regarding protection of CMOS inputs
>>from ESD, especifically a human touching th terminals.
>>
>>In my application the I/O pins of the CD4051 mux constantly come in
contact
>>with humans, they are supposed to be ESD protected, but every once in a
>>while a pin blows, sometimes the whole IC literally blows up. I am 99%
sure
>>it is caused by ESD and am trying to find info on how to prevent this.
>
>
>First put a series resistance between the external contact and the CD4051.
>If you can affort a 10K ohm this will help a lot. Another thing to do is to



Using a series resistor is what I was thinking, but I can only afford 1k
max. Any additional components are not acceptable. Even this extra resistor
will get me in trouble. But I'd like to find out how much of a benefit is it
to add this 1k resistor to make a reasonable decision.



>place two resisters in series and then between them use a diode to Vdd and
>another to Vss to conduct any excessive charge. The second resistor will
>then better protect the CMOS part from the diode voltages. Also use a small
>(1000pF) cap to take some of the static charge, it can be placed at the
>input location, or after a series resistor. Watch out for the low pass
>filtering effects, depending on your application.
>
>
>The typical models for static discharges is a cap of 100 to 150pF charged
to
>15KV with a series resistance of 330 to 1500 ohms. Using a cap to absorb
the
>majority of the charge is very helpful. Having more series resistance help
>dissipate the energy before it gets to your IC. The internal IC projection
>consists of diodes to Vdd and Vss and some series resistance.
>
>Analog input tend to be the hardest to protect, as increasing the series

'''''''''''''''''''''''''''''''''''''''''''''''

No kidding!!!


>resistance tends to create errors and increasing the capacitance tends to
>decrease the bandwidth.
>
>Chip

1999\01\08@170625 by dave vanhorn

flavicon
face
At 02:33 PM 1/8/99 -0700, Gabriel Gonzalez wrote:
>Unfortunately taking the humans out is out of the question, the application
>requires it. They are not touching the circuits directly, but wires
>connected directly to the circuit pins.
>I've seen similar (comercial) devices doing exactly the same thing, but
>using different methods and circuitry, but the interface is exactly the
>same, humans get in contact with the circuits thru wires; and I don't know
>their failure rate, but I assume they face a simmilar problem.


Just because someone else did it, dosen't make it right.
In the systems I've worked on, we used plastic keys, silicon membranes, a
conductive "bleedoff" pad, and ground ring guarding, all to avoid the
static carried by users. We didn't have static related failures.

"They are not touching the circuits directly, but wires connected directly
to the circuit pins"

I assume by "circuit" here you mean the chip.. You should never have any
cmos gate in a circuit where it can be "touched" by the user. There are
ways to add additional protection, but I don't think you can ever add enough.

Is this a product in production, a prototype, or a hobby project?

It's not clear to me yet what you are doing, and why you took this
dangerous approach. What was the problem you were trying to solve by doing
this? Why can't you use a switch, (which will give you a lot of protection
if you use the right one) instead of this approach? I wouldn't put cost as
an issue here, as the approach you're taking is going to result in 100%
failed units.

1999\01\08@171855 by dave vanhorn

flavicon
face
>>First put a series resistance between the external contact and the CD4051.
>>If you can affort a 10K ohm this will help a lot. Another thing to do is to
>
>
>
>Using a series resistor is what I was thinking, but I can only afford 1k
>max. Any additional components are not acceptable. Even this extra resistor
>will get me in trouble. But I'd like to find out how much of a benefit is it
>to add this 1k resistor to make a reasonable decision.


At the risk of helping you improve the screen doors on your spaceship...

With the constraint of 1000 ohms as a maximum series R, and no other data
on this project, here's what I'd advise..

Gate----+---500---+--500--Human

At each "+" point, add a diode to +5V and a diode to ground, such that
voltages above the supply, or below ground are shunted to the power supply.
I do hope you have a nice hard non-inductive supply bus, or this is going
to put a big spike on VCC ot ground. :(  The double layer is to account for
the fact that the diodes can't switch on instantaneously, and the second
stage can absorb a bit more of the spike into the diode capacitances while
the first stage is beginning to conduct.  1N4148s should be ok here, you
need something that can turn on very fast. Of course you also need
something that can handle a large current spike, and these are conflicting
requirements.

You might have better luck with 1000 ohms in front, and a cap to ground at
the gate, instead of the second stage, but without any more information,
it's hard to say.  The gate is a cap, and what we're doing here is
(hopefully) keeping the gate from charging beyond it's voltage limit before
the diodes can turn on and get rid of the voltage.

Short leads on the diodes are essential, and they should ideally connect to
a 10uF cap that's on the rails. This will help supress the voltage
transient on the VCC bus by giving it a nice cap to charge. Again, you're
playing a balancing game, more C absorbs more spike, but it's also more
inductive, and slower, and therefore allows more voltage disturbance before
it begins acting.

So now we have gold-plated the screen doors on your airlock. It's not very
good, but you did insist on screen doors.
:)

1999\01\08@174605 by Mark Willis

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face
Gerhard Fiedler wrote:
>
> At 11:39 01/08/99 -0700, Gabriel Gonzalez wrote:
> >Does anyone have any pointers on info regarding protection of CMOS inputs
> >from ESD, especifically a human touching th terminals.
> >
> >In my application the I/O pins of the CD4051 mux constantly come in contact
> >with humans, they are supposed to be ESD protected, but every once in a
> >while a pin blows, sometimes the whole IC literally blows up. I am 99% sure
> >it is caused by ESD and am trying to find info on how to prevent this.
>
> i'd start with a series resistor and a TVS. you find info on that subject
> with the manufacturers of tvs (like motorola etc.)
>
> ge

 One company I hit this on had a keypad attached directly to 8 CPU pins
(Non-chording keypad that time!) of a shrinkdip CPU (Those're a PAIN to
desolder & replace;  Forget if it was a Fujitsu or a Hitachi, Motorola
clone I think?)

 During assembly on their production line, plugging the keypads in was
blowing these shrinkdip CPU's up at a fearsome rate.  (The chief
engineer had a horrible family disaster 3/4 of the way through the
design, not really anyone's "fault", but the company couldn't leave it
at that end point.  They needed to deliver product!)

 Adding a mix of 5.1V Zener (Esp. if it's outside a resistor) to
ground, or 1N4148's to ground and Vcc, solved this for the purposes of
installation;  (Zeners can be more expensive than 1N4148's, they DO take
less space in a "completed" project when you need to add even more parts
in where no room exists.  TVS's are really nice, as they're basically a
super-high-power, relatively inexpensive, zener, I wish I'd had access
to these since 1980!)  I'd agree that resistors & capacitors, if
possible, are great things to add on in series & parallel respectively.
All good ideas here <G>  The "right" solution depends on what you're
doing - if you're doing slow analog switching, you should be able to add
some capacitance & a TVS and maybe a small resistor & have that work
pretty well.

 The ESD protection diodes in a 4051 are not huge, taking all the load
you can off them is a great idea, if you expect constant ESD "Zaps".
(These shrinkdip parts didn't have ANY protection on those pins, they
were using 4 IRQ lines of the chip and 4 data lines, and the chips were
being fried extra crispy with a side order of carbon;  Smart way to run
a keypad, though, he just didn't get the implementation finished right
due to that family disaster.)

 Any way to better protect the input pins (Ground the humans before
they can touch the wires, through 1 Megohm of course) is really good,
too.

 Mark

1999\01\08@203834 by Harold Hallikainen

picon face
On Fri, 8 Jan 1999 14:44:06 -0800 Mark Willis <spam_OUTmwillisTakeThisOuTspamNWLINK.COM>
writes:

>  One company I hit this on had a keypad attached directly to 8 CPU
>pins (Non-chording keypad that time!) of a shrinkdip CPU (Those're a
PAIN
>to desolder & replace;  Forget if it was a Fujitsu or a Hitachi,
Motorola
>clone I think?)
>

       One of my designs (now maybe 15 years old) has a membrane
keyboard directly driven by a 2681 (dual UART with extra parallel I/O).
Concerned about ESD from users, I put a layer of grounded Bonnie Hubbard
aluminum foil between the keyboard and the graphic overlay.


Harold




Harold Hallikainen
.....haroldKILLspamspam@spam@hallikainen.com
Hallikainen & Friends, Inc.
See the FCC Rules at http://hallikainen.com/FccRules and comments filed
in LPFM proceeding at http://hallikainen.com/lpfm

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1999\01\08@203848 by Harold Hallikainen

picon face
On Fri, 8 Jan 1999 14:22:24 -0500 dave vanhorn <dvanhornspamKILLspamCEDAR.NET>
writes:
>>In my application the I/O pins of the CD4051 mux constantly come in
>contact with humans, they are supposed to be ESD protected, but every
once in
>a while a pin blows, sometimes the whole IC literally blows up. I am
>99% sure it is caused by ESD and am trying to find info on how to
prevent
{Quote hidden}

damaged,
>you've blown a crater in the insulation, and it will eventually short
>across and die.
>


       How about a current limit resistor in series with the input (if
the signal going into the input is not too fast?).  I've brought 74HC
lines out of the box into the real world by having a resistor between the
input and the rear panel connector, a pull-up resistor from the connector
to +5V.  For RF filtering, there was also a 56nF capacitor to ground on
the internal circuitry side of a ferrite block (connector to ribbon cable
thru ferrite block, caps to ground, pullup to +5V, series current
limiting resistor to 74HC input).  This has survived at broadcast
transmitter sites that tend to attract lightning.


Harold





Harold Hallikainen
.....haroldKILLspamspam.....hallikainen.com
Hallikainen & Friends, Inc.
See the FCC Rules at http://hallikainen.com/FccRules and comments filed
in LPFM proceeding at http://hallikainen.com/lpfm

___________________________________________________________________
You don't need to buy Internet access to use free Internet e-mail.
Get completely free e-mail from Juno at http://www.juno.com/getjuno.html
or call Juno at (800) 654-JUNO [654-5866]

1999\01\08@222852 by dave vanhorn

flavicon
face
>        How about a current limit resistor in series with the input (if
>the signal going into the input is not too fast?).  I've brought 74HC
>lines out of the box into the real world by having a resistor between the
>input and the rear panel connector, a pull-up resistor from the connector
>to +5V.  For RF filtering, there was also a 56nF capacitor to ground on
>the internal circuitry side of a ferrite block (connector to ribbon cable
>thru ferrite block, caps to ground, pullup to +5V, series current
>limiting resistor to 74HC input).  This has survived at broadcast
>transmitter sites that tend to attract lightning.

The problem with the resistor approach is that they also have some C, and
you can get a spike past them, as well as just puncturing the resistor's
insulation. There is a max working voltage spec for resistors, it's just
that you don't see it called out very often.

Ferrites should help, slowing the risetime, and allowing protection diodes
to turn on, but again, it's like making a dam, how do you know when it's
high enough?  I've built small systems cheaply, that survive in winter
trade shows at Las Vegas, when the guy across from us with his 2000 lb
stainless steel ATM machine was out spraying the carpet with water to cut
the static. It's just never a good idea to let external things, especially
humans, touch the circuits. Especially CMOS inputs.  Even 1488/89s blow out
in that kind of service, and they've got some pretty massive protection.

I haven't heard yet why this approach is justified in this application, I'm
real interested to hear the special circumstances.

1999\01\09@020209 by Gabriel Gonzalez

flavicon
face
>At 02:33 PM 1/8/99 -0700, Gabriel Gonzalez wrote:
>>Unfortunately taking the humans out is out of the question, the
application
>>requires it. They are not touching the circuits directly, but wires
>>connected directly to the circuit pins.
>>I've seen similar (comercial) devices doing exactly the same thing, but
>>using different methods and circuitry, but the interface is exactly the
>>same, humans get in contact with the circuits thru wires; and I don't know
>>their failure rate, but I assume they face a simmilar problem.
>
>
>Just because someone else did it, dosen't make it right.
>In the systems I've worked on, we used plastic keys, silicon membranes, a
>conductive "bleedoff" pad, and ground ring guarding, all to avoid the
>static carried by users. We didn't have static related failures.
>
>"They are not touching the circuits directly, but wires connected directly
>to the circuit pins"
>
>I assume by "circuit" here you mean the chip.. You should never have any
>cmos gate in a circuit where it can be "touched" by the user. There are
>ways to add additional protection, but I don't think you can ever add
enough.
>
>Is this a product in production, a prototype, or a hobby project?
>
>It's not clear to me yet what you are doing, and why you took this
>dangerous approach. What was the problem you were trying to solve by doing
>this? Why can't you use a switch, (which will give you a lot of protection
>if you use the right one) instead of this approach? I wouldn't put cost as
>an issue here, as the approach you're taking is going to result in 100%
>failed units.

I didn't want to waste too much bandwith on an OT issue, that's why I did
not go into much detail. But I'll try to explain briefly...

My application is a Harness Continuity Tester, and I use the CD4051B
mux/demux for the test points. Most of the harnesses tested have connectors,
but sometimes they have bare terminals, or it is assembled on the test
board, so people are constantly touching the terminals, and these are
directly connected to test pins which are connected to the test points,
which are CD4051s pins. So basically that's what I am doing... Now some
backup to support why I did this...

I worked for harness manufacturing companies for several years, and that's
how I got in touch with commercial test equipment. I worked as a Test
Engineer, so I had a chance to try an test equipment from several
manufacturers. And I decided that I could build a better tester than what
was available, cheaper and with the necessary functions. So I built one
using TTL logic for the test interface. It was not as easy as I thought, but
finally it worked ok. But the TTl interface was flaky. So I redesigned the
interface using the CD4051 IC, and it worked perfectly, or so I thought. We
have built and sold about 800 of these testers. But every once in a while
they are returned to us because of blown ICs.
Then I decided to find out how the comercial equipment worked and got a hold
of several testers from two of the better brands on this type of equipment,
Cablescan and Dynalab. To my BIG SURPRISE! they both use the exact same IC
for the test points. Both used a slightly different approach but basically
they did the same thing as I do, and they both have the test points
connected directly to the CD4051 pins.
Then, more recently I got the chance to check yet another two brands of
testers, and both also used the same CMOS IC in almost the same fashion as
every one else.
So I assume that I was not at all lost with I was doing.
But all this does not solve my problem.
Due to the density of the tester circuit adding a bunch of resistors (even
in DIL packages) is a relatively heavy impact on the size of the board, but
if I can't find any other solutions that's what I'm gonna end up doing...
If using a resistor is the only feasable option I have, what I want to know
is how small a value can I use???


Thanks again,

Gabriel
TGO Electronics

1999\01\09@020219 by Gabriel Gonzalez

flavicon
face
How do you determine the size of the series resistor???

Gabriel

{Quote hidden}

1999\01\09@083022 by wwl

picon face
>I didn't want to waste too much bandwith on an OT issue, that's why I did
>not go into much detail. But I'll try to explain briefly...
>
>My application is a Harness Continuity Tester, and I use the CD4051B
>mux/demux for the test points. Most of the harnesses tested have connectors,
>but sometimes they have bare terminals, or it is assembled on the test
>board, so people are constantly touching the terminals, and these are
>directly connected to test pins which are connected to the test points,
>which are CD4051s pins. So basically that's what I am doing... Now some
>backup to support why I did this...
>We
>have built and sold about 800 of these testers. But every once in a while
>they are returned to us because of blown ICs.
Just a thought - maybe it's not the ESD that's killing them, but ESD
triggered latchup. (you could probably determine this by testing a
blown IC - if only one or two pins are dead it's ESD, if the whole
chip is dead (or draws too much current), it's probably latchup.
If this is the case, a resistor (100R?) in series with the 4051's
power pin should do the job - it may still latch up, but cycling power
will recover it.

1999\01\09@083224 by paulb

flavicon
face
Gabriel Gonzalez wrote:

> How do you determine the size of the series resistor???

 As large as possible, of course!  (In ohms)

 The larger is is, the greater the protection.  I realise that in a
harness checker, you really want a low resistance in order to
distinguish a resistive fault (though less likely in manufacture).

 A PIC seems to be an obvious choice *instead* of a 4051 as they are
generally held to be robust, have at least 8 available wires, are
inherently reversible (can act as source or sink or sensor) and are
intelligent, so can greatly simplify the circuit.
--
 Cheers,
       Paul B.

1999\01\09@094534 by Morgan Olsson

picon face
At 14:39 1999-01-08 -0700, you wrote:
>>Gabriel Gonzalez wrote:

>Using a series resistor is what I was thinking, but I can only afford 1k
>max. Any additional components are not acceptable. Even this extra resistor
>will get me in trouble. But I'd like to find out how much of a benefit is it
>to add this 1k resistor to make a reasonable decision.
>
>>place two resisters in series and then between them use a diode to Vdd and
>>another to Vss to conduct any excessive charge. The second resistor will
>>then better protect the CMOS part from the diode voltages.

That second resistor need only to be much less than 1kohm.

Probably the first resistor can be pretty low-res too.
If connected to human you already have some series resistance?

But beware about the leakage of the diodes!
Choose low-leakage types and keep temperature from being high.

>>Also use a small
>>(1000pF) cap to take some of the static charge, it can be placed at the
>>input location, or after a series resistor. Watch out for the low pass
>>filtering effects, depending on your application.

Possibly compensate for that RC after buffering the signal?



Also check MAXIM for muxes with pretty strong protection and better defined
isolation and coupling characteristics.

/Morgan


       Morgan Olsson                   ph  +46(0)414 70741
       MORGANS REGLERTEKNIK            fax +46(0)414 70331
       H€LLEKS           (in A-Z letters: "HALLEKAS")
       SE-277 35 KIVIK, SWEDEN               mrtspamspam_OUTiname.com
___________________________________________________________

1999\01\09@100233 by Russell McMahon

picon face
Gabriel

What are you trying to achieve with this circuit?
Knowing why people will / might / must touch it would be helpful.
Also, what is the intended result when it is touched?
Knowing all this helps in deciding what impedances can be placed
between the input pins and the user and to ground/supply etc. .


People have suggested:
- Minimise people touching as much as possible
- Introduce series R with catch diodes to supply & ground plus
capacitors.
- TVS (presumably "transient voltage suppressors")

All worth a try.

There are devices called "transorbs" (brand name I think) which are
targetted at fast rise time spikes.
Some manufacturers make devices aimed specifically at this
requirement. RS & farnell; sell these.

*** A REAL WORLD SOLUTION ***
If people MUST touch the inputs, consider the possibility of
discharging the esd on the person prior to their touching the
terminal. This can be done with their cooperation (pad to ground via
a 10 Mohm plus resistor with "Touch me first" label, or without their
knowing (similarly grounded metal or conductive surface arranged so
that they will touch it before your input terminal.

A "hard earthed" surface will not work as well because some people
will get shocks from the esd as they touch it and will avoid it next
time. A resistor slows the discharge enough for them not to notice.
You can buy grounding materials from eg 3M. You can get MUCH cheaper
material by using Butyl rubber sheet (black and may smell rubbery for
some while). It can have quite low resistance per square (too low
really) so may still need a series resistor from there to ground
proper. This is also good for anti-static work bench surfaces (I use
it) but beware placing working pcbs on it directly :-).

regards



       Russell McMahon


From: Gabriel Gonzalez <@spam@tgoKILLspamspamCHIH1.TELMEX.NET.MX>
>Does anyone have any pointers on info regarding protection of CMOS
inputs
>from ESD, especifically a human touching th terminals.
>
>In my application the I/O pins of the CD4051 mux constantly come in
contact
>with humans, they are supposed to be ESD protected, but every once
in a
>while a pin blows, sometimes the whole IC literally blows up. I am
99% sure
>it is caused by ESD and am trying to find info on how to prevent
this.

1999\01\09@102530 by dave vanhorn

flavicon
face
>So I assume that I was not at all lost with I was doing.
>But all this does not solve my problem.
>Due to the density of the tester circuit adding a bunch of resistors (even
>in DIL packages) is a relatively heavy impact on the size of the board, but
>if I can't find any other solutions that's what I'm gonna end up doing...
>If using a resistor is the only feasable option I have, what I want to know
>is how small a value can I use???


OOOkay. now I understand, and for this application, there may be some help.
Depending on the number of conductors, it is possible to use a relay to
ground one input of the tester until the test begins.. If your tester plugs
in to this side first, then they will discharge the cable capacitances to
ground. Then when the test begins, you can release the relay, and it's not
in the way for testing.  Ideally you would use relays on both sides, but
that might be prohibitively expensive.

If you have to stick with resistors, go as large as you can. The thing is,
you can never say how large a whack you're going to have to take.. I made a
home-made ESD tester a while back that might (with the help of a scope) get
you where you need to go.. I used a 12V CRT power supply, 15kV output
(module, surplus) to charge a 200pF cap made out of 0.062" PCB material
through a 60 meg resistor. This whole thing sits on a sheet of PCB material
about 1' x 2'
The thickness of the pcb material is such that it arcs over when you obtain
about 2000V. This provides crude regulation. A 1500 ohm resistor between
that cap and a probe, lets you feed calibrated "zaps" into your gear.
Schaffner makes the "pro" version, but be prepared with your bosss's credit
card!

If you use a fast storage scope on your chip inputs, then you can watch
what happens.  The cap and R were chosen to be real close to the standard
human body discharge model. This isn't any kind of maximum. I've personally
thrown a lot hotter spark than that does, just by wearing the wrong shoes.
Hint: There's a REASON that the vegas slot machine crowd taps the metal
machine case with a quarter before touching it, and it isn't for luck!

Additionally, since this is industrial gear, you can educate your user to
use a ground strap, which will help.

You also have to worry about cables that might be carrying a charge between
the conductors, (they actually make a fair capacitor that way) and longer
cables are obviously worse. Further, some insulation is triboelectric, so
if Mr Tester drops a coil of cable on the floor, he can induce a spike that
could still kill your inputs. This is probably stretching it for
triboeletric insulation, but it's a possibility.

So this is a lot different than if you had some device out in the field
used by Joe public as he shuffles across the casino carpet in his
plastic-soled shoes, causing all the ladies fur coats to look like rabid
raccoons on a bad hair-day..
There is hope.

:)

1999\01\09@102736 by dave vanhorn

flavicon
face
>Also check MAXIM for muxes with pretty strong protection and better defined
>isolation and coupling characteristics.


An excellent suggestion, in tandem with everything else. More is better :)

1999\01\09@130336 by Gabriel Gonzalez

flavicon
face
>If you have to stick with resistors, go as large as you can. The thing is,
>you can never say how large a whack you're going to have to take.. I made a
>home-made ESD tester a while back that might (with the help of a scope) get


How can I get this tester, or info on building one?

{Quote hidden}

Forget it, I know him (it's me ;)

{Quote hidden}

1999\01\09@142947 by dave vanhorn

flavicon
face
At 11:01 AM 1/9/99 -0700, Gabriel Gonzalez wrote:
>>If you have to stick with resistors, go as large as you can. The thing is,
>>you can never say how large a whack you're going to have to take.. I made a
>>home-made ESD tester a while back that might (with the help of a scope) get
>
>
>How can I get this tester, or info on building one?

Well, I can talk you through it. The hardest thing to come by is the high
voltage supply, it's called use what you can get. You want DC, anything
from 6kV or so on up is good. I used 15kV because it's what I had handy.

The baseplate is just a 1 x 2 foot copper clad PCB, both sides tied to
ground.
Add whatever you need to control the output of your high voltage supply.
Mine I control by turning down the input voltage, it's actually very linear
WRT the output.

I'll measure the cap for you, that will need to me made from 0.062
fiberglass G-10 PCB, in order to duplicate my cap here. or if you know your
material, (or have a C meter) you can trim it to 200pF yourself. The
thickness sets the max voltage, since it will arc over.

Find a nice high voltage resistor, 20+ megs, and it should be about 2-6
inches long to survive the high voltage.

We can do more in direct email, but this should be enough of a scavenger
hunt for this weekend anyway :)

1999\01\10@000817 by bill bass

picon face
We once believed that ESD was the main cause for the many warranty
repairs returning from the field.  A 4066 CMOS switch IC failed in all
the cases - the switch pins are exposed to human touching (desired or
not, it is there).

We tried numerous ways such as series resistors, caps, etc.  Finally,
rather than trying to learn all about ESD, we replaced it with MAX323.
From then on, the problem is gone.  Sometimes, it is like in repair
jobs, if it works now, you might never be able to recreate the problem
- just fix it and fix it fast!

Please check the MAX323 out.  For one thing, it is 10 times the cost
of a 4066, ought to be better!!

Good luck and get it solved before Feburary 1999.

Rgds/ Bill

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1999\01\10@010528 by Gaston Gagnon

picon face
Gabriel!

If you have not already looked at it you may find Microchip AN595
informative. It is titled
"Improving the Susceptibility of an Application to ESD" .

Gaston.

Gabriel Gonzalez a Žcrit:
{Quote hidden}

1999\01\10@101623 by Morgan Olsson

picon face
>> ..., sometimes the whole IC literally blows up.

Sounds like the chip got into latch-up mode.

This is caused by too much current on a pin (in this case ESD-spike),
making part of the chip trigger like an SCR.

It is probable that the chip in some cases should have survived the
ESD-spike itself, if we just eliminated the high current.

This might be done by putting a series resistor to the supply (The supply
current is very low) and a zener and a small cap (10nF) on the chip side to
stabilize and limit.

If latchup occours it might reset itself if R is hight enough, else it
resets at power off.

Of course, use all ESD protection discussed here too

/Morgan
       Morgan Olsson                   ph  +46(0)414 70741
       MORGANS REGLERTEKNIK            fax +46(0)414 70331
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___________________________________________________________

1999\01\10@112155 by Peter L. Peres

picon face
On Sat, 9 Jan 1999, dave vanhorn wrote:

{Quote hidden}

Oh, what is wrong with a small air ionizer as HV supply ? I use one built
from a kit, gives 15 kV from 12V @ 120 mA and survives output shorts. One
transistor and a mini tesla coil go pretty far ;)

hope this helps,

       Peter

1999\01\10@112812 by Mike Keitz

picon face
On Sun, 10 Jan 1999 11:02:55 +0100 Morgan Olsson <RemoveMEmrtTakeThisOuTspamINAME.COM> writes:
>>> ..., sometimes the whole IC literally blows up.
>
>Sounds like the chip got into latch-up mode.

Or the users are abusing the tester, e.g. connecting it to live circuits.
A resistor in series with the IC power is a good idea, if it is
ESD-latchup.  You might also consider making the multiplexer IC's
user-replaceable. Since 4051's are cheap and widely available, providing
sockets and writing up a procedure to replace them could save a return to
the factory after a user "oops".


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1999\01\10@135523 by Gerhard Fiedler

picon face
At 11:02 01/10/99 +0100, Morgan Olsson wrote:
>Sounds like the chip got into latch-up mode.
>
>This is caused by too much current on a pin (in this case ESD-spike),
>making part of the chip trigger like an SCR.
>
>It is probable that the chip in some cases should have survived the
>ESD-spike itself, if we just eliminated the high current.
>
>This might be done by putting a series resistor to the supply (The supply
>current is very low) and a zener and a small cap (10nF) on the chip side to
>stabilize and limit.

i don't understand the zener (if the supply itself is good). in a latch-up
situation, the voltage after the current limiting resistor is likely to
drop anyway, isn't it?

ge

1999\01\10@183517 by Mike Keitz

picon face
On Sun, 10 Jan 1999 10:53:59 -0800 Gerhard Fiedler <spamBeGonelistsspamBeGonespamHOME.COM>
writes:

>i don't understand the zener (if the supply itself is good). in a
>latch-up
>situation, the voltage after the current limiting resistor is likely
>to
>drop anyway, isn't it?

The zener is to keep the Vdd voltage from going up because a spike has
passed through a protection diode.  Without the resistor, the low
impedance of the system's power supply would do a fair amount to absorb
such a spike.  When the resistor is added, this inherent protection is
lost.  However, the resistor would help limit damage to the multiplexer
and zener in case of a really big spike.


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1999\01\11@032906 by Morgan Olsson

picon face
At 10:53 1999-01-10 -0800, you wrote:
>At 11:02 01/10/99 +0100, Morgan Olsson wrote:
>>Sounds like the chip got into latch-up mode.
>>
>>This is caused by too much current on a pin (in this case ESD-spike),
>>making part of the chip trigger like an SCR.
>>
>>It is probable that the chip in some cases should have survived the
>>ESD-spike itself, if we just eliminated the high current.
>>
>>This might be done by putting a series resistor to the supply (The supply
>>current is very low) and a zener and a small cap (10nF) on the chip side to
>>stabilize and limit.
>
>i don't understand the zener (if the supply itself is good). in a latch-up
>situation, the voltage after the current limiting resistor is likely to
>drop anyway, isn't it?

When a spike enters on a pin the internal chip«s protection diodes will
deliver current to IC the supply; that might (will probably) cause a
damaging high voltage in the chip.  The zener is there to absorb that.

(The chip will enter latch up first on currents above tens of mA through
the diodes, or mayby at hight overvoltage.)


Oh, I forgot to mention that you need serial resistors on the control
signals, of course, approx 10kohm.

/Morgan


>ge
>
>
       Morgan Olsson                   ph  +46(0)414 70741
       MORGANS REGLERTEKNIK            fax +46(0)414 70331
       H€LLEKS           (in A-Z letters: "HALLEKAS")
       SE-277 35 KIVIK, SWEDEN               TakeThisOuTmrtEraseMEspamspam_OUTiname.com
___________________________________________________________

1999\01\11@120918 by Gabriel Gonzalez

flavicon
face
>On Sun, 10 Jan 1999 11:02:55 +0100 Morgan Olsson <RemoveMEmrtspamTakeThisOuTINAME.COM> writes:
>>>> ..., sometimes the whole IC literally blows up.
>>
>>Sounds like the chip got into latch-up mode.
>
>Or the users are abusing the tester, e.g. connecting it to live circuits.
> A resistor in series with the IC power is a good idea, if it is
>ESD-latchup.  You might also consider making the multiplexer IC's
>user-replaceable. Since 4051's are cheap and widely available, providing
>sockets and writing up a procedure to replace them could save a return to
>the factory after a user "oops".


This and the series resistor with the i/o pins are the two main options I am
considering.

Gabriel


>
>
>___________________________________________________________________
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1999\01\11@130236 by Gabriel Gonzalez

flavicon
face
>When a spike enters on a pin the internal chip«s protection diodes will
>deliver current to IC the supply; that might (will probably) cause a
>damaging high voltage in the chip.  The zener is there to absorb that.
>
>(The chip will enter latch up first on currents above tens of mA through
>the diodes, or mayby at hight overvoltage.)
>
>
>Oh, I forgot to mention that you need serial resistors on the control
>signals, of course, approx 10kohm.


What would these be for?

Gabriel

>
>/Morgan

1999\01\11@143157 by Morgan Olsson

picon face
At 10:41 1999-01-11 -0700, you wrote:
>>When a spike enters on a pin the internal chip«s protection diodes will
>>deliver current to IC the supply; that might (will probably) cause a
>>damaging high voltage in the chip.  The zener is there to absorb that.
>>
>>(The chip will enter latch up first on currents above tens of mA through
>>the diodes, or mayby at hight overvoltage.)
>>
>>
>>Oh, I forgot to mention that you need serial resistors on the control
>>signals, of course, approx 10kohm.
>
>
>What would these be for?

When/if the 4051 go into latch-up, or get destroyed, the 4051 would else
draw much current through the control lines.

Another scenario is that a strong spike goes througt the 4051 into the
controller, maybe not damaging it, but confusing it, or througt the
controllers protection diodes delivering a spike to that one«s Vdd.

/Morgan

>Gabriel
>
>>
>>/Morgan
>
>
       Morgan Olsson                   ph  +46(0)414 70741
       MORGANS REGLERTEKNIK            fax +46(0)414 70331
       H€LLEKS           (in A-Z letters: "HALLEKAS")
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___________________________________________________________

1999\01\11@144027 by John Payson

flavicon
face
|My application is a Harness Continuity Tester, and I use the CD4051B
|mux/demux for the test points. Most of the harnesses tested have connectors,
|but sometimes they have bare terminals, or it is assembled on the test
|board, so people are constantly touching the terminals, and these are
|directly connected to test pins which are connected to the test points,
|which are CD4051s pins. So basically that's what I am doing... Now some
|backup to support why I did this...

Other people have suggested adding resistors and caps, protecting
the power supply, etc.

I'd like to second the idea of protecting the power supply; if you
zap a chip with a spike that's too much for the protection diodes,
you'll destroy that pin's functionality but the rest of the chip
should survive.  Most likely the spike is either causing the chip
to see excessive voltage between VDD-Vss, or else it's causing the
chip to latch up.  The former case should be preventable for the
cost of one zener diode per chip (perhaps mounted on the reverse
side of the board, tied directly to the legs); the latter case may
be rendered non-fatal by current-limitting the supply.

If you use a PIC or PICs as one of the other posters suggested, you
should be pretty safe if you use a VDD clamp.  In addition, you could
provide additional protection to your circuit by configuring all pins
as outputs, grounded, when people are going to be changing cables.
Outputs are generally much less succeptable to ESD spikes than inputs
since there's already a clearly-established path for the current to
flow.

All that having been said, series resistors and parallel capacitors
are probably a good idea if you can afford them.  For a cable tester
the speed penalty shouldn't be a problem, and resistors of 1K or so
will provide some protection against accidental connection to live
circuits (25 volts would pose no immediate problem, though a sustained
25 volt input would cook the resistor).  Even connection to 120VAC
through the resistor may not harm the PIC's input (*).  Of course,
resistors would take up space, but if you use resistor packs that
shouldn't be too much of a problem.

(*) This happened once.  The resistor was instantly toasted, but the
   PIC works fine.

1999\01\11@202341 by Gerhard Fiedler

picon face
At 13:39 01/11/99 -0600, John Payson wrote:
>I'd like to second the idea of protecting the power supply; if you
>zap a chip with a spike that's too much for the protection diodes,
>you'll destroy that pin's functionality but the rest of the chip
>should survive.  Most likely the spike is either causing the chip
>to see excessive voltage between VDD-Vss, or else it's causing the
>chip to latch up.  The former case should be preventable for the
>cost of one zener diode per chip (perhaps mounted on the reverse
>side of the board, tied directly to the legs); the latter case may
>be rendered non-fatal by current-limitting the supply.

wouldn't that be an application to use a TVS instead of a zener? isn't that
the type of app the TVSes are made  for (conducting energy spikes)? (i know
that a TVS is basically a zener, but it is one designed to absorb higher
energy spikes than a common zener.)

ge

1999\01\12@192010 by Mark A Moss

picon face
On Sat, 9 Jan 1999 01:28:20 GMT Mike Harrison <EraseMEwwlspamnetcomuk.co.uk>
writes:

>Just a thought - maybe it's not the ESD that's killing them, but ESD
>triggered latchup. (you could probably determine this by testing a
>blown IC - if only one or two pins are dead it's ESD, if the whole
>chip is dead (or draws too much current), it's probably latchup.
> If this is the case, a resistor (100R?) in series with the 4051's
>power pin should do the job - it may still latch up, but cycling power
>will recover it.
>
We have been having a similar problem with some Cirris Cable Systems
1000H/H+ cable analyzers.  The story is that for years, there were no
problems other than an occasional dirty connecter in need of cleaning.
Then a lightning strike last spring apparently caused partial failure to
the mux/demux (I think they are also 4051's but not sure), and then they
began to fail frequently (1 of the 3 failed every two weeks).  Solution
from Cirris was to increase ESD protection.  Before, the testing station
had a ground mat and non-monitored wrist strap.  We're upgrading the
station to a monitored wrist strap and mat.  Also, the interface fixtures
(convert the connectors on our cables to the 64 pin ribbon cable on the
Cirris unit) which are currently made of plastic are in the process of
being upgraded to metal.  ESD mats do not drain static from
non-conductive material.  Basic ESD protection procedures would be a good
thing to recommend to your customers.

Also, 3M makes an ESD meter.  Not sure of the part number though.

Mark Moss
Amateur Radio Operator, Technician, and General Tinkerer


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1999\01\12@225302 by Gabriel Gonzalez

flavicon
face
>We have been having a similar problem with some Cirris Cable Systems
>1000H/H+ cable analyzers.  The story is that for years, there were no
>problems other than an occasional dirty connecter in need of cleaning.
>Then a lightning strike last spring apparently caused partial failure to
>the mux/demux (I think they are also 4051's but not sure), and then they


I've never had a chance to play with the cirris testers, but just out of
curiosity, can you open a tester and confirm if they use the 4051???

>began to fail frequently (1 of the 3 failed every two weeks).  Solution


This is a terrible failure rate, I would also suggest checking your ground
installation. Ours are failing at a rate of about 1 out of 200 every week or
so, but only on one location (we have them in 4 different locations in three
cities).

>from Cirris was to increase ESD protection.  Before, the testing station
>had a ground mat and non-monitored wrist strap.  We're upgrading the
>station to a monitored wrist strap and mat.  Also, the interface fixtures
>(convert the connectors on our cables to the 64 pin ribbon cable on the
>Cirris unit) which are currently made of plastic are in the process of
>being upgraded to metal.  ESD mats do not drain static from
>non-conductive material.  Basic ESD protection procedures would be a good
>thing to recommend to your customers.


Unfortunately adding adequate ESD protection is not easily accomplished for
our testers as they are used in a moving conveyor, and the operators can't
be strapped with antistatic wrist straps. The only possibility I can see is
using antistatic floor mats and antistatic ankle straps.

Gabriel

{Quote hidden}

1999\01\13@032640 by Mark Willis

flavicon
face
Mike Keitz wrote:
>
> On Sun, 10 Jan 1999 11:02:55 +0100 Morgan Olsson <RemoveMEmrtEraseMEspamEraseMEINAME.COM> writes:
> >>> ..., sometimes the whole IC literally blows up.
> >
> >Sounds like the chip got into latch-up mode.
>
> Or the users are abusing the tester, e.g. connecting it to live circuits.
>  A resistor in series with the IC power is a good idea, if it is
> ESD-latchup.  You might also consider making the multiplexer IC's
> user-replaceable. Since 4051's are cheap and widely available, providing
> sockets and writing up a procedure to replace them could save a return to
> the factory after a user "oops".

 Someone has users they trust to handle CMOS chips?!  <G>  And actually
plug them in paying attention to where pin 1 is as well as straight
pins?  WOW!  I'm in awe!  How can I get to where I make things for folks
like that <G>

 I've done this sort of thing for less technical folks, but with a
little PC Board that uses a D-type connector that has the socketed chip
(and all ESD Protection) inside the connector shell.  A 4051 chip cries
out for a D-15 connector, IF you can tie !Enable to Gnd - or use a DB-25
<G>

 A nice little tough lump that's self-protecting and that almost CANNOT
be plugged in wrong, works really well for in-field replacements when
the people onsite aren't technician but rather  </Facetious On> "People
That Knoze Howta Du Elektronickx, Sorta"  (You know these guys - they
use a 220 Watt soldering iron and acid-core solder to solder a
replacement chip onto your board, upside down & backwards 3 pins bent to
non-contact and one broken off, and manage to burn half the traces off
the PCB, while leaving you with a board with 16 cold solder joints <G>)
</Facetious Off>

 I built something for one guy that was done with connectors this way
(He's not THAT bad, but he is quite electronics illiterate!) and he's
had 1 swap so far, no problems.  (If only one electrician I help would
do as well and stop plugging in his inverter while AC was live <G>)

 With a small lump, it dies, they field-replace the module & then ship
it to you or you fix it when you're next there.  Adds a little to the
price of each unit, reduces service call frequency a lot.

 Mark, RemoveMEmwillisspam_OUTspamKILLspamnwlink.com

1999\01\13@050738 by Stefan Sczekalla-Waldschmidt

flavicon
face
Hi,

another thing, which helps avoiding problems wit ESD is to
make the ambient more "wet". If the humidity is increased -
if affordable - Not so high potentails  will be achived due
to a kind of permanent discarge.

Sometimes a higher humidity is also better for health :-)

How about "specifying" a certain humidity for operating the equipment
;-)

My 0.0001 Euro

       Stefan

1999\01\13@121447 by Peter L. Peres

picon face
On Wed, 13 Jan 1999, Stefan Sczekalla-Waldschmidt wrote:

> Hi,
>
> another thing, which helps avoiding problems wit ESD is to
> make the ambient more "wet". If the humidity is increased -
> if affordable - Not so high potentails  will be achived due
> to a kind of permanent discarge.
>
> Sometimes a higher humidity is also better for health :-)
>
> How about "specifying" a certain humidity for operating the equipment
> ;-)

Actually some electronic fabrication rooms (clean rooms) DO have this
requirement and they also specify ion content in the air. The ions are
provided by air ionizers and help to drain surface charge even from
insulated objects (plastic etc). MOS testing/assembly workplaces can be
specified likewise imho.

Peter

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