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'[OT] Phase delay of square wave'
1999\05\20@072241
by
erik
I'm looking for a means of phase shifting a square wave clock pulse by
90 degrees.
______ ______
   
   
  
______ _____
   
   
  
Thanks,
Erik
1999\05\20@081912
by
Nigel Orr
At 06:22 20/05/99 0500, you wrote:
>I'm looking for a means of phase shifting a square wave clock pulse by
>90 degrees.
If it is a constant frequency, then just add a delay, of t/4, where t is
the period of the pulse.
If it could be some unknown frequency, it's more difficult more details
would be needed.
Nigel
1999\05\20@145029
by
Michael Shiloh
>>I'm looking for a means of phase shifting a square wave clock pulse by
>>90 degrees.
>
>If it is a constant frequency, then just add a delay, of t/4, where t is
>the period of the pulse.
Specifically, delay lines can be purchased with very precise delay times.
1999\05\20@205326
by
erik

I would like to phase shift a square wave pulse train. Retard it by 90
degrees.
I can't seem to think of any way to do this. I had read that an or gate
would retard it some.
I'd need quite a few of them though and the shift would vary for
different frequencies.
Actually, I'm still trying to figure out how to multiply a clock pulse.
If I take my clock pulse, xor it with it's 90 degree retartded friend, I
would double my
original clock.
Just can't seem to figure out how I'm going to get "more" out of
something than what I'm putting in.
(similar project in the works concerning my wallet. that's not going so
well either):)
Erik
Nigel Orr wrote:
{Quote hidden}>
> At 06:22 20/05/99 0500, you wrote:
> >I'm looking for a means of phase shifting a square wave clock pulse by
> >90 degrees.
>
> If it is a constant frequency, then just add a delay, of t/4, where t is
> the period of the pulse.
>
> If it could be some unknown frequency, it's more difficult more details
> would be needed.
>
> Nigel
1999\05\20@212744
by
Michael Shiloh

I assume that the frequency is not fixed, in which case a simple delay
line won't help.
What kind of range of frequencies do you expect?
It is possible to make a clock multiplier using a device at a much higher
clock rate and then a PLL to divide as needed and sync up with the incoming
clock. Your resolution would be the ratio of the incoming clock to the
clock rate of the higher speed device.
>Actually, I'm still trying to figure out how to multiply a clock pulse.
>If I take my clock pulse, xor it with it's 90 degree retartded friend, I
>would double my original clock.
Clock multipliers using PLLs are used in some microprocessors to get
extra edges inside the chip for gating various stages. I don't know if
there are any single chip solutions to implementing a PLL based clock
rate multiplier, but it seems it should be possible to design one out
of available parts.
That is all assuming the incoming clock rate is low enough.
>
>Just can't seem to figure out how I'm going to get "more" out of
>something than what I'm putting in.
1999\05\20@215100
by
Wagner Lipnharski

If the square wave frequency is fixed, a delay chip would do it.
If the frequency is variable then you need to use a tricky thing:
Integrate the square wave in two capacitors, using two resistors, one
for each capacitor in a traditional R+C configuration.
RC #1 would integrate some voltage and RC #2 would do the same but with
a voltage that is exactly hald the voltage from RC #1. This is easy to
do with a double value capacitor or resistor.
RC #2 (half voltage) should load a small capacitor via a diode. This
capacitor voltage would be almost precisely half of the RC#1 integrated
peak voltage. With some exercises you can eliminate RC#2 and use a
voltage divider from RC#1.
Using the comparator function of the operational amplifier or a LM339,
when RC#1 integrated voltage goes higher than the voltage on the small
capacitor loaded by RC#1 and the diode, it means the RC#1 integrating
voltage ramp is (more or less) in the middle time, so aprox at 90¡.
When RC#1 deintegrating voltage ramp goes less than the small capacitor
voltage, it is aprox at 270¡, so the output of the comparator would be
your 90¡ delayed square pulse.
A small trimpot adjustment could be done to locate exactly the 90¡
position, and it should be almost the same for different frequencies.
It should not work pretty well with square waves with dutty cycle
different than 50%.
Frequency changes should not influence the result of this circuit,
except for the RC constant, so the frequency should change inside a
specific range. As more linear the RC#1 ramp, the better the accuracy
of the 90¡.
A microcontroller timming measuring circuit is the best solution for
that, so it can calculate the exact half up or down period of the square
wave. But you have max frequencies based on the microcontroller
capacity of time measurements.

Wagner Lipnharski  UST Research Inc.  Orlando, Florida
Forum and microcontroller web site: http://www.ustr.net
Microcontrollers Survey: http://www.ustr.net/tellme.htm
1999\05\20@220808
by
Richard Prosser
If you generate a squarewave at twice the final frequency, then divide this
by two using flipflops into two channels, the first triggered on the rising
edge and the second on the falling (i.e. use an inverter), then the two
channels will be at the required frequency and separated by 90 degrees.
Accuracy will depend on the original squarewave mark:space and any unequal
propagation delays but should be OK over a wide frequency range. (An equal
mark:space squarewave could be produced by initial generation at 4 x the
required freq.. followed by a divide by 2)
Richard
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Swichtec Power Systems Limited,  Phone: (++64) 3 3433314
39 Princess St, PO Box 11188,  Fax: (++64) 3 3488871
Christchurch, New Zealand.  Email: spam_OUTrprosserTakeThisOuTswichtec.co.nz
Visit us at http://www.swichtec.co.nz
+++++++++++++++++++++++++++++++++++++++++++++++++++++++
{Original Message removed}
1999\05\20@223318
by
erik

I'd be looking at an original clock pulse only as fast as 500Hz and I'd
like to
multiply it by, say, 100.
I've seen clock multipliers, but they state a minimum input frequency of
5MHz. A little too
fast for my application. Maybe there are others but I haven't been able
to find them.
Could you direct me to some references or howtos on building my own
clock multiplier?
Thanks,
Erik
Michael Shiloh wrote:
{Quote hidden}>
> I assume that the frequency is not fixed, in which case a simple delay
> line won't help.
>
> What kind of range of frequencies do you expect?
>
> It is possible to make a clock multiplier using a device at a much higher
> clock rate and then a PLL to divide as needed and sync up with the incoming
> clock. Your resolution would be the ratio of the incoming clock to the
> clock rate of the higher speed device.
>
> >Actually, I'm still trying to figure out how to multiply a clock pulse.
> >If I take my clock pulse, xor it with it's 90 degree retartded friend, I
> >would double my original clock.
>
> Clock multipliers using PLLs are used in some microprocessors to get
> extra edges inside the chip for gating various stages. I don't know if
> there are any single chip solutions to implementing a PLL based clock
> rate multiplier, but it seems it should be possible to design one out
> of available parts.
>
> That is all assuming the incoming clock rate is low enough.
>
> >
> >Just can't seem to figure out how I'm going to get "more" out of
> >something than what I'm putting in.
1999\05\20@223521
by
Sean Breheny
IIRC, if you can come up with quadrature square waves, shouldn't you be
able to feed them to a summing network with variable attenuation on both
inputs and get an arbitrary output phase? Since the waves can be viewed as
sums of sine waves, and the summing network is freq. independent, the phase
of all of the freq. components should change by the same amount and the
output sum should still be a square wave,with the correct phase shift.
Almost like a QAM modulator.
Sean
At 02:04 PM 5/21/99 +1200, you wrote:
{Quote hidden}>If you generate a squarewave at twice the final frequency, then divide this
>by two using flipflops into two channels, the first triggered on the rising
>edge and the second on the falling (i.e. use an inverter), then the two
>channels will be at the required frequency and separated by 90 degrees.
>Accuracy will depend on the original squarewave mark:space and any unequal
>propagation delays but should be OK over a wide frequency range. (An equal
>mark:space squarewave could be produced by initial generation at 4 x the
>required freq.. followed by a divide by 2)
>
>Richard
>
>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>Swichtec Power Systems Limited,  Phone: (++64) 3 3433314
>39 Princess St, PO Box 11188,  Fax: (++64) 3 3488871
>Christchurch, New Zealand.  Email:
.....rprosserKILLspam@spam@swichtec.co.nz
>Visit us at
http://www.swichtec.co.nz
>+++++++++++++++++++++++++++++++++++++++++++++++++++++++
>
>{Original Message removed}
1999\05\20@223733
by
PDRUNEN
I would think that you could use a exclusivetype PLL and VCO like the 4046
to lock to the input frequency. The output frequency would be the same as
the input but phased delayed by 90.
Paul
1999\05\20@225637
by
Richard Prosser

A PLL will do it provided that the frequency isn't going to change too much.
for 500Hz x 100 = 50KHz a CD4046 will be OK. They're pretty easy to use.
Run the VCO at your output frequency (50KHz) and follow it with a divide by
100 (i.e. two decimal counters?) prior to the phase detector. The other
input of the phase detector is the signal you're trying to multiply. If it's
less than railrail use a coupling cap to DC shift  or an amplifier etc.
The output from the phase comparitor is filtered & used to control the VCO.
There are 2 phase comparitors available, I've had more success with the XOR
one but the digital one may be more appropriate in this app.(It doesn't need
a square wave input but it can lock onto harmonics more easily if I remember
correctly).
The filter is the tricky part as it determines the holdin, pullin ranges,
noise performance and phase error etc. Look up the app notes, try a few
values & work from there. As much as you can  keep it simple.
My earlier suggestion re the quadrate generation presupposed that you were
in a position to generate the original signal.
Richard
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Swichtec Power Systems Limited,  Phone: (++64) 3 3433314
39 Princess St, PO Box 11188,  Fax: (++64) 3 3488871
Christchurch, New Zealand.  Email: rprosserKILLspamswichtec.co.nz
Visit us at http://www.swichtec.co.nz
+++++++++++++++++++++++++++++++++++++++++++++++++++++++
> {Original Message removed}
1999\05\21@002059
by
Eric Oliver
> <SNIP>
>
> Almost like a QAM modulator.
>
> <SNIP>
>
Ah, yes. The ol' QAM modulator trick ! Sometimes I feel like I'm in a room
full of people speaking a language I don't understand ;) That's Ok though.
At least I'm pretty sure nobody's talking about me.
Sorry, it's late ..
Good night everyone.
1999\05\21@002111
by
Michael Shiloh
I'll see what I can find. I presume you've tried some web searches? That
will be the first thing I do.
Michael
{Quote hidden}>Could you direct me to some references or howtos on building my own
>clock multiplier?
>
>Thanks,
>Erik
>
>Michael Shiloh wrote:
>>
>> It is possible to make a clock multiplier using a device at a much higher
>> clock rate and then a PLL to divide as needed and sync up with the incoming
>> clock. Your resolution would be the ratio of the incoming clock to the
>> clock rate of the higher speed device.
>>
1999\05\21@003930
by
Sean Breheny
HAHAHAHAHAHA
Eric, I know what you mean. As I write this I am cram...er,studying for an
Intro to Quantum Mechanics final exam. Now there's a subject where I
sometimes feel exactly as you just stated!
Sean
At 10:43 PM 5/20/99 0500, you wrote:
>Ah, yes. The ol' QAM modulator trick ! Sometimes I feel like I'm in a room
>full of people speaking a language I don't understand ;) That's Ok though.
>At least I'm pretty sure nobody's talking about me.
>
>Sorry, it's late ..
>Good night everyone.
>

 Sean Breheny
 Amateur Radio Callsign: KA3YXM
 Electrical Engineering Student
\=
Save lives, please look at http://www.all.org
Personal page: http://www.people.cornell.edu/pages/shb7
.....shb7KILLspam.....cornell.edu ICQ #: 3329174
1999\05\21@024216
by
Jamil J. Weatherbee

I'm not sure "HOW" this would work, but what I think you really want is a
Phase Locked Loop. I believe a very informative discussion can be found
in the Tab Book called "The CMOS Cookbook"
On Thu, 20 May 1999, erik wrote:
{Quote hidden}> I would like to phase shift a square wave pulse train. Retard it by 90
> degrees.
>
> I can't seem to think of any way to do this. I had read that an or gate
> would retard it some.
> I'd need quite a few of them though and the shift would vary for
> different frequencies.
>
> Actually, I'm still trying to figure out how to multiply a clock pulse.
> If I take my clock pulse, xor it with it's 90 degree retartded friend, I
> would double my
> original clock.
>
> Just can't seem to figure out how I'm going to get "more" out of
> something than what I'm putting in.
> (similar project in the works concerning my wallet. that's not going so
> well either):)
>
> Erik
>
>
>
> Nigel Orr wrote:
> >
> > At 06:22 20/05/99 0500, you wrote:
> > >I'm looking for a means of phase shifting a square wave clock pulse by
> > >90 degrees.
> >
> > If it is a constant frequency, then just add a delay, of t/4, where t is
> > the period of the pulse.
> >
> > If it could be some unknown frequency, it's more difficult more details
> > would be needed.
> >
> > Nigel
>
1999\05\21@035143
by
William Chops Westfield
> Actually, I'm still trying to figure out how to multiply a clock pulse.
> If I take my clock pulse, xor it with it's 90 degree retartded friend, I
> would double my original clock.
Usual technique to double frequency of a digital signal is to xor it with
a slightly delayed (delay << signal period) version of itself. This gives
you a short pulse (of width "delay") at each EDGE of the original signal.
If your square wave is of reasonably low frequencies, and is known to change
frequency at a relatively slow rate, I would be tempted to use SOFTWARE in a
PIC or something to delay each edge by half the period of the previous
pulse. This would give you "almost" a 90 degree (does that mean anything
for a digital signal?) phase shift:
_____ _____ _____
___/ \_____/ \_____/ \_____ Input
10 10 9 9 8 8

__________ ______ _____
XX \_____/ \_____/ \_____ Output
 5  5 4.5
BillW
1999\05\21@074039
by
paulb
Wagner Lipnharski wrote:
> Integrate the square wave in two capacitors, using two resistors, one
> for each capacitor in a traditional R+C configuration.
... et al.
In short, use a current driver to convert it to a precision triangle
wave, lowpass filter it (or use a "slicer") to obtain the midpoint and
compare the two to derive your 90¡ shift. Very elegant Wagner!

Cheers,
Paul B.
1999\05\31@150458
by
Marc

> I'm looking for a means of phase shifting a square wave clock pulse by
> 90 degrees.
>
> ______ ______
>    
>    
>   
> ______ _____
>    
>    
>   
One possible way (not necessarily the easiest) is to:
1) differentiate the signal by XORing each port reading with the previous
one:
   
   
    
2) lowpass filter this new signal. If it is of unknown and variable
frequency, the easiest way is to:
a) count the number of samples between two 1s (= period)
b) output 1/2 that many samples of 1, and 1/2 that many as 0.
That effectively does generate a new waveform with the desired property:
___ __ ___ __
       
       
    
Wow, you have doubled the frequency!
3) XOR the output of 2) with the original input:
_____ ______
   
   
  
That's it!! You have shifted phase by 90 degree  on any single frequency
input  no matter which frequency (as long as it is substantially lower
than your sample rate).
Your example waveform is a good example: it is not a pure "square sinus" :)
All frequency deviations were preserved during the processing, and the
output is a 90 degree shift, as good as the ASCII art resolution can
get.
Make sure that you read the port only ONCE per sample, and use the buffered
values for processing. If you read it twice and the calculations base on
two versions of it, the output might become flickery..
1999\05\31@151740
by
David Covick
I agree with Marc.
I'm presently doing this using the delays in the XOR. As a frequency
doubler and 4 XOR's. Also, you can use the Dallas Semiconductor DS1010400
and maybe the DS1012.
Another way that I've done it is by building up a "phase shifer". This is
an analog approach using a center tapped transformer and a RC combination.
By varying R the phase can be adusted to anything one wants.
David
{Original Message removed}
'[OT] Phase delay of square wave'
1999\06\01@012334
by
Ernie Murphy

OK, here is one method, uses a dual op amp and a few discretes.
Amp 1 is a simple buffer. Add some gain if you need it. Run the output to a
simple RC stage, pick R and C so you get a fairly linear charging ramp out.
If this is truly a square wave, you will get a triangle wave centered on
zero out of this. Now use the 2nd op amp as a comparator, compare the
triangle to ground. The output will be a square wave just as you require
(well, may be 270 out, check the polarity)
\
 \ R
 //\/\/\\
/ __  \
C ___ gnd /  90¡ out
 /
gnd
___ ___ ___
IN ___ ___ ___
RC /\ /\
0V/\/\
/ \/ \/
   
COMP ___ ___ ___
OUT __ ___ ___ ___
(I sure hope this ACSII art stuff works. email me at EraseMEerniespam_OUTTakeThisOuTsurfree.com if
you need a better description)
At 08:58 PM 5/31/99 +0000, you wrote:
{Quote hidden}>> I'm looking for a means of phase shifting a square wave clock pulse by
>> 90 degrees.
>>
>> ______ ______
>>    
>>    
>>   
>> ______ _____
>>    
>>    
>>   
>
>One possible way (not necessarily the easiest) is to:
>
>1) differentiate the signal by XORing each port reading with the previous
> one:
>
>
>    
>    
>     
>
>2) lowpass filter this new signal. If it is of unknown and variable
> frequency, the easiest way is to:
>
> a) count the number of samples between two 1s (= period)
>
> b) output 1/2 that many samples of 1, and 1/2 that many as 0.
>
> That effectively does generate a new waveform with the desired property:
>
> ___ __ ___ __
>        
>        
>     
>
> Wow, you have doubled the frequency!
>
>3) XOR the output of 2) with the original input:
> _____ ______
>    
>    
>   
>
>
>That's it!! You have shifted phase by 90 degree  on any single frequency
>input  no matter which frequency (as long as it is substantially lower
>than your sample rate).
>
>Your example waveform is a good example: it is not a pure "square sinus" :)
>All frequency deviations were preserved during the processing, and the
>output is a 90 degree shift, as good as the ASCII art resolution can
>get.
>
>
>Make sure that you read the port only ONCE per sample, and use the buffered
>values for processing. If you read it twice and the calculations base on
>two versions of it, the output might become flickery..
>
>
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