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'[OT] Connecting multiple Vdd or Vss pins on SMT ch'
1999\07\27@122923 by eplus1

I have a (may be dumb) question about power and ground connections on chips
(especially SMT) with more than one Vdd or Vss pin... I realized the other
day that I have never worked with a chip that had more than one connection
for Vdd or Vcc. Is there any reason for this other than:
1. increasing the amount of current available to the chip in compensation
for possible thin traces on the PCB or just the small size of the pins?
2. making routing easier?

Are there any rules that need to be followed in laying out traces to these
pins on the PCB? Is it ok to "loop" the ground connections? (Imagine a trace
on the PCB that looks like "C" clamp contacting Vss pins on the top and
bottom of the chip and increasing in width as it leads to the power supply
on the left side. Will this cause a ground loop problem?)

As I said to Mark Willis, the worst thing about this re-posting of emails
that has been happening of late is that some of the emails involved seem to
be my previous dumb questions about polarity on electrolytic capacitors. I
figure by the time everybody sees that set of posts about a million times
over, it will be totally hammered in that I am a complete nincompoop! <GRIN>
With my luck this question will be caught in a second set of re-postings
(knock on wood) and I will be firmly established as the local moron who asks
all the dumb questions that others are to embarrassed to ask.

As I was commiserating with Alice Campbell the other day, the PICLIST is
invaluable to maintaining my sense of humility. <GRIN>

James Newton, webmaster <>
1-619-652-0593 phone

1999\07\27@132907 by Bob Blick

Hook them all up. Any way you can is better than no way at all. If worst
comes to worst, consult the manufacturers data sheet.

Typically on the PICs with multiple + and - most designs I've seen just
have them connected straight across.


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