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'[OT] 74HC04 Linear Amplifier'
1999\03\13@153055 by Sean Breheny

face picon face
Hi all,

In Horowitz and Hill's "Art or Electronics", I see several illustrations of
very clever little "linear" amplifier configurations using CMOS
inverters,especially the 74HC04. I have an application (which DOES use a
PIC,as a freq. counter) where I need to take in a 100mV or so signal from
about 100Hz or so up to 50MHz and convert it into a 0-5V square wave. There
is a circuit in H&H which is similar to this and I have been using it as a
guide,but I am having problems. The basis of the circuit is simply two
inverters,the output of one connected to the input of the other. The first
inverter also has a 1Meg ohm feedback resistor across it,and the second one
doesn't. All other inverters on the chip have their inputs tied high or low.

The behavior I'm seeing is incessant oscillation. Sometimes, I'm able to
get the input to overpower the oscillation and I get a correct output.
However,more often than not,all I get is a 75MHz or so signal out of the
circuit. Even if I connect the input directly to GND using a 0.1uF cap,I
still get an output signal which is quite strong,but at a lower frequency.

Yes,I am breadboarding this,and that may be part of the problem,but I have
taken special care since this is such a high-bandwidth circuit. I have a
bypass cap (O.1uF) directly from Vss to Vdd,and the actual Vss and Vdd pins
are connected directly to the power supply.

I also tried connecting a potentiometer to the circuit thru a 100k ohm
resistor which would seem,theorically to give an amplifier with a gain of
-10. However,what I'm actually seeing is this: if the pot is adjusted away
from 2.5V, I see the correct behavior (the output is DC near one of the
rails). If I adjust it within a couple of 100mV of 2.5V, I get an
oscillation on the output,centered roughly around the expected DC output
value.

It almost seems to me that the inverter is acting as if it has a small
amount of hysteresis or that I am exceeding its phase margin due to
parasitic (or added in the test case of the 0.1uF cap above) capacitance. I
don't see how this is avoidable.

Can someone please tell me what I am doing wrong and how to get this to work?

Thanks very much,

Sean


|
| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
Save lives, please look at http://www.all.org
Personal page: http://www.people.cornell.edu/pages/shb7
spam_OUTshb7TakeThisOuTspamcornell.edu ICQ #: 3329174

1999\03\13@155214 by Wagner Lipnharski

picon face
Sean Breheny wrote:
{Quote hidden}

Sean, cmos circuits, has the nasty habit to oscilate if
the unused inputs at not referenced to ground or Vcc...

This is a common mistake, from the TTL age, when leaving
an unused input floating it was considered HIGH level.

In the 74HC or HCT or other families it is a disaster.
A small oscilation in the air static caused by a butterfly
flying in China, make that unused output to flip, and it
will feedback to the input by some internal ways, it turns
to be a strong oscillator, also killing your batteries...
be aware.  Just connect unused inputs to Vcc or Ground.
I choose Ground, since the output goes high (in inverters)
consuming less power.

--------------------------------------------------------
Wagner Lipnharski - UST Research Inc. - Orlando, Florida
Forum and microcontroller web site:  http://www.ustr.net
Microcontrollers Survey:  http://www.ustr.net/tellme.htm

1999\03\13@162541 by Sean Breheny

face picon face
Thanks for your fast response Wagner,

At 03:50 PM 3/13/99 -0500, you wrote:
>Sean, cmos circuits, has the nasty habit to oscilate if
>the unused inputs at not referenced to ground or Vcc...

Yes, I understand this,and I have all the other inputs on the IC tied,but
since I want to use this inverter as an amplifier,I can't tie its input to
one of the rails, I have to use it as an input. Are you saying that I must
use a very low impedance to drive it? I tried that,by using an FET as a
buffer,but I still got oscillations,although,the waveform was more complex.

{Quote hidden}

Ok,but why would it consume less power in the high state than the low
state? Do NMOS transistors have lower leakage current with their gates tied
to zero?

>
>--------------------------------------------------------
>Wagner Lipnharski - UST Research Inc. - Orlando, Florida
>Forum and microcontroller web site:  http://www.ustr.net
>Microcontrollers Survey:  http://www.ustr.net/tellme.htm
>

Thanks again,

Sean

|
| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
Save lives, please look at http://www.all.org
Personal page: http://www.people.cornell.edu/pages/shb7
.....shb7KILLspamspam@spam@cornell.edu ICQ #: 3329174

1999\03\13@170317 by Mike Morrin

flavicon
face
At 03:29 pm 13/03/99 -0500, Sean Breheny wrote:
>Hi all,
>
>In Horowitz and Hill's "Art or Electronics", I see several illustrations of
>very clever little "linear" amplifier configurations using CMOS
>inverters,especially the 74HC04. I have an application (which DOES use a
>PIC,as a freq. counter) where I need to take in a 100mV or so signal from
>about 100Hz or so up to 50MHz and convert it into a 0-5V square wave. There
>is a circuit in H&H which is similar to this and I have been using it as a
>guide,but I am having problems. The basis of the circuit is simply two
>inverters,the output of one connected to the input of the other. The first
>inverter also has a 1Meg ohm feedback resistor across it,and the second one
>doesn't. All other inverters on the chip have their inputs tied high or low.
>
>The behavior I'm seeing is incessant oscillation.

You can generally only use unbuffered CMOS gates in linear mode.  The only
ones I have seen commonly available are 4001UB, 4011UB and 4069UB.

Are you sure your reference specified HC parts?

Mike

1999\03\13@171532 by Sean Breheny

face picon face
Hi Mike,

Thanks very much for your response. I'm going bonkers here :-)

Yes, I'm sure it specified HC parts. I was kinda surprised myself because I
consider HC parts to be able to act so fast that they would pick up way too
much noise but yes,that's what it shows.

Forgive my ignorance,but what is an "unbuffered" CMOS gate? I was under the
impression that all CMOS inverters were just a single stage. I know it gets
more complex as you go to NAND,etc, and that they are usually implemented
(IIRC) as a NAND followed by two stages of inversion.

Also,what would the max freq. be on those parts you suggested. I need
something which can deliver at least about 10 times gain up to 50MHz. Since
I don't need (or even want) the output to be linear,I though it would be
cheapest and easiest to use a CMOS gate in linear mode,rather than an
expen$ive analog amplifier chip.

Thanks,

Sean

At 10:43 AM 3/14/99 +1300, you wrote:
>>The behavior I'm seeing is incessant oscillation.
>
>You can generally only use unbuffered CMOS gates in linear mode.  The only
>ones I have seen commonly available are 4001UB, 4011UB and 4069UB.
>
>Are you sure your reference specified HC parts?
>
>Mike
>
|
| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
Save lives, please look at http://www.all.org
Personal page: http://www.people.cornell.edu/pages/shb7
shb7spamKILLspamcornell.edu ICQ #: 3329174

1999\03\13@171538 by Jim Paul

picon face
Why don't you place a voltage divider at the input such that the input is
biased
at 50%.   ie..100K in series with 100k, with one end tied to Vdd, the other
at Vss,
and the junction going to the input of the 75HC04.   This will terminate the
input,
but still allow a voltage swing of ~2.0V either side of quiescent.  Also,
bypass Vdd
with a couple of caps (~10uF and .1 or .01 uF) if you haven't already.  One
other
thing that might help or might not help, but either way is good engineering
practice.
And that is use a single point ground.  You'd be surprised at what can flow
through
ground loops and cause trouble.  I have used this configuration before many
times
with good results and no oscillation.

Good Luck.....

Regards,

Jim




{Original Message removed}

1999\03\13@172814 by Sean Breheny

face picon face
Thanks Jim,for your response.

Here is some more info on the situation:

I tried forcing the input to a particular bias point with two 100k
resistors as you suggest. The problem is that the actual transition point
is NOT EXACTLY 2.5 volts so that the output actually ends up at one of the
rails. Then,if I apply an input signal(thru a cap,so to preserve the bias
point),the input signal's magnitude must be great enough to take the input
from 2.5V beyond the transition point,which is more than 100mV away,so the
circuit isn't sensitive enough. I also tried removing the feedback resistor
and it acts pretty much the same way. (I think that the feedback resistor
serves less purpose when we are forcing the input this way).

I tried using a pot instead of the pair of 100k resistors and the result
was that I could make the circuit as sensitive as I wanted (within reason)
except that if I adjusted the pot close enough to the transition point to
be sensitive,the circuit sometimes still oscillates when there is no input
connected (besides the pot).

Another interesting thing, when I look at the output on my scope, any time
that the output goes past the transition point,there is a little bit of
oscillation. It is hidden if the input is strong enough to take it past the
transition point very quickly,but if I say put in only 400mV or so and run
the pot thru a small range around 2.5V, I see various amounts of
oscillation being superimposed on the correct output depending on the pot
setting. It seems that the circuit HAS to oscillate if it is within a
certain range of the transition point.

Incidentally,the oscillation is around 133MHz,and I am only using 100MHz
probes on a 200MHz scope,so who knows how high the freq. components go!
Those HC gates are fast!

I hope that this additional info may help others in reconizing my problem.

Thanks very much,

Sean



At 03:59 PM 3/13/99 -0600, you wrote:
{Quote hidden}

>{Original Message removed}

1999\03\13@180836 by Scott Dattalo

face
flavicon
face
Sean,

For that circuit in AoE, you need to be driving it or it will oscillate.
In other words, if you have no input signal then the feedback resistor
provides the input. Now, since hc04 is an inverter, the output is opposite
the input. If the input is low the output is high ... Now the feedback
resistor will try to change input to the opposite state. So if the outpu
goes high then the input is pulled high, which will cause the output to
go low, which will pull the input low, .etc


In your case, you'll want to provide an AC signal all of the time.  In
fact, AoE states that this circuit is intended to generate a 10Mhz sq wave
from a 10Mhz sine wave.

Scott

1999\03\13@181044 by Wagner Lipnharski

picon face
The tricky thing here is to use the small offset needed
to trigger the inverter to the on or off state.  In real
the controllable oscillator you built, needed to keep
quite just on the shoulders of the incoming signal that
will kill the oscillation. It means that the feed back
resistor is trying to make it oscillate, but the incoming
signal is holding it in a very fragile edge.  I believe
this approach, even that works, it is very sensible to
lots of things, even temperature.
A simple 10 cents transistor can amplify that signal to
a squared Volts easy... but hmmm, 50 MHz?
--------------------------------------------------------
Wagner Lipnharski - UST Research Inc. - Orlando, Florida
Forum and microcontroller web site:  http://www.ustr.net
Microcontrollers Survey:  http://www.ustr.net/tellme.htm

1999\03\13@182739 by Mike Keitz

picon face
On Sat, 13 Mar 1999 15:29:40 -0500 Sean Breheny <.....shb7KILLspamspam.....CORNELL.EDU>
writes:

>Yes,I am breadboarding this,and that may be part of the problem,but I
>have
>taken special care since this is such a high-bandwidth circuit. I have
>a
>bypass cap (O.1uF) directly from Vss to Vdd,and the actual Vss and Vdd
>pins
>are connected directly to the power supply.

The major source of trouble is stray capacitance from the first
inverter's input to ground and to the output.  It is impossible to avoid
this in a breadboard, since the contact under the board is a large piece
of metal.  It may be feasible to bend that pin away from the chip and
solder a "flying" junction.

Capacitance from the input to ground can make the circuit unstable.
That's why "shorting out the input" with a large capacitor didn't work.
The amplifier's gain and bandwidth is too high to keep the input under
control.  You actually get infinite gain connecting a low-impedance
source directly to the input.  Model the inverter amplifier as an op-amp
with the  + input connected to an internal reference voltage.  I'd
connect a resistor directly to the input (for low stray capacitance) then
back to the signal source.  The ratio of the feedback resistor to this
resistor approximately controls the gain.

The second amplifier may not be helping any.  Since the timer input of a
PIC has a schmitt-trigger, as long as you are reaching the thresholds it
will count OK.  The input signal doesn't have to be rail to rail.  But
the extra very high gain of the second amplifier is generating a large
signal near the first amplifier that could feed back.  So try it with
just one amplifier stage.

>It almost seems to me that the inverter is acting as if it has a small
>amount of hysteresis

You may be right, I never had good results with HC04.  I like the
CD4069UB much better, but it probably doesn't work up to 50 MHz.

or that I am exceeding its phase margin due to
>parasitic (or added in the test case of the 0.1uF cap above)
>capacitance. I
>don't see how this is avoidable.

The suggestions I made above try to avoid that by minimizing stray
capacitance, and isolating the source capacitance from the amplifier with
a resistor.

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1999\03\13@183156 by Wagner Lipnharski

picon face
I forgot this point:
In an operational amplifier, you need to feed back a negative signal to
reduce the gain, so you control it
to works inside the analog voltage range you want. The way to do that is
just return part of the output
signal to the negative input, normally done with a resistor divider
network.

Using an operational amplifier you can build a true logic gate just
fixing the negative input to half point of the Vcc, so whenever the
positive input is higher, even micro volts, will trigger the output to a
high positive level, below that the same to a strong negative output.
As the gain of an average op-amp is in the thousands units, it works
that way.

The CMOS logic gates (and others) works like that, the "internal
negative input" is buried at half Vcc or so,
then the positive input triggers around that voltage. To make it works
as an analog device, you need to feed
back the negative output to reduce the gain to a level where the output
follows the input in such manner you do with an operational amplifier.

As you don't have access to the "internal negative input" pin (it
doesn't exist), the way is feedback the negative output to the positive
input, but it will oscillate, so this is why they use 1 Mega Ohm
resistor, so the input impedance can kill the oscillation, not the
feedback.

Yes, try to reduce the input impedance, using a pot below 10k Ohms to
find the trigger point. Use a large
coupling capacitor, since small ones will helps the "oscillator"...
--------------------------------------------------------
Wagner Lipnharski - UST Research Inc. - Orlando, Florida
Forum and microcontroller web site:  http://www.ustr.net
Microcontrollers Survey:  http://www.ustr.net/tellme.htm

1999\03\13@183814 by Gerhard Fiedler

picon face
At 17:26 03/13/99 -0500, Sean Breheny wrote:
>I tried forcing the input to a particular bias point with two 100k
>resistors as you suggest. The problem is that the actual transition point
>is NOT EXACTLY 2.5 volts so that the output actually ends up at one of the
>rails.

i guess that the way to set the bias by using feedback from the output is
the best, because then you're independent of the actual transition point
(which may change with all kinds of influences).

>transition point very quickly,but if I say put in only 400mV or so and run
>the pot thru a small range around 2.5V, I see various amounts of

aren't you way out of the small range of high amplification with 400mV?

another thing i'm thinking of is that (IIRC) you said you wanted something
around 10 for amplification. in the simple circuit you get much more --
have you tried something like the feedback circuit for an inverting opamp?

ge

1999\03\14@001431 by Sean Breheny

face picon face
Thanks to all who responded once again.

I tried lifting the input pin as Mike suggested and it made no difference.
I also took into consideration what Scott said about it needing to be
driven. Perhaps that is true,but it is still somewhat unsuitable because it
sometimes superimposes its own oscillation onto the output waveform. I also
tried feeding the input from a large source impedance to no avail,still had
oscillation.

So,I tried a CD4049UBE. It doesn't show the oscillatory behavior at all. It
works very well at 1kHz,but I am concerned about it working up to 50MHz. I
will test it our further.

Thanks again,

Sean

At 06:23 PM 3/13/99 -0500, you wrote:
{Quote hidden}

| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
Save lives, please look at http://www.all.org
Personal page: http://www.people.cornell.edu/pages/shb7
shb7spamspam_OUTcornell.edu ICQ #: 3329174

1999\03\14@152437 by Russell McMahon

picon face
Sean,


Off the cuff, I would say the circuit was wrong !!! :-)
Yes, I know that H&H is NEVER wrong, but ....

POSTSCRIPT - written after all of the below.
I see! - they are intending to amplify the signal up to several volts
and then to square it up.
1st inverter should be AC coupled (capacitor in).
If the amplification isn't enough you may have trouble.
Rin mentioned below also includes source resistance, if any.
You could try a 1 transistor emitter follower to reduce source
impedance.
(Email me directly if info on this wanted).
As someone else said - ensure unbuffered gates are used.

   R

Following still applies but ..


The gate is basically a complementary pair of FETs which invert the
signal.
They have effectively a VERY high gain.
Placing the resistor across the inverter provides negative feedback.
You need an input resistor Rin and the resistor across the inverter
Rfb
The gain you get is about Rfb/Rin

Try as ASCII art, if this doesn't look OK just read text.

               _______Rfb_____
               |    |\                       |
---RIN---|---|  >O-----------|----    Output
                    |/

If you then take this signal and input it to another inverter WITHOUT
a resistor across it, the second inverter has sensibly infinite gain
and the output will either be fully high or fully low (give it a
break, its a digital inverter doing what its meant to do !! :-))

One inverter is usually enough BUT the signal is inverted. If its AC,
who cares.

If you want the overall signal to not be inverted you need a resistor
across each inverter (Rfb1 and Rfb2) AND a resistor Rin2 between the
2 inverters.
The oiverall gain will be approx Rfb1/Rin1 * Rfb2/Rin2.

If you DONT have a resistor across the second inverter then -
In the absence of a DC input signal the DC level of the output of the
first gate will be about Vcc/2.
The second inverter will be biased to the middle of its transition
curve and any noise will make it switch rapidly twixt Vcc and Gnd.
This is effectively oscillation. The 2nd inverter will not be very
happy being biased like this.

As noted by someone else, an unbuffered gate should be used. HC is
liable to be wrong. Despite what the books say buffered versions do
tend to work but nasty things are happening inside.

An interesting aside.
Take a schmidt inverter (eg 74C14) and place a resistor from input to
output.
Use as above with Rin.
Measured with an AC millivoltmeter (or digital multimeter on AC volts
gain appears to be Rfb/Rin).
BUT this is a digital gate - Schmidt ensures it cant bias at mid
point (doesn't it :-))

Look at the output with a 'scope.
Far out - Pulse Width Modulation switching as fast as stray
capacitance and the 74C14 will let it.
So fast that typical circuit capacitances tend to act as low pass
filter (your meter sees the average AC).
Can be useful, if not too kosher.


regards

               Russell McMahon



{Original Message removed}

1999\03\15@051153 by paulb

flavicon
face
Sean Breheny wrote:

> Yes,I am breadboarding this,and that may be part of the problem,but I
> have taken special care since this is such a high-bandwidth circuit. I
> have a bypass cap (O.1uF) directly from Vss to Vdd,and the actual Vss
> and Vdd pins are connected directly to the power supply.

 But just *how* are you breadboarding it?  On a solderless breadboard,
or "dead bug" on a PCB plane.  If the latter, you are in serious
trouble!

 If however you are using a solderless breadboard, then oscillation
doesn't surprise me in the least, as you would have a good inch of
connection to each supply rail of the HC04.  That makes it some sort of
Pierce-Colpitts oscillator.

 In general, if it tends to oscillate *without* the feedback resistor,
it almost certainly indicates significant reactance in the ground (and/
or supply) lead(s).  It may in fact be oscillating at hundreds of
MegaHertz and "blocking" to the frequency you see (you have quite
possibly fabricated a Superregen!).

 If this can be managed, you may do well to minimise negative feedback
by using a low-ish value bias divider (still much greater than the
desired Zin) and a much higher feedback resistor.  Under quiescent
conditions it will desirably stabilise with the output not quite at one
rail or the other, and under signal, the bias is effectively set by PWM
integrated by the feedback resistor and the input capacitance.

 For the final implementation, I'd look at a SMD on a solid-backed PCB.

 I have a particular interest, I was intending to look into such a
circuit as a high-performance DFM probe ... some day.
--
 Cheers,
       Paul B.

1999\03\15@140846 by John Payson

flavicon
face
|In Horowitz and Hill's "Art or Electronics", I see several illustrations of
|very clever little "linear" amplifier configurations using CMOS
|inverters,especially the 74HC04. I have an application (which DOES use a
|PIC,as a freq. counter) where I need to take in a 100mV or so signal from
|about 100Hz or so up to 50MHz and convert it into a 0-5V square wave. There
|is a circuit in H&H which is similar to this and I have been using it as a
|guide,but I am having problems. The basis of the circuit is simply two
|inverters,the output of one connected to the input of the other. The first
|inverter also has a 1Meg ohm feedback resistor across it,and the second one
|doesn't. All other inverters on the chip have their inputs tied high or low.

If you capacitively couple the input of your circuit to the incoming
signal source, and if the RC time constant is considerably longer than
the period of the incoming signal, then I would expect your circuit to
work reasonably nicely to extract the signal with about 50% duty cycle.
Basically what will happen is that the 1meg feedback resistor will try
to keep the input of the inverter near the switching threshhold, but
the cap will still pull the input up and down slightly.

Note that if the input signal goes quiet, the input will be extremely
sensitive to noise (even if the input is very low impedance!)  Adding
a large-value resistor between the input and either ground or VDD will
make the circuit less succeptible to noise, but also make it less sen-
sitive.



Attachment converted: wonderland:WINMAIL.DAT (????/----) (0002C46B)

1999\03\15@205917 by Scott Stephens

picon face
At 12:01 AM 3/15/99 -0500, you wrote:

I just tuned in, and don't read the list too often, but I can tell you from
my recent experience that 4069 & 4049 will work as linear amplifiers (when
biased) to around 1MHz, but the 'HC04 wont because it has additional stuff
on the CMOS FET pair output that ruin the bias. It will work as a
(non-linear) square wave oscillator.

You can use (TI's) SN74ACHU04's in linear amps to 200 MHz (so I've read).
The "U" stands for unbuffered (no buffers to screw up biasing). If you need
any, let me know I'm going to have plenty of spares. You can use ECL line
recievers as 20dB linear amps into the upper UHF range.

Better E-mail me any replies,

Scott

1999\03\15@212834 by Jim Paul

picon face
Scott,

I could use about 4 of those TI SN74ACHU04's packages.   They will fit
perfectly
in my latest project.   Just let me know the cost, and make shipping
arrangements.
My mailing address is:

Jim Paul
706 William Morton Drive
Richmond, Texas
77469-2130

Thanks and Regards,

   Jim




{Original Message removed}

1999\03\17@162828 by Sean Breheny

face picon face
I want to thank everyone who responded to this thread.

I am still experimenting with several designs,but now with more knowledge
about the situation.

When this project is finally finished,it will go on my web site,so anyone
who is interested can see how the problem was finally (I hope!) solved.

Thanks,

Sean

|
| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
Save lives, please look at http://www.all.org
Personal page: http://www.people.cornell.edu/pages/shb7
@spam@shb7KILLspamspamcornell.edu ICQ #: 3329174

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