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'[OT]: about hardware schemayic'
2000\05\25@174648 by Andre Abelian

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Hi,

I am looking for a diagram  without a pic that can do the
fallowing.

when input is HI output is LOW
when input is LOW output is LOW
when input is pulsing output is pulsing too Hi and Low or Low and HI.


any help will highly appreciated.

Andre







=== Andre Abelian - spam_OUTandreTakeThisOuTspamcompufire.com
=== Engine Electronics Inc., - Pomona CA
=== http://www.compufire.com

2000\05\25@175521 by M. Adam Davis

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At what frequency or period should the output start to match the input?

-Adam

Andre Abelian wrote:
{Quote hidden}

2000\05\25@182709 by Jinx

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From: Andre Abelian <engelecspamKILLspamEARTHLINK.NET>
>
> I am looking for a diagram  without a pic that can do the
> fallowing.

> when input is HI output is LOW
> when input is LOW output is LOW

Take any logic gate and wire the output to ground ;-)

Sorry <G> there need to be other input conditions specified

> when input is pulsing output is pulsing too Hi and Low or Low and HI.

Sounds like an inverter

2000\05\25@184613 by Mark Willis

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Jinx wrote:
> From: Andre Abelian <.....engelecKILLspamspam.....EARTHLINK.NET>
> > I am looking for a diagram  without a pic that can do the
> > fallowing.
>
> > when input is HI output is LOW
> > when input is LOW output is LOW
>
> Take any logic gate and wire the output to ground ;-)
>
> Sorry <G> there need to be other input conditions specified
>
> > when input is pulsing output is pulsing too Hi and Low or Low and HI.
>
> Sounds like an inverter

Inverter with a cap to DC isolate the input, and a weakish pullup on the
In side of the inverter to Vdd?

 Mark

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