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'[JunkMail] Re: [PIC:] Programming Specifications'
2004\03\02@063830
by
Bill Couture
On Tue, 2 Mar 2004, Tony Nixon wrote:
> >And having an on-chip Vpp generator would be nice too. :)
> >
> >
> >
> Make 'em all LVP and do away with C series. :-)
Unless you're like me, and never use LVP. I need the extra I/O pin.
Bill
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2004\03\02@083851
by
Spehro Pefhany
At 06:36 AM 3/2/2004 -0500, you wrote:
>On Tue, 2 Mar 2004, Tony Nixon wrote:
>
> > >And having an on-chip Vpp generator would be nice too. :)
> > >
> > >
> > >
> > Make 'em all LVP and do away with C series. :-)
>
>Unless you're like me, and never use LVP. I need the extra I/O pin.
>Bill
Or like me (and certain car companies) and distrust micros that can
corrupt their own program memory.
Best regards,
Spehro Pefhany --"it's the network..." "The Journey is the reward"
spam_OUTspeffTakeThisOuT
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2004\03\02@181626
by
Byron A Jeff
On Tue, Mar 02, 2004 at 08:45:02AM -0500, Spehro Pefhany wrote:
> At 06:36 AM 3/2/2004 -0500, you wrote:
> >On Tue, 2 Mar 2004, Tony Nixon wrote:
> >
> >> >And having an on-chip Vpp generator would be nice too. :)
> >> >
> >> >
> >> >
> >> Make 'em all LVP and do away with C series. :-)
> >
> >Unless you're like me, and never use LVP. I need the extra I/O pin.
> >Bill
>
> Or like me (and certain car companies) and distrust micros that can
> corrupt their own program memory.
Are these (LVP, writing own program memory) not orthogonal? The 16F777 for
example (to my surpise frankly) has LVP but cannot program its own memory.
It was going to become my new 877 (because it has all the nanowatt stuff too)
but that's gone by the wayside. I'm really looking for a 16F877A with nanowatt
in it.
As for LVP Bill is right. And it really sucks because the LVP pin is stuck
right in the middle of an 8 bit port. I know why they did it: Only RB1-RB5
on the 16F74 that the family was modeled after did not have a secondary
function attached and was available on both the 28 and 40 pin parts.
It still sucks nevertheless.
I wish that MChip could figure out a way to program that models Wouters ZPL
bootloader which wiggles the MCLR in a particular pattern. Something simple
like MLCR has to be low for a specific amount of time (like 1ms) to be
considered a normal reset, but anything faster will actually count the time
inbetween. Since nanowatt chips all have internal osciallators, it should
be real simple to keep count of runtime since reset.
But that's just wishful thinking. I'm on the ZPL train now and am actively
working on a ZPL 16F implementation. Once I get that done I'll simply dedicate
the 384 bytes to the chip for the bootloader, do a high voltage program
(getting that RB4 back on the 16F87X chips), then wiggle MCLR to reprogram
from then on.
BAJ
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2004\03\02@182455
by
Spehro Pefhany
At 06:16 PM 3/2/2004 -0500, you wrote:
>Are these (LVP, writing own program memory) not orthogonal?
To some extent, but the CONFIG switch disabling the internal charge
pump makes things more secure. Not quite as good as a hardware write
disable or leaving out the charge pump entirely, but it doesn't use up a
pin, and I imagine the charge pump is shared with the EEPROM circuitry.
Best regards,
Spehro Pefhany --"it's the network..." "The Journey is the reward"
.....speffKILLspam
@spam@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
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2004\03\08@001214
by
Tony Nixon
>>>>Make 'em all LVP and do away with C series. :-)
>>>>
>>>>
>>>Unless you're like me, and never use LVP. I need the extra I/O pin.
>>>Bill
>>>
>>>
Surely they can make them all LVP only.
Some new chips have VPP raised before VCC to enter programming mode.
Holding RB6 and RB7 low, and then raising MCLR to 5V before applying VCC
seems an easy way to accomplish this.
I also can't see why the MCLR pin can't be used as the clock pin while
in programming mode, and only need RB7 for the data pin. They could also
expand on Wouters idea and just use MCLR, but perhaps synchronous
clocking is easier to deal with.
When not in programming mode, (VCC before VPP), MCLR works normally.
regards
Tony
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