Post by thread:[EE] Picoblaze or simpler

Hi all, I'm looking for a soft CPU that can run on my Spartan 3E FPGA. It should be as simple as possible and preferably written in Verilog. I looked at Picoblaze and it's pretty good other than a poorly written/unmaintained assembler (there are clones, but still kind of a pain in the ass). Also, it runs from a hard coded Verilog ROM which is okay, but: Just wondering if there are any simpler or equally as simple soft CPUs out there? Microblaze is overkill for what I need. But something that can run from flash instead of hard coded ROM is always good, since I can very easily program the on board flash

I have seen PIC compatible IP cores for FPGA's. I'm not sure if they're in Verilog or VHDL. Also, 8051 cores, but again not sure if in Verilog or VHDL. Jim {Original Message removed}

On Sun, 23 Oct 2011 21:07:16 -0400, V G <spam_OUTx.solarwind.xTakeThisOuTgmail.com> wrote: > there? Microblaze is overkill for what I need. But something that can run > from flash instead of hard coded ROM is always good, since I can very > easily > program the on board flash. Doesn't picoblaze run out of block ram? I think block ram is pretty easy to change (on the fly with a dual port ram or just a new fpga load with the changed block ram init values). A new fpga load is stored in the flash anyway. I have looked at using picoblaze many times but always went to a dedicated state machine due how slow picoblaze is. I am sure it has its uses though. M

On Sun, Oct 23, 2011 at 11:03 PM, <.....martinKILLspam@spam@davintech.ca> wrote: > Doesn't picoblaze run out of block ram? I think block ram is pretty easy > to change (on the fly with a dual port ram or just a new fpga load with the > changed block ram init values). A new fpga load is stored in the flash > anyway. > I don't want to resynthesize every time I recompile my picoblaze code. > I have looked at using picoblaze many times but always went to a dedicated > state machine due how slow picoblaze is. I am sure it has its uses though.. Slow? I don't understand. I thought it can do 2 cycles per instruction at up to 200MHz

On Oct 23, 2011, at 11:15 PM, V G <x.solarwind.xKILLspamgmail.com> wrote: > On Sun, Oct 23, 2011 at 11:03 PM, <.....martinKILLspam.....davintech.ca> wrote: > >> Doesn't picoblaze run out of block ram? I think block ram is pretty easy >> to change (on the fly with a dual port ram or just a new fpga load with the >> changed block ram init values). A new fpga load is stored in the flash >> anyway. >> > > I don't want to resynthesize every time I recompile my picoblaze code. > I am pretty sure there is a way to reload a block ram with new init values post place n route. Check fpga_editor as a last resort method. > >> I have looked at using picoblaze many times but always went to a dedicated >> state machine due how slow picoblaze is. I am sure it has its uses though. > > > Slow? I don't understand. I thought it can do 2 cycles per instruction at up > to 200MHz. But you can do lots of stuff in parallel @ 200. MD > -

> I'm looking for a soft CPU that can run on my Spartan 3E FPGA. It should be > as simple as possible and preferably written in Verilog. Check out opencores.org http://opencores.org/browse.cgi/by_category I know they had a PIC16F84 core at one stage. I think it's only limitation was it didn't emulate the EEPROM. -- Scanned by iCritical.

On Mon, 24 Oct 2011 13:54:26 +0000, you wrote: >> I'm looking for a soft CPU that can run on my Spartan 3E FPGA. It should be >> as simple as possible and preferably written in Verilog. > >Check out opencores.org http://opencores.org/browse.cgi/by_category I know they had a PIC16F84 core at one stage. I think it's only limitation was it didn't emulate the EEPROM. > > >-- >Scanned by iCritical. This project has an extremely simple Forth type processor http://excamera.com/sphinx/gameduino/ Source here http://excamera.com/files/gameduino/verilog/j0.v

On Mon, 24 Oct 2011 00:38:20 -0400 Martin Darwin <EraseMEmartinspam_OUTTakeThisOuTdavintech.ca> wrote: > > I don't want to resynthesize every time I recompile my picoblaze > > code. > > > > I am pretty sure there is a way to reload a block ram with new init > values post place n route. Check fpga_editor as a last resort method. > I believe the relevant Xilinx tool is called DATA2MEM. Chri