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'[EE] How would you ensure fast powerup rise time?'
2012\05\21@102138 by Electron

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Hi,
I have a IC which, in the datasheet, is said to need a powerup rise time not
slower than 100uS in order to initialize correctly. Effectively it doesn't work
if the power ramps up slow, and there's no reset input, power must be disconnected
in order to attempt a new successfull turn on.

How would you ensure fast powerup rise time? The power turns on / ramps up very
slowly, and I can't help it.

I am currently investigating two options:

1) a PNP/NPN or PMOS/NPN pass circuit at the output, and using a voltage regulator
with error output (LP2951): when the error is signaled, no power is passed to the IC.
I would prefer to power the problematic IC directly via the error output, but it sinks
too much current (even 50 mA), so the PNP/NPN power switch is necessary, but it will
introduce a voltage drop, which is gonna cause errors (it's an analogue IC)..

2) using a voltage supervisor (e.g. NCP302HSN40T1G) BEFORE the voltage regulator, to
control the shutdown pin of the latter (a LP2951). Seems like a good idea, however
the NCP302HSN40T1G has a 10V voltage input limit which ruins the 30V needed and
offered by the LP2951.

How would you handle this problem?

And, regarding 1) can you suggest me a cheap and small logic level PMOS transistor?
It needs to pass (or not) +3.3V with minimal voltage drop even at 100mA peak current.
For "logic level" I mean that with the source at +3.3V and the gate at ground, it
should ~fully conduct.

Thanks a lot for any help.

Mario

2012\05\24@160645 by Electron

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Dear David,

At 15.49 2012.05.24, you wrote:
{Quote hidden}

Believe me I did and I did it not only for the LP2951 (my choice then) but
also for tens and tens of other possible Vregs. Although the function you
mention would be very useful to many (considering that some chips are very
demanding about power up ramp times), the only such chip that I found after
extensive datasheet's (tens and tens!) reading is the MCP1791. However, it
takes 200uS to ramp up while I need 50 (from 30 to 80  max), moreover it
needs at least 6V to "startup", defying its LDO qualities, although only at
startup. Maybe for another project I will remember of it, it's a very nice
Vreg and I suggest you all to take a look at it, it's nice and not too
expensive. Page 15 of the data sheet describes this low voltage shutdown
feature: http://ww1.microchip.com/downloads/en/devicedoc/22075a.pdf


>Have you looked at the circuits on page 12, "Main output latches off
>at lower input voltages", and on page 13, "Latch off when error flag
>occurs", and on page 14, "Low battery disconnect" ?
>Is there any good reason that none of them will work in your application?

Component count is terrible, the first even needs two LP2951's! It's not
that I'm not able to design a low voltage shutdown output circuit, it's
that I need to keep component count (as I hand solder every board), cost
and board space used at a minimum.

Also, the shutdown input is not usable on the LP2951 in my application
(as I thought also about this solution, not only the "switch outputs off")
because it's active high and as soon as you can activate it Vin (thus also
Vout) must reach 2.0V, at that point my problematic IC will have already
initialized in a wrong state, and it can't be resetted, only powered down.


>The next thing I would try is (2), a voltage supervisor *before* the
>regulator, driving the shutdown pin of that regulator.

Yup but SD will work only if > 2.0V, and as said the IC would already be
(wrongly) initialized then. :/


>I would add some sort of "buffer" that takes the full raw input
>voltage and convert it to something acceptable to the voltage
>supervisor.
>I suspect a 2-resistor voltage divider may be adequate for that
>buffer; followed by a zener to GND to clip the buffer's output voltage
>to a range that the supervisor can handle.
>Select the resistors such that the divider output reaches the
>supervisor "good" threshold when the raw input voltage is slightly
>higher than for the whole system to turn on.

Yes this is a good idea to overcome the 10V limitation I had on the supervisor
that I had considered (after large selection) for the "before input" attempt.


>The next thing I would try is a third option:
>
>3) a transistor pass circuit at the output (PNP or NPN or PFET or NFET),
>and a voltage regulator that accepts a "feedback voltage" taken
>"downstream" of the pass transistor.

The LP2951 accepts it but think of it, if we disconnect the switch, then Vreg
will compensate and saturate its output transistor (very high output voltage!).
It doesn't work.

The workaround is to use a PFET with very low Rds on, so the voltage drop
will be non-noticeable (at first I wanted to use a MMBT3904-MMBT3906 combo
but because of the above consideration I had to replace the MMBT3906 with a
PFET). This is currently my solution.. the LP2951 ~Error output (which becomes
active at Vin 1.3V, thus before the problematic IC starts initialization) drives
the base of the MMBT3904 which drives the PFET. Add some resistors and the
component count increases of 7 unities.. :-/ But this is the best solution it
seems, component count is quite high but they're all very small components,
and cost is really really low. So I get 2 qualities out of 3 needed, not bad
although not a full victory either (cost, space OK but component count BAD)..

The darn IC has a Sleep input, I'm awaiting a reply from the design engineer
to know if I can "reset" it, once badly powered up, via a Sleep cycle.. but
I think it's not possibile, I just want to ask anyway. Prototyping with QFN
parts is not quick either, and anyway the problem shows up mostly at < -0C
temperatures, which I cannot easily simulate now (I could use the fridge, OK),
but which will be there when it will be used, so.. I wanna be safe and ask
the IC's design engineer, if the answer is negative, I will have to really
ensure a quick power up ramp to the chip. Too bad as the MPU itself crashed
too (BOR bug in this silicon), but it was sufficient to tie the LP2951 ~Error
output to the MPU ~Reset to fix it. I wish it was possible for the other IC
too via a "Sleep cycle".. :/


>I.e., connect the voltage regulator "power out" pin -- pin 1 LP2951 --
>to the "top" of the transistor (pfet source);
>connect the "bottom" of the transistor (pfet drain) to the VCC of your
>problematic chip and also the "feedback" pin of the regulator -- pin 2
>of the LP2951.
>Since the pass transistor is "inside the loop", it won't cause analog errors.

No errors but when you switch it off, think what happens in the LP2951. ;)

Cheers,
Mario


>
>--
>David Cary
>+1(918)813-2279
>http://david.carybros.com/

2012\05\24@174544 by Robert Rolf

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Do you have a spare pin you could use to drive a PFET or transistor on your
fussy chip's power rail?
Then you would be able to reset the device at will (assuming that you set
all other pins connected
to it to low).
You say you need 100mA which is too much for a PIC pin, but I have used PIC
pins to directly switchable power
to low current drain devices. With a series inductor and small cap to
filter out noise you get a decent
switchable power line

2012\05\25@040931 by Electron

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At 23.45 2012.05.24, you wrote:
>Do you have a spare pin you could use to drive a PFET or transistor on your
>fussy chip's power rail?

Nope, that would be wonderful if I had.. but none are left. :(


>Then you would be able to reset the device at will (assuming that you set
>all other pins connected
>to it to low).
>You say you need 100mA which is too much for a PIC pin,

Well, even if it wasn't, it would introduce a voltage drop, which for analog
parts that have to be sampled by the ADC, like this, would introduce errors..


>but I have used PIC pins to directly switchable power
>to low current drain devices. With a series inductor and small cap to
>filter out noise you get a decent
>switchable power line.

Yup it someway comforted to know that I tried every possibile way, but in the
end it seems that the PMOS driven by NPN (to invert input logic level) driven
by the ~Error output of the Vreg is the best overall solution, given the 3 goals
of being as cheap as possible, occupying as little space as possible, and to
keep component count as low as possible (as I do hand solder every board).

I'm still waiting for the reply from the IC design engineer, if it was possible
to reset it via a Sleep cycle, I could tie it to the ~Error output directly and
would be a fantastic solution. But the IC has a bug that if power doesn't ramp
quicker than 100 uS, the IC won't load its registers correctly in case the temp
is very cold.. argh, damn bugs, one should read the erratas BEFORE the datasheet,
but I already have bought plenty of them so..

It's all experience in the end. In the future I will pay much more attention to
these "hidden" aspects.

Cheers,
Mario

2012\05\25@074404 by Spehro Pefhany

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At 10:21 AM 5/21/2012, you wrote:

{Quote hidden}

So the chip has a lousy internal reset circuit, but no reset pin.

You could use a supervisor chip after the regulator (eg. MCP101T) driving a MOSFET
high side switch such as a Si2301.

Ideally, run everything through the high-side switch- otherwise something else
in the circuit may partially power up the chip before Vdd turns on (through the
internal protection networks), which could certainly screw up the reset or even
cause latch-up and destruction of your magical mystery chip. Best to not do that.

Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the reward"
.....speffKILLspamspam@spam@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com

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