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'[EE] High Current Buffer?'
2011\11\14@181525 by Harold Hallikainen

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I'm looking for a high current digital buffer. It needs to source and sink
200mA. Power supply will probably be 5V. I see some op amps designed to
drive DSL lines with currents like this, but that seems like overkill
since I only need 0V or 5V out. I'm driving this with a square wave at
3MHz or less. Several in a package would be nice.

Maybe I should use FET gate drivers?

Ideas?

THANKS!

Harold





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2011\11\14@184128 by Sean Breheny

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part 1 1772 bytes content-type:text/plain; charset="iso-8859-1" (decoded quoted-printable)

FET gate drivers will work but be careful to get ones that are fast
enough. 5MHz is about the limit of most of them due to internal
propagation delays.

Another item which will work is a whole bunch of unbuffered inverters
in parallel - like 74HCU04. I took a Rubidium oscillator and made an
enclosed lab reference clock unit by adding a power supply and an
output buffer which converted the 1V sine wave output of the
oscillator into a 5V square wave and then had enough oomph to drive a
50 ohm load to almost 0V and 5V (using about 10 inverters in parallel
spread across two 74HCU04 packages). I think I added a 10 ohm series
resistor to limit the short-circuit current if the output were to be
shorted and so this series resistance limited the voltage swing at
higher currents.

Actually, I just found a spectrum analyzer screen shot I took of the
output of this - an almost perfect 10MHz square wave (proper harmonics
up to 200MHz shown here - along with some even-order components, too).

Sean


On Mon, Nov 14, 2011 at 6:15 PM, Harold Hallikainen
<spam_OUTharoldTakeThisOuTspamhallikainen.org> wrote:
{Quote hidden}

> -

2011\11\14@184319 by IVP

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> Maybe I should use FET gate drivers?

Sounds reasonable, it's the sort of job they're desgned for. Probably
the first thing I'd have looked a

2011\11\14@210553 by William \Chops\ Westfield

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>> I'm driving this with a square wave at 3MHz or less.

I was going to suggest 555 timers, but 3MHz seems very fast for a 200mA source/sink (and too fast for a 555.)

BillW

2011\11\14@214337 by RussellMc

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> I'm looking for a high current digital buffer. It needs to source and sink> 200mA. Power supply will probably be 5V. I see some op amps designed to> drive DSL lines with currents like this, but that seems like overkill> since I only need 0V or 5V out. I'm driving this with a square wave at> 3MHz or less. Several in a package would be nice.
Needs tuning for speed, but consider.
NPN + PNP bipolar Jelly beans.
Connect bases.
Connect emitters.
PNP collector low
NPN collector high
Drive bases.
Output from emitters.
2 cent buffer.


         Russell McMahon

2011\11\14@225940 by Harold Hallikainen

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>> I'm looking for a high current digital buffer. It needs to source and
>> sink> 200mA. Power supply will probably be 5V. I see some op amps
>> designed to> drive DSL lines with currents like this, but that seems
>> like overkill> since I only need 0V or 5V out. I'm driving this with a
>> square wave at> 3MHz or less. Several in a package would be nice.
> Needs tuning for speed, but consider.
> NPN + PNP bipolar Jelly beans.
> Connect bases.
> Connect emitters.
> PNP collector low
> NPN collector high
> Drive bases.
> Output from emitters.
> 2 cent buffer.
>
>
>           Russell McMahon
>

That appears to be what's inside some of the FET drivers. I call it a
complementary emitter follower. It looks like in small quantities it's
about 20 cents.

Thanks!

Harold

>

2011\11\14@230445 by Harold Hallikainen

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>>> I'm driving this with a square wave at 3MHz or less.
>
> I was going to suggest 555 timers, but 3MHz seems very fast for a 200mA
> source/sink (and too fast for a 555.)
>
> BillW

I was always impressed that the NE555 could source or sink 200mA. But,
this is probably a bit fast for it.

Thanks!

Harold



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2011\11\14@231007 by Sean Breheny
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One down-side to this approach is that you won't get all the way to 5V
and 0V - the best you can do is one diode drop away from each rail.

Sean


On Mon, Nov 14, 2011 at 10:59 PM, Harold Hallikainen
<.....haroldKILLspamspam@spam@hallikainen.org> wrote:
{Quote hidden}

>> -

2011\11\14@232946 by Harold Hallikainen

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> One down-side to this approach is that you won't get all the way to 5V
> and 0V - the best you can do is one diode drop away from each rail.
>
> Sean

True. I guess that's good enough for FET gates. It does drive up the
dissipation, though. On FET drivers, I'm not seeing any ratings on
continuous output current. I'm mostly seeing peak current ratings.

Harold

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2011\11\15@132057 by Thomas C. Sefranek

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I've always been a fan of a similar design, using FETs (P + N), it inverts
the signal but is VERY close to rail to rail.

{Original Message removed}

2011\11\15@195923 by Harold Hallikainen

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> I've always been a fan of a similar design, using FETs (P + N), it inverts
> the signal but is VERY close to rail to rail.

That sounds like an unbuffered CMOS inverter as shown at
http://en.wikipedia.org/wiki/Inverter_%28logic_gate%29 . The trick is not
getting both FETs conducting at the same time.

Harold


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2011\11\15@204208 by RussellMc

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           BCCs - mainly for low Vcesat "trick" at end.

> > One down-side to this approach is that you won't get all the way to 5V
> > and 0V - the best you can do is one diode drop away from each rail.

Fine enough for almost all FETs.
As long as Vgsth >> 1 Vbe.

You can use push pull drive with the emitters on the rails if you want
true rail to rail response (less a much smaller Vce_sat*) , with more
effort then required to prevent shoot through.

> True. I guess that's good enough for FET gates. It does drive up the
> dissipation, though.

Dissipation is very largely only when load takes the current offered.
I use BC807-40 and BC817-40 with superb  Beta.

> On FET drivers, I'm not seeing any ratings on
> continuous output current. I'm mostly seeing peak current ratings.

FET drivers are rated that way because that's what matters for a FE
gate (but, you know that).
Most will probably carry near their max rating the rest of the time as well..
Sensible thermal rating is probably the key.
It  may be that some use special drive techniques to hit the gate hard
for a limited time only but I'd expect most to be relatively dumb.

An issue with any such driver is shoot through.
I use this with an MV34063 (again) at not much over 100 kHz and
transition seems to be fast enough to have minimal shoot through
issues.
The MC34063 has single sided (high side only) drive and I use a 1K
pull down at about 3-4V drive and it works well [tm].

In that case the MOSFET has suitable low Vgsth to allow full on drive
but not so low that the Vbe to ground matters at turnoff. [A beautiful
little Taiwanese CES2310 SOT23 "Golidlock"s FET :-) ].




       Russell McMahon
      Applied Technology ltd
      New Zealand


* Interest only:

If you want very very very low Vcesat for some switching purpose and
efficiency is not important then unusually high forced betas can
decrease Vcesat to much lower than usual levels.
You might use this for eg switching a voltage reference )(that was not
too too crucial).

I recall one design (but can't as yet recall what it was
for)(Taiwanese exercise bike?)  that I used a forced beta of about 0.1
:-) !!!! (ie Ib = 10 x Ic!!!) to get a superbly low Vcesat where his
mattered

2011\11\15@233053 by Sean Breheny

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On Tue, Nov 15, 2011 at 8:41 PM, RussellMc <apptechnzspamKILLspamgmail.com> wrote:
>            BCCs - mainly for low Vcesat "trick" at end.
>
>> > One down-side to this approach is that you won't get all the way to 5V
>> > and 0V - the best you can do is one diode drop away from each rail.
>
> Fine enough for almost all FETs.
> As long as Vgsth >> 1 Vbe.
>

But was the OP asking about driving FETs? I thought he was asking
about possibly using FET driver ICs to drive some other kind of load.
That load may care about the exact high and low voltage levels (or may
not in which case the BJT solution does sound appealing)

Sean

2011\11\16@145448 by Harold Hallikainen

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> But was the OP asking about driving FETs? I thought he was asking
> about possibly using FET driver ICs to drive some other kind of load.
> That load may care about the exact high and low voltage levels (or may
> not in which case the BJT solution does sound appealing)
>
> Sean
>


You are correct. I'm actually driving a string of LEDs where the high end
is at +32VDC. I' looking at driving the low end through a resistor to
limit current. I have to see what the LED VI curve looks like, especially
for a long string. I COULD do open collector or open drain, but I'm
thinking that the LEDs could go off faster if I actually drove them off.
So, I'm thinking of driving the bottom of the current limit resistor with
0V to turn the LEDs on and +5V to +10V to turn them off. Switching time is
important because I'm using up to a 3MHz square wave.

THANKS for the comments so far!

Harold



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2011\11\16@160539 by RussellMc

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>... driving a string of LEDs where the high end
> is at +32VDC. I' looking at driving the low end through a resistor to
> limit current.

Better op amp and transistor adjustable sink to set constant current.
O/C to turn off (se below).
When dumping load on his you have to be sure that response time is Ok
to stop Iovershoot_iniial going too high. Simple matter of engineering
:-).

> I COULD do open collector or open drain, but I'm
> thinking that the LEDs could go off faster if I actually drove them off.
> So, I'm thinking of driving the bottom of the current limit resistor with
> 0V to turn the LEDs on and +5V to +10V to turn them off. Switching time is
> important because I'm using up to a 3MHz square wave.

> I COULD do open collector or open drain, but I'm> thinking that the LEDs could go off faster if I actually drove them off.

Active offg as described should do no harm, but ...

LEDs have  fast response - unless you have external capacitance across
the LEDs  you are unlikely to get much useful gain by active level
drive compared to open collector on/off.

Quick let's-see.

Say Von = 30V for now
Assume 100 mA operation (you said 200 mA driver).
LED power = 3 Watt.
To operate for 1/3 uS = 3 x 1/3 x 10^-6 Joule = 1 uJ

Capacitor at 30V to store 1uJ = 0.5 C V^2
C = 10^-6 J x 2 / 900 ~= 2.5 nF.

This has the energy to operate the LEDs for 1/3 uS but would not do so
for anywhere as long as V droop will rapidly drop you below
V_LED_operate. Actual on time will be quite a lot less.

So unless the capacitance ON BOARD on the LED board across the LEDs is
>> 2.5 nF they will be off in << on 3 MHz cycle. Shorter at less
current.

E&O as ever.

Phosphor glow is << 1/3 uS.



   Russell McMahon
   Applied Technology ltd
   New Zealand

2011\11\16@230359 by Harold Hallikainen

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>>... driving a string of LEDs where the high end
>> is at +32VDC. I' looking at driving the low end through a resistor to
>> limit current.
>
> Better op amp and transistor adjustable sink to set constant current.
> O/C to turn off (se below).
> When dumping load on his you have to be sure that response time is Ok
> to stop Iovershoot_iniial going too high. Simple matter of engineering
> :-).

I'm using that right now and am looking for cost reduction. Get rid of the
op amp and transistor with a lot of dissipation by having the driver
saturate. Dissipate the power in a resistor. Current control will not be
as tight, but probably close enough.

o off faster if I actually drove them off.
{Quote hidden}

Thanks for checking that all out! My existing active current sink
obviously also does not reverse bias the LEDs, and it's working well. I
just thought that maybe it would work better with reverse bias for off.

So, I'm tempted to use a FET to turn the string on and off. I'll
experiment a bit.

THANKS!

Harold


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