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'[EE] Bypass capacitor value'
2005\03\03@090055 by Vic Fraenckel

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What would be a reasonable value for a bypass capacitor for use from a IC
Vcc and ground? I have been led to understand that 0.1uF ceramic was good
and 0.01uF would be acceptable.

Any enlightenment will be appreciated.

TIA

Vic
________________________________________________________

Victor Fraenckel - The Windman
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"Dost thou not know, my son, with how little wisdom the world is governed?"
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men stand ready to do violence on their behalf."
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all the dunces are in confederacy against him."   -Jonathan Swift



2005\03\03@113825 by fred jones

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I think you have been led correctly.  If you search the archives, there have
been long and numerous threads about this subject detailing more than you
probably want to know about bypass capacitors :)
Good luck,
FJ
============================================
I have been led to understand that 0.1uF ceramic was good
and 0.01uF would be acceptable.
________________________________________________________

Victor Fraenckel - The Windman
victorf ATSIGN windreader DOTcom
KC2GUI

      Home of the WindReader Electronic Theodolite
                               Read the WIND

"Dost thou not know, my son, with how little wisdom the world is governed?"
-Count Oxenstierna (ca 1620) to the young King Gustavus Adolphus

"People sleep peacefully in their beds at night only because rough
men stand ready to do violence on their behalf."
-George Orwell

"When a true genius appears in the world you may know him by this sign: that
all the dunces are in confederacy against him."   -Jonathan Swift



2005\03\03@171928 by Russell McMahon

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> What would be a reasonable value for a bypass capacitor for use from
> a IC
> Vcc and ground? I have been led to understand that 0.1uF ceramic was
> good
> and 0.01uF would be acceptable.

The full answer is very long and there are large arguments about the
correct answer :-).

The short answer is that for very high frequency digital electronics
circuits (say 50 MHz up) then 0.01uF is probably best but for most
applications 0.1 uF is best. Either will work OK in most cases.
Smaller values (say 0.001 uF are liable to be inferior).

In all cases, keep capacitor lead lengths as short as possible and
mount capacitors as near IC power pins as possible. In critical
applications use one capacitor per IC.


       RM


2005\03\04@030241 by ThePicMan

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At 11.00 2005.03.04 +1300, you wrote:
>>What would be a reasonable value for a bypass capacitor for use from a IC
>>Vcc and ground? I have been led to understand that 0.1uF ceramic was good
>>and 0.01uF would be acceptable.
>
>The full answer is very long and there are large arguments about the correct answer :-).
>
>The short answer is that for very high frequency digital electronics circuits (say 50 MHz up) then 0.01uF is probably best but for most applications 0.1 uF is best. Either will work OK in most cases. Smaller values (say 0.001 uF are liable to be inferior).
>
>In all cases, keep capacitor lead lengths as short as possible and mount capacitors as near IC power pins as possible. In critical applications use one capacitor per IC.

By the way, there are practical cases when one of the capacitor leads cannot be as short as the other.
In such cases, it is better to make the Vdd one as short as possible, rather than the Vss, or it's the same?

TPM

2005\03\04@034845 by Russell McMahon

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> By the way, there are practical cases when one of the capacitor
> leads cannot be as short as the other.
> In such cases, it is better to make the Vdd one as short as
> possible, rather than the Vss, or it's the same?

Unlikely to matter and unlikely to be especially significant if it did
matter.
In both cases you have two series C's with a capacitor (imperfect)
between them. As you are not connecting to the midpoints you can't
tell what order the components are in.


       RM

2005\03\04@091810 by John J. McDonough

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----- Original Message -----
From: "ThePicMan" <spam_OUTthepicmanTakeThisOuTspaminfinito.it>
Subject: Re: [EE] Bypass capacitor value


> By the way, there are practical cases when one of the capacitor leads
cannot be as short as the other.
> In such cases, it is better to make the Vdd one as short as possible,
rather than the Vss, or it's the same?

In the typical PIC application, it isn't going to matter.  But if there is
RF in the neighborhood ... either because the circuit is part of a
transmitter, or because there are long, high-speed traces nearby, then the
leads MUST be short ... both of them.

If there is significant RF or magnetic fields, it is customary to put 2 caps
in parallel ... one perhaps 0.1 or even 1uF, and the other .001 or maybe
even 100pF.  The reason is that the large capacitance is needed for lower
frequencies.  You would expect the large capacitance to have almost zero
impedance at high frequencies, but in fact, larger value capacitors tend to
have more inductance than smaller values.  Hence, the smaller value to nail
the higher frequencies.

Possible noise sources include not only intentional RF generators, but also
signal lines and electric motors.  Long, nearby traces carrying high speed
signals can be effective antennas.  Magnetic fields from large electric
motors can induce currents in your traces.  These sources will have
different frequency characteristics and thus different bypassing needs.

But 99% of the time it is horribly non-critical.  I tend to prefer the .01
or so, or maybe even .001, rather than .1, but that is just personal
preference ... I really have no excuse for it. Some designers prefer even
smaller.  When you go above 0.1, you are typically getting into capacitors
with fairly high inductance which sort of defeats the purpose, unless you
have a lot of low frequency stuff to worry about.    But most of the time,
liberally throw around whatever ceramic you happen to have and it will be
fine.

--McD


2005\03\04@094431 by Dave VanHorn

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>
>By the way, there are practical cases when one of the capacitor leads
>cannot be as short as the other.
>In such cases, it is better to make the Vdd one as short as possible,
>rather than the Vss, or it's the same?

Mount the cap at GND, and take a track from system VCC to the cap, and from
there to the chip's VCC.



2005\03\04@094617 by Dave VanHorn

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At 03:46 AM 3/4/2005, Russell McMahon wrote:
>>By the way, there are practical cases when one of the capacitor leads
>>cannot be as short as the other.
>>In such cases, it is better to make the Vdd one as short as possible,
>>rather than the Vss, or it's the same?
>
>Unlikely to matter and unlikely to be especially significant if it did matter.
>In both cases you have two series C's with a capacitor (imperfect) between
>them. As you are not connecting to the midpoints you can't tell what order
>the components are in.

I disagree.. Done right, you create a "tee" filter using the lead inductances.
Done wrong, you add inductance in series with the cap on the gnd side.

It's a couple dB difference at <1MHz


2005\03\04@104256 by Russell McMahon

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>By the way, there are practical cases when one of the capacitor leads
>cannot be as short as the other.
>In such cases, it is better to make the Vdd one as short as possible,
>rather than the Vss, or it's the same?

>>Unlikely to matter and unlikely to be especially significant if it
>>did matter.
>>In both cases you have two series C's with a capacitor (imperfect)
>>between them. As you are not connecting to the midpoints you can't
>>tell what order the components are in.
>
> I disagree.. Done right, you create a "tee" filter using the lead
> inductances.
> Done wrong, you add inductance in series with the cap on the gnd
> side.
>
> It's a couple dB difference at <1MHz

I think we are answering different questions.
I took the question at face value to mean that the CAPACITOR LEADS
were different lengths.
You took the interpretation (and I see it is more likely to be the
correct one) that the track lengths to the IC are different. I agree
that at that stage you can start to build circuits that are different.


       RM

2005\03\04@112426 by Vlad

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On Fri, Mar 04, 2005 at 11:00:12AM +1300, Russell McMahon wrote:
> In all cases, keep capacitor lead lengths as short as possible and
> mount capacitors as near IC power pins as possible. In critical
> applications use one capacitor per IC.

In the case of smaller PICs, such as the 16f628, Vdd and Vss are at
opposite ends of the chip - symmetrically, right across from each other.

Would it make sense to put the cap hidden inside a chip socket (if a
socket is used in the design) with one lead to Vss and the other to Vdd?

I think that configuration would give you the shortest trace possible.

Although perhaps that is not considered good engineering practice as
components are now hidden and possibly harder to debug when troubles
arise.

-v

2005\03\04@114122 by Dave VanHorn

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At 10:16 AM 3/4/2005, Russell McMahon wrote:
{Quote hidden}

I talk about this on my web page.
Between the die and the cap, you're stuck with a certain minimum lead length.
But, you can re-distribute half of it.

But in all cases, the overall length needs to be minimized, and dumping the
cap into a ground plane at the VCC pin may or may not accomplish that.  I
would contend that it can be worse than the method I described.




2005\03\04@114713 by Dave VanHorn

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>
>In the case of smaller PICs, such as the 16f628, Vdd and Vss are at
>opposite ends of the chip - symmetrically, right across from each other.
>
>Would it make sense to put the cap hidden inside a chip socket (if a
>socket is used in the design) with one lead to Vss and the other to Vdd?
>
>I think that configuration would give you the shortest trace possible.

You do, but even then, you can get better.

What you want, is for VCC to go to the cap, and then to the chip.
You don't want VCC to go across the top of a circuit that is the cap, plus
lead inductance.

Imagine a "T" where VCC enters on the left, and the chip connects on the right.
The cap is at the bottom. This puts almost all the lead inductance in place
making the bypass cap less effective.
 The ideal connection is a "V" where you force ALL the current to pass the
cap.
Now the lead inductances form a "tee filter" and actually help you.

Panasonic and others, make three leaded ceramic caps, and SMD caps with
three and four leads, for this purpose.
The connection is actually made inside the cap.

If the PCB ground layout supports it, these can give you large reductions
in EMI.



2005\03\04@122904 by Bob Ammerman

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----- Original Message -----
From: "Vlad" <.....vladKILLspamspam@spam@doom.net>
To: "Microcontroller discussion list - Public." <piclistspamKILLspammit.edu>
Sent: Friday, March 04, 2005 11:24 AM
Subject: Re: [EE] Bypass capacitor value


{Quote hidden}

Sockets are available with such capacitors built into them.

Bob Ammerman
RAm Systems


2005\03\04@125040 by Dave VanHorn

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>
>Sockets are available with such capacitors built into them.

The dip versions with the cap stretched between 14/7 are better than
nothing, but not as good as a good layout.

I did see some that sat under the chip, and were large plates with
connections at VCC and Gnd.
THOSE I would buy.  But, I think a conventional cap is less expensive, and
probably nearly as effective.


2005\03\04@144650 by Vlad

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On Fri, Mar 04, 2005 at 11:46:59AM -0500, Dave VanHorn wrote:
> >In the case of smaller PICs, such as the 16f628, Vdd and Vss are at
> >opposite ends of the chip - symmetrically, right across from each other.
> >
> >Would it make sense to put the cap hidden inside a chip socket (if a
> >socket is used in the design) with one lead to Vss and the other to Vdd?
> >
> >I think that configuration would give you the shortest trace possible.

This is what I had in mind:

      Vss ----------++---------- Vdd 5v
                    ||
               +----++----+
               |1   ||  18|
               |    ||    |
               |    ||    |
               |    ||    |
               |5---)|--14|
               |   -  +   |
               |   0.1uF  |
               |  ceramic |
               |9       10|
               +----------+
                  16F628

Or maybe even:

         Vss |              | Vdd 5v
             |              |
             | +----------+ |
             | |1       18| |
             | |          | |
             | |          | |
             | |          | |
             +-+5---)|--14+-+
               |   -  +   |
               |   0.1uf  |
               |  ceramic |
               |9       10|
               +----------+
                  16F628

{Quote hidden}

Would you mind sharing your version in ASCII?

Take care
-v

2005\03\04@193233 by olin_piclist

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John J. McDonough wrote:
> When you go above 0.1, you are typically getting into
> capacitors with fairly high inductance which sort of defeats the
> purpose,

This is a lot less of an issue with modern small surface mount ceramic
capacitors.  1uF is now about as cheap as 100nF and both have better
properties than their counterparts did just a couple of years ago.  The
construction of multilayer ceramic SMD caps is inherently very low
inductance.  The small size afforded by modern ceramics helps too.  Check
out the specs of a 1uF 15V 0603 ceramic cap and compare it to a "standard"
leaded 100nF cap of a couple of years ago.


*****************************************************************
Embed Inc, embedded system specialists in Littleton Massachusetts
(978) 742-9014, http://www.embedinc.com

2005\03\05@055034 by ThePicMan

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At 11.24 2005.03.04 -0500, you wrote:
>On Fri, Mar 04, 2005 at 11:00:12AM +1300, Russell McMahon wrote:
>> In all cases, keep capacitor lead lengths as short as possible and
>> mount capacitors as near IC power pins as possible. In critical
>> applications use one capacitor per IC.
>
>In the case of smaller PICs, such as the 16f628, Vdd and Vss are at
>opposite ends of the chip - symmetrically, right across from each other.
>
>Would it make sense to put the cap hidden inside a chip socket (if a
>socket is used in the design) with one lead to Vss and the other to Vdd?

Been there, done that.


>I think that configuration would give you the shortest trace possible.

IMHO too.


>Although perhaps that is not considered good engineering practice as
>components are now hidden and possibly harder to debug when troubles
>arise.

I wouldn't nag too much about that, expecially if it's YOUR design. ;)

TPM

2005\03\06@213455 by Howard Winter

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On Fri, 4 Mar 2005 11:24:25 -0500, Vlad wrote:

> Would it make sense to put the cap hidden inside a chip socket (if a socket is used in the design) with one
lead to Vss and the other to Vdd?

Back in the Good Old Days when the 74LS series was king, you could get IC sockets that had a decoupling
capacitor built-in (most of the 74s had the power and 0V pins at the extreme diagonal pins, 14 & 7, 16 & 8,
whatever).  They weren't cheap, but they made it quicker and more reliable when prototyping.  I haven't seen
them for years, though.

Cheers,



Howard Winter
St.Albans, England


2005\03\07@030811 by Jinx

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> Back in the Good Old Days when the 74LS series was king, you could
> get IC sockets that had a decoupling capacitor built-in (most of the 74s
> had the power and 0V pins at the extreme diagonal pins, 14 & 7, 16 & 8,
> whatever). They weren't cheap, but they made it quicker and more reliable
> when prototyping.  I haven't seen them for years, though

RS have 0.02 and 0.03uF low inductance types. Well, in the 1994 catalogue
with the "will be discontinued when stocks run out" black box beside all of
them. Which I guess they did because they ain't in the catalogues no more. I
do remember them being a tad pricey, as you say and don't recall ever coming
across them in any board I ever stripped for parts or repaired. It was
always
a small cap at the end of the IC. In that 1994 catalogue there are eight 74
types including STD, with LS being the most populated column. In the 2004
catalogue there are 27 types - STD is gone and ALS, HC and HCT are
more common than LS

2005\03\07@120659 by Mark Rages

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On Fri, 4 Mar 2005 14:46:49 -0500, Vlad <.....vladKILLspamspam.....doom.net> wrote:
{Quote hidden}

You guys really like to over-engineer stuff.  A 0.1 uF chip reasonably
near the power pins should take care of almost any circuit a PIC would
be involved in.  For extra decoupling, put 10 ohms in series with the
Vdd supply (before the capacitor). Don't worry about custom chip
sockets etc.  You Ain't Gonna Need It (tm).

Regards,
Mark Rages
markrages@gmail
--
You think that it is a secret, but it never has been one.
 - fortune cookie

2005\03\07@121732 by Dave VanHorn

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>
>You guys really like to over-engineer stuff.  A 0.1 uF chip reasonably
>near the power pins should take care of almost any circuit a PIC would
>be involved in.  For extra decoupling, put 10 ohms in series with the
>Vdd supply (before the capacitor). Don't worry about custom chip
>sockets etc.  You Ain't Gonna Need It (tm).

It's not "over engineering", it's simply getting the best result for the
same dollars.
10 ohms resistive could cause serious problems, if any of the chip's
outputs are even slightly loaded, and even just a capacitive load.



2005\03\07@123734 by Mark Rages

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On Mon, 07 Mar 2005 12:17:38 -0500, Dave VanHorn <EraseMEdvanhornspam_OUTspamTakeThisOuTdvanhorn.org> wrote:
> >
> >You guys really like to over-engineer stuff.  A 0.1 uF chip reasonably
> >near the power pins should take care of almost any circuit a PIC would
> >be involved in.  For extra decoupling, put 10 ohms in series with the
> >Vdd supply (before the capacitor). Don't worry about custom chip
> >sockets etc.  You Ain't Gonna Need It (tm).
>
> It's not "over engineering", it's simply getting the best result for the
> same dollars.
> 10 ohms resistive could cause serious problems, if any of the chip's
> outputs are even slightly loaded, and even just a capacitive load.

Obviously, it's not appropriate for power circuits.  But it was
standard procedure for logic circuits when I was designing pagers and
cell phones. The resistors keep the power bus clean for best RF
performance.  They're cheap enough for mass production.  They make
troubleshooting a current hog easy.

For capacitive loads, make sure the bypass cap is appropriately larger
than the load capacitance, so it can supply the current for
transitions.

Regards,
Mark
markrages@gmail
--
You think that it is a secret, but it never has been one.
 - fortune cookie

2005\03\07@124629 by Harold Hallikainen

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I do remember people selling sockets with bypass capacitors in them. Never
used them, but I did (30 years ago) design a product that used Rogers
micro Q capacitors (I think I still have some). These were flat capacitors
that fit under the chip (or chip socket) and had leads that dropped in the
same circuit board holes as the chip. Since the capacitor plates were the
full area under the chip, the lead length and ESL were pretty low. Also,
you didn't have to put in more holes and routing for bypass capacitors.
Rogers also made (and I think still does) capacitive power supply bus
distribution systems. These thin thingees stood vertically on your board
and had leads sticking down through the board now and then. They
distributed power over the board AND acted as a distributed bypass
capacitor. I used these in a product that had a large board full of TTL
chips.

Today, I just stick a 220nF capacitor right next to each chip.

Harold


--
FCC Rules Updated Daily at http://www.hallikainen.com

2005\03\07@180011 by William Chops Westfield

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On Mar 7, 2005, at 9:37 AM, Mark Rages wrote:

>> 10 ohms resistive could cause serious problems, if any of the chip's
>> outputs are even slightly loaded, and even just a capacitive load.
>
> it was standard procedure for logic circuits when I was
> designing pagers and cell phones. The resistors keep the
> power bus clean for best RF performance.

Ah.  Keeping the power bus clean, and keeping the chip being powered
happy, are two separate issues!  Most of our designs are more likely
to have a chip glitching itself, rather than the nearby chips, so the
resistor probably isn't a good idea.  But it's very interesting to
keep in mind with analog and/or RF in the same design...

Thanks
Bill W

2005\03\07@180803 by Dave VanHorn

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>
>Ah.  Keeping the power bus clean, and keeping the chip being powered
>happy, are two separate issues!  Most of our designs are more likely
>to have a chip glitching itself, rather than the nearby chips, so the
>resistor probably isn't a good idea.  But it's very interesting to
>keep in mind with analog and/or RF in the same design...

Yes, I've used it in place of an inductor, when I could tolerate the I^2R
loss, because R's are so much less expensive than L's..  Still, you can't
apply this willy-nilly.


2005\03\09@034756 by ThePicMan

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At 11.06 2005.03.07 -0600, you wrote:
{Quote hidden}

You like to miss-engineer stuff. Better yet a ferrite bead. ;->


>Regards,
>Mark Rages
>markrages@gmail
>--
>You think that it is a secret, but it never has been one.
>  - fortune cookie
>-

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