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'[EE] ADC development module recommendations'
2008\11\25@105326 by Marcel Birthelmer

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Hi list,
for a school project, I would like to implement some digital signal
processing in an FPGA. To accomplish that, I'm in need of an ADC front-end,
and for reasons of development time and lack of experience, I would like to
go with a manufacturer's development module. My (optimistic) requirements
are thus:

1) I need to capture signals of  1MHz or so, so 2+ MSPS, at 16+ bits of
resolution
2) I am not a large corporation, so something that's easily available
3) I am but a poor student, so something < $100

So if any of you have experience with anything that matches the above and
can make a recommendation, please do so. Of course, if you have any boards
laying around that you're not using, I won't say no to that, either.

Thanks,
- Marcel

2008\11\25@111441 by Martin

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Marcel Birthelmer wrote:
> Hi list,
> for a school project, I would like to implement some digital signal
> processing in an FPGA. To accomplish that, I'm in need of an ADC front-end,
> and for reasons of development time and lack of experience, I would like to
> go with a manufacturer's development module. My (optimistic) requirements
> are thus:
>
> 1) I need to capture signals of  1MHz or so, so 2+ MSPS, at 16+ bits of
> resolution
> 2) I am not a large corporation, so something that's easily available
> 3) I am but a poor student, so something < $100
>
> So if any of you have experience with anything that matches the above and
> can make a recommendation, please do so. Of course, if you have any boards
> laying around that you're not using, I won't say no to that, either.
>
> Thanks,
> - Marcel


I've used a Spartan 3 FPGA board from Digilentinc with a plug-in A/D
converter board:
<digilentinc.com/Products/Detail.cfm?Prod=S3BOARD>
<digilentinc.com/Products/Detail.cfm?Prod=MIB>
<http://digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD1>

Runs at 1 MSPS though. Use the S3BOARD + MIB and wire in an A/D eval.
board from National or other.

-
Martin

2008\11\25@112025 by Alan B. Pearce

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>for a school project, I would like to implement some digital
>signal processing in an FPGA. To accomplish that, I'm in need
>of an ADC front-end, and for reasons of development time and
>lack of experience, I would like to go with a manufacturer's
>development module. My (optimistic) requirements are thus:
>
>1) I need to capture signals of  1MHz or so, so 2+ MSPS, at
>16+ bits of resolution

You will be lucky to find something with higher than 16 bit resolution.

I would suggest you look at Analog Devices. They have a wide range of ADC
units, and are prepared to sample chips, depending on chip cost at no cost
to you. They have a range of parallel and serial interface devices, so you
should be able to select something that would suit.

An alternative supplier would be Linear Technology, who also do a range of
ADC stuff, but not sure if they have anything with that many bits at speed.
10, 12 and 14 bits are the most common. Often when you do find a 16 bit
device, digging into the specifications suggests that it often isn't more
accurate than a 14 bit one due to linearity, tempco, or some other factor.

http://www.analog.com/
http://www.linear.com/index.jsp

2008\11\25@125409 by Marcel Birthelmer

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Martin and Alan,
thanks for your responses.

To clarify, what I'm looking for is an ADC module (a development board), not
just a chip - that is, something that takes care of power supply etc, and
just provides interfaces for the analog and digital I/O.
The application is an AM radio, so I'd like to be able to receive at least
600-1000kHz signals. This creates a lower bound of about 2MSPS.

I saw that TI has some development boards starting around $99 with chips
that would meet my criteria, so I may get one of those in the next few days.

Regards,
- Marcel

2008\11\25@134538 by Martin

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Marcel Birthelmer wrote:
> Martin and Alan,
> thanks for your responses.
>
> To clarify, what I'm looking for is an ADC module (a development board), not
> just a chip - that is, something that takes care of power supply etc, and
> just provides interfaces for the analog and digital I/O.
> The application is an AM radio, so I'd like to be able to receive at least
> 600-1000kHz signals. This creates a lower bound of about 2MSPS.
>
> I saw that TI has some development boards starting around $99 with chips
> that would meet my criteria, so I may get one of those in the next few days.
>
> Regards,
> - Marcel

What's your front-end look like?
You can't just feed an antenna into an ADC and expect to get a good
signal (or any).. I'm not an RF guru but you at least need an input
filter (band-pass) and maybe (maybe, it's a modern idea) - just a
first-stage amplifier if you're going for direct conversion. I'm not
sure if this works the same for AM. I'm not an RF wizard.

Normally, an RF amplifier has a local oscillator (or two) that gets
mixed with the input signal. A low pass filter then removes the high
frequency parts so you're left with audio-range frequencies. You'd then
only have to sample at something like 48kHz.

If I were you I'd first work on how you're going to receive the RF in
the first place. Get an ARRL Handbook and also read about the
"SoftRock-40" project. <http://www.amqrp.org/kits/softrock40/>

-
Martin

2008\11\25@140033 by Marcel Birthelmer

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Martin,
my objective is to do as much as I can in software/FPGA. That is, I get the
digitized antenna feed (the ADC input stage itself will probably require a
LPF, but that's it), tune/detect/filter it using DSP magic, and spit out
some sort of signal to an audio DAC.
I realize that this is not the way "proper" radios work. The reason I chose
AM is that its frequency band is still digitizable - I don't have to mix it
down like I would with FM or whatever.
But I'm still reading as I go, and you're right, it may be unfeasible the
way I have it planned right now.
Thanks,
- Marcel

What's your front-end look like?
{Quote hidden}

> -

2008\11\25@150727 by PAUL James

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Martin,

I'm not sure what you have in mind exactly, but I believe you may be
either misinformed, or uninformed.

Take this quote "The reason I chose AM is that its frequency band is
still digitizable - I don't have to mix it down like I would with FM or
whatever."

I'm not sure what you mean here by "its frequency band is still
digitizable".  Unless you mean that since you are dealing with AM, you
only have amplitude to be concerned about.  And that indeed is
digitizable.  However, FM is also just as digitizable.

And where you say I don't have to mix it down like I would with FM or
whatever.".  What does that mean?  In a typical radio receiver, there
are a wide range of frequencies that need to be receivable, and
decodable.  One problem with amplification for various radio circuits is
that at the frequencies involved, there is a substantial dependency on
frequency regarding the amplification factor of a given stage.  To
aleviate this problem to a great extent would be to have a fixed
frequency to amplify.  This would give the needed amplification, but not
have to worry about the frequency dependency.  Now, how can that single
frequency be obtained, and still convey the original information that
was to be conveyed via the radio channel?  Through the process of
hetrodyning.  How this works is that there are two (at least) circuits
that are tuned when you change the frequency dial on a radio.  One of
these circuits is the tuned circuit that selects the frequency that you
want to receive.  The second is the Local Oscillator.  The L.O. is
tuned, in the case of the AM broadcast band in the US, 455 Khz higher
than the frequency of choice.  The L.O signal, and the tuned radio
signal are mixed in a non linear component.  The output of this circuit
contains 4 frequencies.  The original signal tuned, the L.O signal, The
difference between the L.O and the tuned signal, and the sum of the L.O
and the tuned signal.  Through filtering, the difference signal is
preserved and sent to the I.F amplification stages.  The I.F, or
intermediate frequency, stages has a single frequency to work with,
namely 455 Khz.  So this signal is amplified many hundreds to thousands
of time in the IF stage, and then sent to the detector, where is is
detected (rectified), and sent to the AF (Audio Frequency) amplifier(s).


That is the main reason in US AM broadcasting for mixing an RF frequency
down.  A direct conversion set operates basically the same way except
that it doesn't really use the IF stages.  In the Direct conversion
receiver, the incoming and the L.O. frequency differes by only the audio
range.  Therefore,
When you tune a signal from the air, the L.O is only audio frequencis
away from the incoming frequency.  When they are mixed as above, they
produce 4 frequencies also.  But here the audio difference is sent
through to the A.F stages.  All the other frequencies are eliminated by
filtering.  And you hear the original performance as it was intended
when broadcast.  Of course, this "as it was intedned when broadcast is
contingent on the bandwidth of the receiver and the original signal.
Suffice it to say, it will sound very limited in audio bandwidth because
of the receiver design, but mostly because of the limitations of the
badwidth limits of the broadcasted signal which is dictated by the FCC.

Anyway, this is a long winded way of describing why mixing and
downconverting are needed and how they work.

If you have any other questions, just ask.  Either myself, or one of the
other very knowledgable people on this list, will try to answer you.


       
Regards,

       
Jim




{Original Message removed}

2008\11\25@192546 by Marcel Birthelmer

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On Tue, Nov 25, 2008 at 12:06 PM, PAUL James <spam_OUTJames.PaulTakeThisOuTspamcolibrys.com>wrote:

>
> Martin,


Martin is just an innocent bystander, I'm the newbie here.

>
>
> I'm not sure what you have in mind exactly, but I believe you may be
> either misinformed, or uninformed.


Probably both.

{Quote hidden}

My point was that it's much easier to sample and digitize a 1MHz (AM Radio)
signal than a 100MHz (FM Radio) signal.

>
> And where you say I don't have to mix it down like I would with FM or
> whatever.".  What does that mean? [snip]


Jim, thank you very much for the detailed explanation. I am somewhat
familiar with how radios work, but my plan was not to build a receiver, but
more specifically to implement as much of a receiver as possible in an FPGA.

By "mix it down" I meant the frequency shifting process (the LO part, I
think). My plan is/was to take a raw 1MHz signal (obviously processed for
the ADC stage), and do the frequency tuning, detecting, and low-pass
filtering by means of digital transformations. So basically instead of using
the LO, the idea would be to convolve the incoming signal with a band pass
filter. Likewise for all the other steps.

I understand that this is not the way radios are commonly built, but it's
mainly a learning exercise anyway.

Of course, it may very well not be feasible, and I'd appreciate any further
insight (or flames for my RF-level incompetence).

Thanks again for your time.
- Marcel

2008\11\25@200305 by Richard Prosser

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Marcel
If you Google "Software Radio" you will find a heap of information on
similar projects. (Mostly using DSPs etc rather than FPGA, but the
idea's the same).

RP

On 26/11/2008, Marcel Birthelmer <.....marcelKILLspamspam@spam@carrietech.com> wrote:
{Quote hidden}

> --

2008\11\26@055431 by William \Chops\ Westfield

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On Nov 25, 2008, at 12:06 PM, PAUL James wrote:

>  In a typical radio receiver


I think he said this, but just to make it clear:

He's not building a "typical radio"; he wants to digitize the actual  
RF signal, and do all the processing that would normally happen post-
RF, digitally, in an FPGA.  I don't know exactly how one does this  
(especially WRT "tuning"), but it seems to be one of those "up and  
coming" things.  As someone else said, see "Software Radio."

BillW

2008\11\26@075916 by olin piclist

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Marcel Birthelmer wrote:
> My plan is/was to take a raw 1MHz signal (obviously
> processed for the ADC stage), and do the frequency tuning, detecting,
> and low-pass filtering by means of digital transformations.

While this is in theory possible, it's going to be tough given the speeds
required.  You will need to sample at around 3MHz at least.  Do you really
have the processing capability to do meaningful things at around 300nS per
sample?

Even if you can manage to get enough processing power by using a FPGA,
amplifying the broadband antenna signal to A/D input levels won't be easy.
These signals are tiny.  This is done economically in normal radios by using
resonant amplifiers.  With resonance you can get a much better signal to
noise ratio but at a narrow band.  This is what made heterodyne radios so
common.  Most of the gain comes from the IF amp, which runs at a fixed known
frequency.  Your amp is completely before any tuning and has to amplify all
frequencies in the AM band, from about 550KHz to 1.7MHz.  Look at the gains
required and do some signal to noise ratio calculations.

Another problem will be the very large dynamic range of amplitudes coming
from the antenna for valid signals.  You can only amplify to the point where
the strongest signal causes the result to clip.  Once that clips, parts of
the other stations are lost and no amount of clever filtering can recover
the lost information.  Even if you adjust the input amp gain so that the
peaks just cover the A/D range, the signal from weak stations will be many
dB down.  If the amp isn't nearly perfect and has some cross modulation
distortion, you will get phantom "stations" all over the band.

> So
> basically instead of using the LO, the idea would be to convolve the
> incoming signal with a band pass filter.

Yikes!  That's certainly not how I'd go about it.  Remember, you only have
around 300nS to spend per sample.  That won't allow a lot of filter kernel
points.

> I understand that this is not the way radios are commonly built, but
> it's mainly a learning exercise anyway.

One of the many fun projects I've had in the back of my mind for a while
(that's the problem with fun projects, there are always more important
projects ahead of them) is to make a WWVB receiver and NTP server with a
dsPIC.  At 60KHz carrier, the electronics are just a bit past the audio
range and the sample and processing rates should be something a dsPIC can
handle.

I'm thinking a resonant ferrite antenna tuned to 60KHz with a amp that rolls
off either side of 60KHz but is not highly tuned or resonant.  This goes
into the A/D and the rest is software.

Demodulation is done by multiplying the incoming signal by a internally
generated sine and cosine at 60KHz.  These are easily low pass filtered,
essentially giving a very narrow reception band around 60KHz.  After the
filters, the signals are squared and added.  The result is proportional to
received power.  This is the square of a normal AM demodulated signal, but
should be fine for discriminating between the digital high and low carrier
levels.  If you wanted true AM demodulation, you'd have to take the square
root of the result and high pass filter to remove DC.

The process I described sounds tractable in a FPGA since it can be
pipelined.  The two sine and cosine multiplies can be concurrent, and the
results passed to the next pipeline stage, then the filter, squaring,
adding, and square root (think lookup table), and high pass filter after
that can each be a separate pipeline stage if necessary and can therefore
each take the 300nS you have per sample.  For a real radio you probably want
to insert a AGC stage somewhere.  You want to keep the input to the square
root nicely bounded.


********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
(978) 742-9014.  Gold level PIC consultants since 2000.

2008\11\30@085141 by John Ferrell

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It does not fit your plans but I think you would like to become acquainted
with the Software Defined Radio Group on Yahoo.com. Kits are available for
about $15 and they really do work! Even those of us who are Morse Code
deficient can get a lot out of it. By using the +5 volts from an extra disk
drive connector in the PC it is a very quick and easy project. It also is a
good introduction to building with SMT.

John Ferrell    W8CCW

"All that is necessary for the triumph of evil is for good men to do
nothing." -- Edmund Burke
http://DixieNC.US

{Original Message removed}


'[EE] ADC development module recommendations'
2008\12\01@144014 by Marcel Birthelmer
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Thanks to all of you, especially Olin and Jim for their detailed responses.
Based on some further research of my own (which probably should have
preceded my posting to the list) as well as comments by Olin and others,
I've decided that this project is too large in scope, complexity, and
engineering obstacles for me at this point. On the up side, I definitely
learned quite a bit about radio in general and software radio specifically.
Thanks again for your time and input.
Regards,
- Marcel

2008\12\01@145852 by Martin

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Marcel Birthelmer wrote:
> Thanks to all of you, especially Olin and Jim for their detailed responses.
> Based on some further research of my own (which probably should have
> preceded my posting to the list) as well as comments by Olin and others,
> I've decided that this project is too large in scope, complexity, and
> engineering obstacles for me at this point. On the up side, I definitely
> learned quite a bit about radio in general and software radio specifically.
> Thanks again for your time and input.
> Regards,
> - Marcel

Hey Don't give up! Work on one step at a time. Pick a couple projects
that incorporate different parts of what you want to complete. In a year
or two revisit your original concept.

-
Martin

2008\12\01@152732 by olin piclist

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Martin wrote:
> Hey Don't give up! Work on one step at a time. Pick a couple projects
> that incorporate different parts of what you want to complete. In a
> year or two revisit your original concept.

Yeah, what he said.

How about the WWVB receiver I sortof described?  That sounds reasonably in
range for a college senior digital radio project.  The advantages are that
the carrier frequency is known up front (60KHz), and is slow enough that the
carrier can be sampled and processed directly by a dsPIC.

If you sample at 200KHz, then you get 147 instructions per sample with a
common 7.3728MHz crystal and the 16x internal PLL.  Since the dsPIC can do a
16 x 16 --> 32 bit multiply in a single cycle, this sounds doable.

I can go into more detail on the demodulation algorithm if you're
interested.


********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
(978) 742-9014.  Gold level PIC consultants since 2000.

2008\12\01@160122 by Marcel Birthelmer

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Olin,
it does sound interesting, but this project is an FPGA one specifically, not
a DSP one (it's for a VHDL class). So I would still have to implement the
entire DSP pipeline in the FPGA. I'll probably end up doing something much
much simpler, in the interest of getting it finished in time, and because
the instructor doesn't expect anything significant.
But I am definitely interested in DSP at this point, so maybe a later
project...
Thanks,
- Marcel

On Mon, Dec 1, 2008 at 12:27 PM, Olin Lathrop <.....olin_piclistKILLspamspam.....embedinc.com>wrote:

{Quote hidden}

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