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'[EE]:Current on a PCB'
2000\05\30@055318 by Andrew Seddon

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Could anybody tell me what the recommended minimum track widths are for
different current values. A general case formula or rule of thumb would be
great but specifically around 0.4-0.5 amps.

Thanks.

2000\05\30@062430 by Mark Willis

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IIRC on a 2Oz board, 10 mils will do for this;  Aaah.
http://www.aracnet.com/~gpatrick/ (from a post in the archives by Peter
Keller) - 5 mils will do you on a 1Oz board (1 mil = 0.001 inch, FWIW.)

Glenn Golden had, as raw numbers with no PCB copper thickness added,
> 0.010 INCH - 0.8A
> 0.015 INCH - 1.2A
> 0.020 INCH - 1.5A
> 0.025 INCH - 1.7A
> 0.050 INCH - 3.2A
> 0.100 INCH - 4.8A
> 0.150 INCH - 6.0A

Marcelo Puhl had,
{Quote hidden}

I have yet another set of similar numbers in my palmtop that I usually
refer to <G>

Be sure to degrade for middle layers of a 3+ layer PC board, BTW.

I usually go with 10+ mil traces, a little extra current capacity is not
a bad thing...  (When printing on a 300DPI laser, you want at least 3
pixels or so of width in the toner for clean continuous traces.
Probably can get away with 2, BUT, ...  12.5 mil traces on 25 mil
centers gives you about 2A peak, and about 300V insulation between
traces - better than I usually need for small boards.)

 Mark

Andrew Seddon wrote:
> Could anybody tell me what the recommended minimum track widths are for
> different current values. A general case formula or rule of thumb would be
> great but specifically around 0.4-0.5 amps.
>
> Thanks.

2000\05\30@070245 by Alan B Pearce

face picon face
It depends on what voltage drop and temperature rise you can deal with. Others
have posted trace widths which can carry the current without fusing, but you
will need to consider these other items as well. Usually it comes down to a case
of use the widest trace you can in the PCB area you have.

2000\05\30@073844 by David Kott

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> Could anybody tell me what the recommended minimum track widths are for
> different current values. A general case formula or rule of thumb would be
> great but specifically around 0.4-0.5 amps.

I use a nice calculator that UltraCAD corp. has made available.  It will
solve for tracewidth, temperature rise, ampacity, width and thickness of
copper.

http://www.ultracad.com/pcbtemp.zip

-d

2000\05\30@102414 by TOM THERON

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I did some PCB's  for power applications a while ago, and we handle up to
30A in tracks with 70 micron copper and 10mm MINIMUM width. However, where
possible we fill out areas to act as heatsinks, i.e. some places tracks are
30mm wide.

It is not only the track width that has an impact, but also the length,
since the resistance is a function of the whole track area, and this
influences the actual heat dissipation (IIR).

Tom Theron

2000\05\30@112808 by Bob Blick

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www.apcircuits.com/html/amperage.html

A big jpeg of a graph that shows temperature rise, current, and trace
width.

Sometimes the more important thing to consider is the voltage loss, or
the integrity of your ground traces(especially if you have any analog
stuff going on).

Cheers,

Bob

2000\05\30@121628 by Jilles Oldenbeuving

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Resistance will determine the heat-dissipation, but not the temperature
rise,.
Becouse how longer the track, the more the heat-dissipation will be
distributed
along the track...


Regards,

Jilles Oldenbeuving
spam_OUTjillesTakeThisOuTspamrendo.dekooi.nl
-----Oorspronkelijk bericht-----
Van: TOM THERON <.....mmsesysKILLspamspam@spam@ICON.CO.ZA>
Aan: PICLISTspamKILLspamMITVMA.MIT.EDU <.....PICLISTKILLspamspam.....MITVMA.MIT.EDU>
Datum: dinsdag 30 mei 2000 16:27
Onderwerp: Re: [EE]:Current on a PCB


{Quote hidden}

2000\05\30@135440 by Chris Eddy

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Just curious...

Now that we can get heat rise on a trace, which I had some data on before, what
is a safe operating temperature?  If board browning or mask discoloration is the
primary limitation for your design, at what absolute temperature does the mask
begin to be damaged?  If we know the absolute temperature, then we know the
ambient+rise.

Any experience with this?

Chris Eddy

2000\05\30@140846 by Dan Michaels

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........
>
>Now that we can get heat rise on a trace, which I had some data on before, what
>is a safe operating temperature?  If board browning or mask discoloration
is the
>primary limitation for your design, at what absolute temperature does the mask
>begin to be damaged?  If we know the absolute temperature, then we know the
>ambient+rise.
>

The general bent of this thread seems a little strange to me.

As a general rule of thumb in electronics, it seems reasonable to
allow 2-3x safety margin on most critical design decisions - especially
those concerning power dissipation levels. It would seem that even so
much as thinking about driving traces to the point where they are
heating up or glowing or discoloring the pcb might be like flying
too close to the sun on waxed wings.

2000\05\30@162130 by rottosen

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Dan Michaels wrote:
{Quote hidden}

Obviously, visable signs of damage to the PCB are not wht you use for a
good design goal. So, what *would* you use as the limiting factor(s) for
temperature and power dissipation of the trace?

-- Rich

2000\05\30@223517 by Dan Michaels

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Richard Ottosen wrote:
....
>>
>> As a general rule of thumb in electronics, it seems reasonable to
>> allow 2-3x safety margin on most critical design decisions - especially
>> those concerning power dissipation levels. It would seem that even so
>> much as thinking about driving traces to the point where they are
>> heating up or glowing or discoloring the pcb might be like flying
>> too close to the sun on waxed wings.
>
>
>Obviously, visable signs of damage to the PCB are not wht you use for a
>good design goal. So, what *would* you use as the limiting factor(s) for
>temperature and power dissipation of the trace?
>

Richard,

Having seen a few pcbs with this type of "indicator" [ie, fried traces],
I have to agree with you. My general approach [which may not be the
best of all possible worlds] is iterative. I figure it takes a couple
of cuts to get it right [others may disagree here].

As I alluded to above, I would measure or estimate the max current
to be conducted by the trace, and look in the table and select a geometry
that would provide "at least" 2-3x safety margin. More if allowable.
This is also how I choose resistor wattages, among other things.

I personally would not design any closer than that to the ragged edge.
Then, build it and see how it goes. Next cut may need adjusting in some
cases. [Is this approach too imprecise?? - I'm sure there are different
tribes of opinion here - things like "safety margin" are opinion
oriented].

best regards,
- Dan Michaels
==============

2000\05\30@223726 by Dmitry Kiryashov

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Hmm... What is heat dissipation ?

I guess it is dissipation of heat in air, right ?
So there is difference in temperatures in copper
and surround air. The higher temperature is around
the less heat can be dissipated for the same time.
As I remember there is also such a parameter as
thermal resistance (please correct me if I wrong,
I don't remember exact english term for that) It is
used in heatsink and so stuff design.

WBR Dmitry.

Jilles Oldenbeuving wrote:
{Quote hidden}

2000\05\30@235827 by Brian Kraut

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There used to be maximum currents for various trace widths on the AP Circuits
web site.  http://www.apcircuits.com

Dan Michaels wrote:

{Quote hidden}

2000\05\31@114306 by Dan Michaels

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Brian Kraut wrote:
>There used to be maximum currents for various trace widths on the AP Circuits
>web site.  http://www.apcircuits.com
>

Looking at those nomographs in a couple of books I have [one being H.
Johnson's "High-Speed Digital Design", p. 214] shows curves for 5degC -
100degC temp rises vs current in trace. Curves are linear on a log-log
plot. Roughly speaking, going from the 5degC curve to the 100degC curve
involves "only" a 3x increase in current. This is roughly the spectrum
from no problem to fusing the trace [or at least boiling water].

Thus, it would seem good practice to determine the worst case situation,
and then allow a good sized safety margin [2-3x min] in trace width
selection. This is fairly easy to do with pcb traces, since situations
requiring large currents generally involve physically large switching
components, like relays and transistors, so there is usually plenty of
room for wide traces. Traces can also be doubled, top and bottom of pcb,
and of course, heavier copper can be used for more severe cases.

best regards,
- Dan Michaels
==============

2000\05\31@144411 by Mark Willis

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I do it this way, just in case someone misunderstood me - keep seeing
posts that might indicate that:  I'm a "massive overkill style" sorta
guy <G>

This saves having to make another board when you were in a hurry and
some twerp stole your good test leads and that dang test probe slips and
shorts Vcc and Ground.  (We all heat shrink 90% of the test probes off
our DVM's, or use microclips, I'd bet.  Dingbat DVM manufacturers - who
wants test probes?  Ack.)

You don't get paid for removing copper, you get paid for the final
circuit working <G>

Tightest packing I ever use is 12.5 mil to 15 mil traces on 25+ mil
centers, for SMD CMOS gate to CMOS gate routing.  Usually 25 mil traces
on 100 mil centers (leaving room for a trace between pads where
needed.)  Keep the smaller traces as short as possible i.e. just for 50
mils or less as you go between pads on a DIL I.C., use 10 mils, then
back to wider traces.  Avoid that when you can, as it's a bear to FIX
that *when* that fusible link blows...

I use 35 mil traces at a minimum for Vcc/Ground.  Usually 50+ mils.  Or
just Flood Fill all unused space for a power/ground plane.

(Go 250 mils for a 1.5A power supply, right?  <G>)

If things go wrong, solder a piece (or even several) of wire wrap or #22
phone wire down atop the ground trace, to "enhance it's current carrying
capability somewhat".  It's a pain, almost never have to do that unless
space is really tight - Or, nightmare of nightmares, someone who doesn't
know what they're doing routes a bad PCB.  (Some people think you can
get away with 10 mil ground & Vcc traces that snake all over the board,
and things will work fine.  Well, even when you solder some #32 WW wire
down on that puppy, you still have problems, and the PCB Cad guy's your
worst problem <G>  Educate 'em, gently, on what the consequences are of
that thinking.)

Use despiking caps, large and small, then add more, and add some more
for fun;  Add more on a whim - any whim will do.  Get it working right,
then you can remove some them to lower costs, if the manager wants to
spend the time -  Engineering time costs too, and there's nothing like a
glitch to confuse you in your coding.  For quick prototypes, use SMD
parts when you can, if out you can take a scrap box through-hole part
(one of those with short, cut leads is good <G>), bend the leads and
solder it down SMD style - saves drilling more holes, works well too,
and is fast & cheap.

Put text on the PCB somewhere to remind you what the durn thing's for,
btw.  "Solder" and "Component" side markings (even "S" and "C"!) are
good ideas too, those'll save your sanity.  Also - design the boards so
they're not completely symmetrical, if you can (Ever seen someone turn
the solder side 180 degrees and it FITS?  That can really mess things
up!  Wasn't pretty.  Love learning vicariously on THAT sorta thing.)

Ground rings are good where applicable <G>

I mingle TH and SMD a lot, put LEDs & DE-9 connectors etc. on the edge
of the PCB, for example - it's quicker than drilling and works well;
Learned all that when I didn't have a drill press available for one job,
having just a few pin vices and elbow grease for drilling gets sorta
old.  You don't get extra points for working harder, just for working
smarter and faster.

Finally, cast the spec in quick-setting epoxy and wait for it to cure
before starting work, whenever possible <VBG>  (A spec that isn't set in
stone, is usually a spec that'll run away FAR faster than you can code
and design...)  It's "time to practice and re-train yourself" if they
don't have that set yet, you'll probably have to re-do things (maybe
you'll be lucky & can re-do it all in software, though.)

 Mark

2000\05\31@155657 by Dan Michaels

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Mark Willis wrote:
.....
(Some people think you can
>get away with 10 mil ground & Vcc traces that snake all over the board,
>and things will work fine.
......

Hard to imagine anyone would do this. Even though the nomograph
indicates you can run 750 mA thru such a trace, and only have a 10degC
temp rise, there are several "other" things to worry about. Trace series
R producing IR drops. Digital noise in this narrow channel. Inductive
effects of narrow trace width at hi speeds. Impedance issues. On and on.

2000\05\31@162425 by Mark Willis

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Dan Michaels wrote:
> Mark Willis wrote:
> .....
>  (Some people think you can
> >get away with 10 mil ground & Vcc traces that snake all over the board,
> >and things will work fine.
> ......
>
> Hard to imagine anyone would do this. Even though the nomograph
> indicates you can run 750 mA thru such a trace, and only have a 10degC
> temp rise, there are several "other" things to worry about. Trace series
> R producing IR drops. Digital noise in this narrow channel. Inductive
> effects of narrow trace width at hi speeds. Impedance issues. On and on.

Sure - All those things that total newbies haven't learned about yet -
Ability to use a CAD package does NOT imply exquisite knowledge of all
things electronic <G>

We've all had our "weird" experiences - I've had an argument with an
Honors EE 4th year student who argued that 10-turn panel pots didn't
exist, while sitting there *using* a Textronics 'scope that had several
on it's front panel (with locks);  I've accepted that people don't learn
everything and tried to focus on educating the spots they missed.  Many
colleges teach loads of "Book" knowledge - new EE graduates don't always
know about the real world things that Techs have learned (soldering, for
one <G>)  Happens.  Some of us are good on digital, some on analog, some
stronger or weaker on code or hardware, a little redundancy isn't always
a bad thing on the list <G>

 Mark

--
I re-ship for small US & overseas businesses, world-wide.
(For private individuals at cost; ask.)

2000\05\31@190744 by Andrew Seddon

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> Hard to imagine anyone would do this. Even though the nomograph
> indicates you can run 750 mA thru such a trace, and only have a 10degC
> temp rise, there are several "other" things to worry about. Trace series
> R producing IR drops. Digital noise in this narrow channel. Inductive
> effects of narrow trace width at hi speeds. Impedance issues. On and on.

I always thought that it was best to use the least ammount of copper you can
with digital logic, come to think of it I think I made this rule up myself
so any input appreciated. BTW I just got a board back from the shop, it has
8 mil ground and power traces. Seems to be working OK. I dind`t mean to do
it but it was a rush job and I fogot to manually route the power traces.

2000\05\31@212233 by Mark Willis

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Andrew Seddon wrote:
> > Hard to imagine anyone would do this. Even though the nomograph
> > indicates you can run 750 mA thru such a trace, and only have a 10degC
> > temp rise, there are several "other" things to worry about. Trace series
> > R producing IR drops. Digital noise in this narrow channel. Inductive
> > effects of narrow trace width at hi speeds. Impedance issues. On and on.
>
> I always thought that it was best to use the least ammount of copper you can
> with digital logic, come to think of it I think I made this rule up myself
> so any input appreciated. BTW I just got a board back from the shop, it has
> 8 mil ground and power traces. Seems to be working OK. I dind`t mean to do
> it but it was a rush job and I fogot to manually route the power traces.

You're using enough despiking caps, I take it <G>  You can get away with
a lot on 2Oz boards that won't work on a 1/2 Oz copper clad board, too,
due to 4x the copper thickness.  If it gives you fits, try my wire wrap
wire trick <G>  Bet you didn't route the power/ground wires last, too
<G>

Not much is wrong with using 65 mil traces or so for CMOS logic traces,
IME, it doesn't sour the behavior - 8 mils works fine as well if your
board shop's better than my laser printer works, for short runs
anyways.  Capacitance increases with larger traces, but 1/16" spacing is
fairly large WRT making large caps out of 65 mil traces - Inductance has
a lot to do with clock speed, want to minimize lengths for high speed
circuits, as you know.  Resistance can affect things.

Have to watch out more on 0.020" thick boards (Boeing Surplus sells a
lot of that - Sorta neat stuff, if fragile) as interlayer capacitance
would be lots higher due to 1/3 the plane separation.

One advantage of "fatter" traces for prototyping boards is that it's
easier to break the trace then SMD solder a series resistor in place
when you find you need it on a 40 mil trace than an 8 mil trace <G>
Each of us does a different, Niche market to some extent - you make a
prototype once-off board a little different than you make a production
board (I tend to do things like leaving places where I can drill through
the PCB to solder additional jumpers / components on, WHEN they're
needed due to a design change, on some boards, due to knowing the
designer's habits.  You don't do that on production boards, "usually"
<G>)

I'm no RF PCB expert, most of my board work's been either on fixing
existing boards (re-work is a pain, it does tend to show you what design
flaws people made and what parts blow / break most often -
Electrolytics, power resistors, UJT's / JFets / MOSFET's, occasionally
transistors.  Often CPU's that're attached to a keyboard without
protection networks (diodes or zeners) to protect the I/O pins -
Fortunate we are to be working with PICs <G>) or on new prototypes and
on re-working those - I haven't done a lot of production, 1000+ off
boards, I'm sure for those you do more trying to shrink the board, try
to stay with 1-sided PCB's, or go to truly tiny boards that're
multi-layer, depending, and try to minimize through holes, so not huge
differences as I already do a lot of that but not all <G>  More SMD and
smaller SMD lately, from what I see.  And BGA's, my nemesis <G>

 Mark


'[EE]:Current on a PCB'
2000\06\01@115133 by Dan Michaels
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Andrew Seddon wrote:
>> Hard to imagine anyone would do this. Even though the nomograph
>> indicates you can run 750 mA thru such a trace, and only have a 10degC
>> temp rise, there are several "other" things to worry about. Trace series
>> R producing IR drops. Digital noise in this narrow channel. Inductive
>> effects of narrow trace width at hi speeds. Impedance issues. On and on.
>
>I always thought that it was best to use the least ammount of copper you can
>with digital logic, come to think of it I think I made this rule up myself
>so any input appreciated. BTW I just got a board back from the shop, it has
>8 mil ground and power traces. Seems to be working OK. I dind`t mean to do
>it but it was a rush job and I fogot to manually route the power traces.
>

Andy,

Everything I have read indicates you have this exactly backwards. The
problems become more critcal as frequencies been used increase, and when
analog and digital are mixed on the same pcb.

The ideal case would be to have a multilayer board with gnd and power
planes. This gives you minimum possible IR drops in Vcc/Vss lines,
less possibility for heat buildup since planes act like heat sinks,
better overall bypassing since the planes act like distributed caps
[the smaller the vertical spacing between planes the better], smaller
inductive current loops so there is less brodcast EMI [high speed
signals follow the path of least "impedance"], on and on. Tiny traces
are going to be problematical in all of these areas.

I do mostly 2-layer boards, and typically use 70-100 mil traces for
gnd and 30-50 for Vcc. I run them on the upper surface of the pcb in
parallel with each other, directly under the ICs, with feeding from
teh same end of the pcb. The majority of chip interconnections go on
the lower surface. Also, with wide gnd traces, it is easier to run
hi-speed lines, such as clock signals, directly beneath the gnd trace
on the lower pcb surface. This helps to limit EMI generated by the
clock edges/etc.

On and on - this just scratches the surface. Howard Johnson's book
"High-Speed Digital Design A handbook of Black Magic" has lots more.
Expensive, but well worth the price.

best regards,
- Dan Michaels
Oricom Technologies
===================

2000\06\02@081424 by paulb

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Hello Andrew.

 Your date is a bit off!
--
 Cheers,
       Paul B.

2000\06\05@063732 by Mike Witherden

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Hi I must say that one of the ways around this problem is to use Current Shunts
soldered or bolted (or both) to the track. These Current Shunts may be copper
wire, copper rods or copper bars (square or rectangular.) My favorite are the
copper common and earth bars used in mains DBs.  
Some of these have holes drilled at regular intervals giving you an ideal way
of connecting large cables to your PCB.
This enables hundreds of amps to effectively flow on your PCB with no overheating problems.

Another, not so neat, Current Shunt is old solder wick!

(These Current Shunts also act as great Heat Shunts)

{Quote hidden}

MikeW

2000\06\05@120733 by Mike Witherden

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Hi I must say that one of the ways around this problem is to use Current Shunts
soldered or bolted (or both) to the track. These Current Shunts may be copper
wire, copper rods or copper bars (square or rectangular.) My favorite are the
copper common and earth bars used in mains DBs.  
Some of these have holes drilled at regular intervals giving you an ideal way
of connecting large cables to your PCB.
This enables hundreds of amps to effectively flow on your PCB with no overheating problems.

Another, not so neat, Current Shunt is old solder wick!

(These Current Shunts also act as great Heat Shunts)

{Quote hidden}

MikeW

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