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'[EE]: TTL'
2002\10\15@201002 by Tony Nixon

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Hi all,

Is it safe to leave a TTL input floating. It is my understanding that
they will pull high.

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2002\10\15@202821 by Herbert Graf

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> Is it safe to leave a TTL input floating. It is my understanding that
> they will pull high.

       Since a TTL input needs a current to "do it's stuff" and is generally not
that high an input impedance it usually isn't much of an issue to leave it
loose. I would vote on it being safe but can't rubber stamp that, I'm sure
someone else will be able to, either way. TTYL

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2002\10\15@202831 by Rick C.

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A real TTL should be pulled high to Vcc. A TTL input that could become an
output should be pulled high with a resistor between 1k and 10k.
Rick

Tony Nixon wrote:

{Quote hidden}

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2002\10\15@204632 by Ray Gallant

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> Tony Nixon wrote:
>
> > Hi all,
> >
> > Is it safe to leave a TTL input floating. It is my understanding that
> > they will pull high.
> >
> > --
> > Best regards
> >
> > Tony
> >
I would suggest connecting it to ground so the Hi-Z will not pick up noise.
If current consumption is a concern, use a pull down.  If logic requires it,
pull it up. {slewrate}

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2002\10\15@211011 by Rick C.

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Pulling a TTL input high only draws an extra 400 microamps. Pulling it low draws
a whopping 1.6 ma.
Rick

Ray Gallant wrote:

{Quote hidden}

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2002\10\15@211652 by Russell McMahon

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> Is it safe to leave a TTL input floating. It is my understanding that
> they will pull high.

Will generally work OK floating BUT is bad practice and to be avoided. Will
sometimes catch you out and/or degrade performance if left floating. AFAIR
(a long time ago since I used 'real" TTL) ) they can be hard connected to
Vcc.

Be ware that this is for TRUE TTL - TTL compatible CMOS inputs may follow
quite different rules and should always be explicitly terminated.

               RM

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2002\10\15@212322 by Tony Nixon

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Hi all,

Many thanks.

I have added a pullup.

Russell McMahon wrote:
{Quote hidden}

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2002\10\15@213633 by William Chops Westfield

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   >>> Is it safe to leave a TTL input floating. It is my understanding
   >>> that they will pull high.

   Pulling a TTL input high only draws an extra 400 microamps. Pulling it
   low draws a whopping 1.6 ma.

REAL TTL will float high.  REAL TTL sinks 1.6mA into low input signals.  Do
YOU have REAL TTL?  That would be 74xx series.  Not 74LSxx, not 74HCTxx,
not a "ttl level input" to a cmos microcontroller.

BillW

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2002\10\16@015640 by Vasile Surducan

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On Wed, 16 Oct 2002, Tony Nixon wrote:

> Hi all,
>
> Many thanks.
>
> I have added a pullup.


It wasn't necessary. A standard TTL has already internally a 4k3 resistor
to Vcc.

Vasile


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2002\10\16@020537 by Wouter van Ooijen

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> Is it safe to leave a TTL input floating. It is my understanding that
> they will pull high.

Yes if you are talking about a real TTL or even LSTTL (the ones made of
transistors, not FETs).

Wouter van Ooijen

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2002\10\16@021552 by Tony Nixon

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Hi Vasile,

I just found an old National data book and it says to tie unused inputs
to VCC via a 1 - 5K resistor which seem to coincide with the reasons
already mentioned.

It's no big deal to add it :-)


Vasile Surducan wrote:
{Quote hidden}

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2002\10\16@083720 by Olin Lathrop

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> Is it safe to leave a TTL input floating.

No.

> It is my understanding that they will pull high.

They will pull weakly high, but noise in the system can (I've seen it
happen) overcome this.


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2002\10\16@083906 by Olin Lathrop

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> I would suggest connecting it to ground so the Hi-Z will not pick up
noise.

That will work, but will cause slightly more current draw.

> If current consumption is a concern, use a pull down.

No, absolutely not!  TTL inputs act as if they have weak pullups in them, so
their default open state in a noiseless environment is high.  You definitely
don't want to partitially pull a TTL input low because you may end up in the
nether region between a 1 and a 0, which can cause all sorts of trouble.


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2002\10\16@084526 by Vasile Surducan

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On Wed, 16 Oct 2002, Olin Lathrop wrote:

> > I would suggest connecting it to ground so the Hi-Z will not pick up
> noise.
>
> That will work, but will cause slightly more current draw.
>
> > If current consumption is a concern, use a pull down.
>
> No, absolutely not!  TTL inputs act as if they have weak pullups in them, so
> their default open state in a noiseless environment is high.  You definitely
> don't want to partitially pull a TTL input low because you may end up in the
> nether region between a 1 and a 0, which can cause all sorts of trouble.
>

 Olin, are you sure ?



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2002\10\16@090550 by Olin Lathrop

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> > No, absolutely not!  TTL inputs act as if they have weak pullups in
them, so
> > their default open state in a noiseless environment is high.  You
definitely
> > don't want to partitially pull a TTL input low because you may end up in
the
> > nether region between a 1 and a 0, which can cause all sorts of trouble.
> >
>
>   Olin, are you sure ?

Sure about what exactly?

Using a pulldown resistor (which is what this response is about) can be
shown to be a bad idea just by doing the math.  The data sheet will show
some maximum value that the input is guaranteed to interpret as a 0, and a
higher minimum value that the input will interpret as a 1.  The behaviour of
the input is undefined in between (we are not talking about schmitt
triggers).  In practise this can cause anything from the input either picks
0 or 1, to internal oscillations and high current draw.

The wrong pulldown resistor could easily drive the input to the undefined
region.  If you're going to pull down a TTL input, you should short it to
ground or drive it with a circuit that guarantees it will stay below the
maximum 0 level (like a satuarted transistor).


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2002\10\16@090723 by Rick C.

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Yes that is correct.
Rick

Vasile Surducan wrote:

 Olin, are you sure ?



> On Wed, 16 Oct 2002, Olin Lathrop wrote:
>
> > No, absolutely not!  TTL inputs act as if they have weak pullups in them, so
> > their default open state in a noiseless environment is high.  You definitely
> > don't want to partitially pull a TTL input low because you may end up in the
> > nether region between a 1 and a 0, which can cause all sorts of trouble.
> >
> >

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2002\10\16@092802 by Alan B. Pearce

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>> No, absolutely not!  TTL inputs act as if they have weak pullups in them,
so
>> their default open state in a noiseless environment is high.  You
definitely
>> don't want to partitially pull a TTL input low because you may end up in
the
>> nether region between a 1 and a 0, which can cause all sorts of trouble.


>  Olin, are you sure ?

He is correct. You can make an oscillator out of a TTL gate, just the same
as you can out of a CMOS gate. Do remember that Digital circuits are just
analogue circuits driven to extremes of output levels, and that somewhere in
the middle is a linear region.

As to leaving inputs floating, I do remember seeing a circuit idea somewhere
using a 16 input multiplexer with floating inputs being used as a capacitive
keypad, where the capacitance to the finger was enough to change the state
of the output. Depending on the gate logic, do one of the following - :

1. On and AND or OR gate, where it is being used as a buffer, tie all inputs
together.

2. Depending on the gate logic being used do one of the following

a) tie the spare input to Vcc using a resistor, 4k7 to 10k seem to have
been typical values used, but down to 1k could well be used with no adverse
affect. Using a resistor means you do not need to cut a wire later if you
need to connect to the pin. This is the preferred state as the resultant
current draw is lower.

b) tie the spare input to ground using a 470 ohm resistor. This is the less
preferred state as the current draw is higher (see previous postings). A
value of 470 to 330 ohm is typically required because of the input acting as
a current source when pulled down.

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2002\10\16@100259 by Wouter van Ooijen

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> I do remember seeing a circuit
> idea somewhere
> using a 16 input multiplexer with floating inputs being used
> as a capacitive
> keypad, where the capacitance to the finger was enough to
> change the state
> of the output.

I can't believe that whas a TTL circuit (as the OP asked about). (TTL as
in 7400, without any letters inbetween).

Wouter van Ooijen

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2002\10\16@100925 by Alan B. Pearce

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>> using a 16 input multiplexer with floating inputs being used
>> as a capacitive keypad, where the capacitance to the finger
>>was enough to change the state of the output.

>I can't believe that whas a TTL circuit (as the OP asked about).
>(TTL as in 7400, without any letters inbetween).

Yes that is correct. IIRC it used a 74154 where each input is actually the
second input of an AND gate (the other input being the select line
internally) and the select line held the input low. The capacitance from the
finger to the input delayed the rise time enough that it could be detected
on the output relative to the rise time that would otherwise appear, to be
detectable. You could only do this with o/c inputs because of the internal
architecture of the chip. IIRC it was stated that it would not work with any
chip which had buffered inputs such as 74LS series.

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2002\10\16@134214 by Barry Gershenfeld

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>Hi all,
>
>Many thanks.
>
>I have added a pullup.

Oh, you don't think you can end the discussion that simply, do you? :-)

I remember reading about this in TI's databook.  They recommended unused
inputs be held high, and further suggested that a single pullup
resistor could have 10 (or was it 25?) inputs tied to it.  Funny
no one's cited anything from the guys making the chips.

Of course, that was 25 years ago.  Real TTL.  YMMV.   Not to mention
if you count how many inputs are floating and how many are held
low just by virtue of circuit design, it's not likely to make
much difference.

Barry

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2002\10\16@182842 by Jim

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 "Funny no one's cited anything from the guys making
  the chips."

I've still got my original TTL books picked up
directly from TI's semi office - I wasn't about
to jump into the fray until the SNR picked up ...

RF Jim


{Original Message removed}

2002\10\17@021017 by Vasile Surducan

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There is no problem with TTL input either for pull up or pull down
( with a right computed resistor as Olin says ) or a *directly connection*
to Vcc or GND of the inputs. That's because the input stage is based on a
multiemiter transistor having the base connected to Vcc through a 4k3 to
4k7 resistor ( standard TTL, 80' th ). So conecting one, both or all
emiters of the input stage, to the ground with a resistor who will satisfy
the logic input level voltage, or directly via a wire
or connecting those inputs to the Vcc are both corect choices.
The only one reason why is avoided ground connection of TTL input is the
increasing of the current comsumption by a factor of (Vcc-Vbe)/4k3 for
every TTL input connected directly to GND
Letting the TTL input to float, on a board with a few TTL's ( 10 to 20 )
it's a perfect choice if *every* chip have 100nF for decoupling near the chip
package. Will be no noise problems.
But, on large boards where TTL and LS are living together, and also there
are different manufactured chips, having different technologies ( and I
have built in 1985 a board having 80 TTL East and West chips ) is
recommended to connect
unused inputs to Vcc ( via a resistor if you like, usual 1K or directly )


Olin puzzled me because "pull-down" or "pull-up" in my imaginations does
not required obligatory a resistor...

best regards, Vasile



On Wed, 16 Oct 2002, Olin Lathrop wrote:

{Quote hidden}

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2002\10\17@022509 by Vasile Surducan

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One little correction, an believe me is because of english lack:

On Thu, 17 Oct 2002, Vasile Surducan wrote:

{Quote hidden}

* for every TTL gate and not every TTL input...


{Quote hidden}

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2002\10\17@143212 by Mike Singer

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Vasile Surducan wrote:
> One little correction, an believe me is because of english lack:
> On Thu, 17 Oct 2002, Vasile Surducan wrote:
>
> > There is no problem with TTL input either for pull up or pull down
> > ( with a right computed resistor as Olin says ) or a *directly
connection*
> > to Vcc or GND of the inputs.
>
> > Letting the TTL input to float, on a board with a few TTL's ( 10 to
20 )
> > it's a perfect choice if *every* chip have 100nF for decoupling near
the chip
> > package. Will be no noise problems.
> > But, on large boards where TTL and LS are living together, and also
there
> > are different manufactured chips, having different technologies (
and I
> > have built in 1985 a board having 80 TTL East and West chips ) is
> > recommended to connect
> > unused inputs to Vcc ( via a resistor if you like, usual 1K or
directly )
> >
> >
> > Olin puzzled me because "pull-down" or "pull-up" in my imaginations
does
> > not required obligatory a resistor...

Olin didn't puzzle me with his "pull-up" requiring a resistor.
Absolutely natural logic to filter out noise spikes from 5v bus
using the resistor and input capacitances. Correct me if I'm
wrong.
On all Soviet TTL boards, I had known, all constant input
"1"s were "pull-up"ed with a resistor.

Regarding  you had built in 1985 a board having 80 TTL
East and West chips:  you wrote earlier:  "Mike, there are
three big barriers between you and me: ... age..."
What's your age, by the way? Very approx.

Mike.

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2002\10\17@144057 by Wouter van Ooijen

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>  Olin didn't puzzle me with his "pull-up" requiring a resistor.
> Absolutely natural logic to filter out noise spikes from 5v bus
> using the resistor and input capacitances. Correct me if I'm
> wrong.

That sounds like a thinking mistake to me. Positive going spikes would
be no trouble (up to what the chip can handle, not uch IIRC for
old-style TTL, negative going would need to go so negative to cause
trouble that the function of the whole chip would be compromised. Of
course assuming that the pull up is obtained from 'near' the power to
the chip!

Wouter van Ooijen

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2002\10\17@152632 by Mike Singer

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Wouter van Ooijen wrote:
> >  Olin didn't puzzle me with his "pull-up" requiring a resistor.
> > Absolutely natural logic to filter out noise spikes from 5v bus
> > using the resistor and input capacitances. Correct me if I'm
> > wrong.
>
> That sounds like a thinking mistake to me. Positive going
> spikes would be no trouble (up to what the chip can handle,
> not uch IIRC for old-style TTL, negative going would need
> to go so negative to cause trouble that the function of the
> whole chip would be compromised. Of course assuming
> that the pull up is obtained from 'near' the power to the chip!

May be RF folks could comment better.
I didn't mean negative spikes from power supply. I thought
about very shot spikes caused by buffer output cascades.
They used to move over board as daemons.

Mike.

Could anybody tell me what English word is equivalent to
"negative spikes" ?

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2002\10\18@022645 by Vasile Surducan

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On Thu, 17 Oct 2002, Mike Singer wrote:

>
>  Olin didn't puzzle me with his "pull-up" requiring a resistor.
> Absolutely natural logic to filter out noise spikes from 5v bus
> using the resistor and input capacitances. Correct me if I'm
> wrong.

 You'll not thinking wrong at all as a principle, but in practice
no one is filtering a pulled up ( by resistor) input gate. Just because is
not neccesary.
Just take a TTL datasheet and see the noise margin of the family,
I'm sure, you'll understand what did I mean


>  On all Soviet TTL boards, I had known, all constant input
>  "1"s were "pull-up"ed with a resistor.

 Probably you didn't knew all russian TTL families, there are much many
than TI has ever built... ( but I can't be very sure, I haven't use all,
either from TI or russian just because I haven't ) . But we aren't talk about
the russian here, ( we did this for 50 years, it's time to forgot ) but
about the standard TTL.
* Any input of a TTL gate could be connected directly to Vcc or GND
without any resistor *
I accept any different opinions if are sustained by math computation.

>  East and West chips:  you wrote earlier:  "Mike, there are
>  three big barriers between you and me: ... age..."

If you feel offenced, I'm really sorry and please accept my appologises.

Those three big barriers are:
the age, the ocean and that damn comunism...
Maybe I'm younger than you, :) 38, so remains now only the ocean because
theoreticaly we are capitalists now :)
But I don't fell any improvements since we were socialists...

best regards to Mike,

Vasile, from
Transylvania ( sounds familiar now ? )
Romania, capital at Bucharest
neighbours: Hungary, Bulgary, Moldova ( a sort of romanians too ),
Ukraine ( ex URSS), Serbia ( ex Yougoslavia,
the place where americans forgot for nothing some bombs, remember ? )
and The Black Sea, all in:
East Europe

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2002\10\18@032829 by Peter L. Peres

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On Thu, 17 Oct 2002, Wouter van Ooijen wrote:

*>>  Olin didn't puzzle me with his "pull-up" requiring a resistor.
*>> Absolutely natural logic to filter out noise spikes from 5v bus
*>> using the resistor and input capacitances. Correct me if I'm
*>> wrong.
*>
*>That sounds like a thinking mistake to me. Positive going spikes would
*>be no trouble (up to what the chip can handle, not uch IIRC for
*>old-style TTL, negative going would need to go so negative to cause
*>trouble that the function of the whole chip would be compromised. Of
*>course assuming that the pull up is obtained from 'near' the power to
*>the chip!

The positive pulses can cause reverse breakdown of the BE junction in the
multiemitter input transistor. This can be strong enough to cause
cumulative damage to the transistor but it can immediately glitch high an
input pulled down to low by another emitter of that transistor. (dark
memories from TTL design handbook X years ago ... )

Peter

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2002\10\18@042601 by Peter L. Peres

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On Fri, 18 Oct 2002, Vasile Surducan wrote:

*>  You'll not thinking wrong at all as a principle, but in practice no
*>one is filtering a pulled up ( by resistor) input gate. Just because is
*>not neccesary. Just take a TTL datasheet and see the noise margin of the
*>family, I'm sure, you'll understand what did I mean

The idea to use a resistor and no capacitor for pullup relates to the fact
that the base node of the input transistor has a lot of capacitance to
ground (from bulk substrate cap.) and a high positive spike on the
positive line could lift the emitter above the base enough to cause
trouble, or glitch the input. Also the parasitic thyristor formed by the
input NPN and the substrate (?) could not obtain enough current to sustain
itself if triggered by such a large pulse.

Peter

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2002\10\18@044252 by Wouter van Ooijen

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> The positive pulses can cause reverse breakdown of the BE
> junction in the multiemitter input transistor.

I fail to see how that would be possible when the pull-up is taken from
the Vcc pin of the chip...

Wouter

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2002\10\18@054256 by Vasile Surducan

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On Fri, 18 Oct 2002, Wouter van Ooijen wrote:

> > The positive pulses can cause reverse breakdown of the BE
> > junction in the multiemitter input transistor.
>
> I fail to see how that would be possible when the pull-up is taken from
> the Vcc pin of the chip...
>
 It needs more than 7.2 volt ( Vbe breakdown voltage, jonction is
functioning as a zenner )  with reversed polarity on the TTL gate pins
input.

< the next phrase must be readed without any offence thought >

So, it means the whole board have a noise at least of +5V +/- 7.2V
Who knows how are working the TTL boards over the ocean ? :)
I have learned at Aussies everything is upside-down, but in California ?

I like to know, maybe some of you are making me an invitation to see
with my own eyes !

best regards, be happy,
Vasile

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2002\10\18@110609 by Peter L. Peres

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On Fri, 18 Oct 2002, Wouter van Ooijen wrote:

*>> The positive pulses can cause reverse breakdown of the BE
*>> junction in the multiemitter input transistor.
*>
*>I fail to see how that would be possible when the pull-up is taken from
*>the Vcc pin of the chip...

The pullup and the input pin capacitance form a lowpass filter but another
lowpass filter is formed inside by the base pullup resistor of the
multiemitter transistor and the base proper vs. substrate. Consider the
case of a NAND gate with one input driven low from outside, and the other
input tied high. The base of the first transistor will be at ~0.6V (less
than 1V probably). A positive spike enters through the Vcc line.

If the emitter is tied hard high it will rise with the Vcc line but the
base will follow later or not at all (it is kept low by the other input).
Meanwhile BE breaks down at ~5V and a 0.5-1V spike should be enough to put
the BE junction tied hard high into reverse breakdown mode and probably
cause a logic glitch in the gate output.

If the pullup is a resistor then it forms a filter with the pin input
capacitance and the tied high input will not follow the spike.  Also there
will not be enough injected current in case of reverse breakdown to cause
the transistor to glitch. Resistor values of 1k to 10k come to my mind.

Peter

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2002\10\18@111021 by Peter L. Peres

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On Fri, 18 Oct 2002, Vasile Surducan wrote:

*>  It needs more than 7.2 volt ( Vbe breakdown voltage, jonction is
*>functioning as a zenner )  with reversed polarity on the TTL gate pins
*>input.

BE reverse breakdown voltage depends on transistor construction. Common
discrete transistors begin to break down at about 5.5-6V at room
temperature (at 50-100uA current).  Integrated transistors often break
down at lower voltages. 5V is about the minimum safe limit for this (what
a surprising coincidence that they chose 5V supply for Silicon based TTL
logic - about then times the bandgap in silicon, as high as possible, but
not high enough for reverse breakdown ...). Note that the maximum allowed
voltage for TTL is 5V+10% = 5.5V. Just 0.1V more and you begin to have
reverse breakdown somewhere or other.

Imho it is safe to leave TTL inputs floating without a pullup if there is
no chance for them to pick up stray RFI or spikes.

Peter

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2002\10\18@151255 by Mike Singer

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Mike Singer wrote:
> Wouter van Ooijen wrote:
> > >  Olin didn't puzzle me with his "pull-up" requiring a resistor.
> > > Absolutely natural logic to filter out noise spikes from 5v bus
> > > using the resistor and input capacitances. Correct me if I'm
> > > wrong.
> >
> > That sounds like a thinking mistake to me. Positive going
> > spikes would be no trouble (up to what the chip can handle,
> > not uch IIRC for old-style TTL, negative going would need
> > to go so negative to cause trouble that the function of the
> > whole chip would be compromised. Of course assuming
> > that the pull up is obtained from 'near' the power to the chip!
>
>  May be RF folks could comment better.
>  I didn't mean negative spikes from power supply. I thought
>  about very shot spikes caused by buffer output cascades.
>  They used to move over board as daemons.

Wouter, let's consider the next situation:

1. Classic 7400 gate.
2. Slowly changing signal on the first input.
3. Some noise on the second input.

At some point between 0.8v and 2.0v on the first input
the gate, when switching, would amplify noise current on
the second input.
Shot negative spikes on the second input caused by
buffer output cascades are a big pain here.
Correct me if I'm wrong, please.

Mike.

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2002\10\18@201032 by Jim

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face
Let's also consider probing by:

1) automated equipment via "pogo-pin" (bed-of-nails)
  test adapters during manufacture process or

2) troubleshooting by human operators in the
  field or factory -

- and which in either case neither a clear-cut
logic 1 or 0 is seen if an input is left
'floating' ...

A design like this would flunk during a "design
review" anyway ...

RF Jim


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