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'[EE]: Sizing fans for MOSFETs'
2002\10\19@232659 by Donovan Parks

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Hello,

I am in the process of designing some motor controllers  and am thinking of
removing (or at least reducing the size of) the heatsinks I am using by
placing a fan over the MOSFETs.  I have some datasheets from Wakefield
Engineering the nicely show the Thermal Resistance from Sink to Ambient for
different LFM rates.  From this I have been able to determine I could get
away with a very small  heatsink.  What I can not determine is if I need a
heatsink at all.  Does anyone know where I can find a Thermal Resistance
from Sink to Ambient for different LFM rates for a TO-220AB casing (i.e.
with no heatsink)?  Does it sound reasonable that with an ~500LFM fan I
could put 30A through an h-bridge that consisted of 2 IRF1404 MOSFETs (4mOhm
on resistance) in parallel for each leg?

Thanks,
Donovan

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2002\10\20@034555 by Russell McMahon

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> I am in the process of designing some motor controllers  and am thinking
of
> removing (or at least reducing the size of) the heatsinks I am using by
> placing a fan over the MOSFETs.  I have some datasheets from Wakefield
> Engineering the nicely show the Thermal Resistance from Sink to Ambient
for
> different LFM rates.  From this I have been able to determine I could get
> away with a very small  heatsink.  What I can not determine is if I need a
> heatsink at all.  Does anyone know where I can find a Thermal Resistance
> from Sink to Ambient for different LFM rates for a TO-220AB casing (i.e.
> with no heatsink)?  Does it sound reasonable that with an ~500LFM fan I
> could put 30A through an h-bridge that consisted of 2 IRF1404 MOSFETs
(4mOhm
> on resistance) in parallel for each leg?

I'd say just about yes :-)
Nice FETs!

It's not obvious why you are placing two FETs in parallel per leg. The
IRF1404 is rated at 162A (junction) and 75A package.
AT Rthj-c-max of 0.75C./W and Rcase-sink-typ of 0.5C/W you only get about
1.25 C/W rise and at 4 times the power dissipation below (due to one FET
being used per leg rather than 2) this would still allow lots of room for
heatsinking. I would have thought that the space and cost saved by halving
the FET count would allow extra heatsink room for forced cooling.

Ifet = 15A (2 FETS)
Rdson = 4 mohm
Duty cycle = 100% say (worst case just in case)
P/Fet = I^2R = 225 x .004 = 900 mW/FET
A vertically mounted TO220 package will about handle that without any
assistance at all and I imagine a substantial airflow onto the metal of the
package or, more realistically, using a minimal heatsink of about equivalent
area to the face of the package, would allow fan cooling. It depends of
course what you meant by "no heatsink" - the exposed face of the package
when mounted has a higher and unspecified thermal resistance (the 62 degrees
C /watt refers to the whole package). . It you had access to the back faces
or clamped a row of close spaced FETS (8 total here) to a piece of metal not
bigger than the FETS themselves and force cooled that you would effectively
have no heatsink. Standing them up in a forced draft would have the same
effect.

The great risk is that that utterly fantastic Rdson degrades for any reason
or if you get other energy dissipation contributions !!!!!!!!!

You don't say what the application and switching speed is, and this can
greatly influence decisions here.
You would have to ensure that the FET was fully enhanced and that
dissipation due to switching transitions were well managed. I suspect that
dissipations several times as much as the 900 mW per FET may occur in
practice.  If load sharing between the two FETs per leg became imbalanced
the power dissipation could increase dramatically. eg for a 2A mismatch the
current goes from 15/15 to 17/13 and power in the 17A FET goes to 1.2W (25%
increase).



       Russell McMahon

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2002\10\20@071320 by Roman Black

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Russell McMahon wrote:

> Nice FETs!
> IRF1404 is rated at 162A (junction) and 75A package.
> P/Fet = I^2R = 225 x .004 = 900 mW/FET
> A vertically mounted TO220 package will about handle that without any
> assistance at all

> You don't say what the application and switching speed is, and this can
> greatly influence decisions here.
> You would have to ensure that the FET was fully enhanced and that
> dissipation due to switching transitions were well managed.


I'm glad you added that last bit! Even in a well
designed h-bridge the FETs can spend a typical 5%
of the total timeslice in switching transitions...

Even as a rough calc with 12v supply and the 30A
mentioned, you can expect about 6v and 15A average
(90W!) for 5% of the time, which is 4.5W, many
times the on dissipation. If the supply is 24v or
more this figure can get out of hand very quickly.
(before some people start arguing average vs RMS
power etc etc it's not worth it as the exact shape
of the slewing curve or ramp will vary with load
as well as the 5% figure).

With high power drivers I was actually taught to do
it the old fashioned way, which beats any calcs <grin>
what you do is mount the transistors or FETs on the
sink you will use, run them up with a DC supply at
measured volts and amps (measured dissipation) and
using a thermometer measure the 'C/W of the installation
itself. Then when the driver is actually running you
can simply measure the sink temperature and KNOW what
your switching losses are.

Like Russell I would go with *some* heatsinking,
probably a vertical alloy bracket as a minimum.
And forget heat calcs, run the thing and measure. ;o)
-Roman

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2002\10\20@081918 by Andy Kunz

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>Duty cycle = 100% say (worst case just in case)

Actually, 100% is NOT the worst case.  The worst case is when you are
switching, as the FET goes through the linear mode.  Using the gate
resistor to control the curve is right and good, but it _does_ extend the
time in the linear mode, which is where you will get LOTS of heat.

Andy

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