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'[EE]: Inter-stage audio coupling'
2002\07\30@214541 by John Hansen

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       First, understand that my knowledge of matters digital is considerably
greater than my knowledge of matters analog, so the following may be an
incredibly dumb question.  However, here goes.  I am using a Dallas Semi
digital pot (DS1801) to drive a LM386 audio amp.  Generally it works quite
well.  The data sheets seem to suggest coupling the two stages (as well as
input and output) with capacitors that have values of at least a few mf in
order to improve frequency response (I'm not dealing with high quality
audio here... more like the quality you would get from an AM radio).  When
I do this the entire circuit works quite well except that when I first turn
it on, there is a delay (I presume as the capacitors charge) before any
audio appears. The greater the value of the capacitors the longer the delay
(it can be as long as a second or two).  When I use .1 mf caps, the delay
goes away, but the frequency response, as expected, is not as good as with
higher value caps.  Is there an easy way around this, or is this just
something I should live with?


John Hansen

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2002\07\30@221601 by Rick C.

No, you shouldn't have to live with it. You're right, it is an interstage cap
charging up, but that's where your analog circuit design is failing. Not sure with
the info you have given exactly where the problem is without seeing the circuit.
Obviously it is a bias voltage in one of the stages that's the problem (going
linear).  Impedance matching or buffering a stage may correct the problem.
Sometimes an electrolytic in backwards will cause this problem. You state that the
circuit functions well without the coupling caps. Just leave them out if the audio
is clear and undistorted. Let's see the circuit if at all possible.

John Hansen wrote:

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2002\07\31@174216 by Harold M Hallikainen

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       I'd first look at the circuit to see if you need the capacitors at all.
These are typically DC Blocking or coupling capacitors. If there's no DC,
or if both sides of the circuit are at the same DC voltage (for example,
an op amp output and the input of the next stage both being at Vcc/2), no
capacitor is needed. Finally, if you do need a capacitor, the low
frequency cutoff will be 1/(2*pi*R*C) where R is the resistance "seen" by
the capacitor (likely the series combination of the output resistance of
the previous stage and the input resistance of the next stage). You can
choose the capacitor value to give the required low frequency response
while still giving a reasonable bias stabalization time.


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