Post by thread:[EE]: Seperating grounds

BBob wrote: >I've seen it mentioned here a few times about "seperating" the digital and >analog ground plains from each other. > >Since everything eventually has to be connected to the same common ground >somehow (at least in my circuit), how exactly is that done? I mean, how does >one keep the digital signals from getting mixed into the analog ground plane? >With a signal diode, a cap? An example diagram (draw me a picture ;-), or a URL >to a page/circuit that outlines that would help. > >Sorry for the stupid question, I've never had to worry about this in my little >analog circuits. > Bob, Not stupid - this is a basic problem when mixing analog and digital. Less important for slow signals and low sampling resolution [ie, 8-bits]. More important for faster signals, high-sensitivity [ie, less a few mV], and high-resolution [ie, >= 12 bit sampling]. The general solution to successfully mixing analog and digital probably doesn't exist, but everyone has a dozen or so partial solutions, and there are "very long" threads about this on piclist - if you can find them. This whole area is probably more art than science. "High-Speed Digital Design" by Howard Johnson is one place to look. The basic idea to separating digital and analog grounds is simply just that - keep them physically and electrically separate from one another all over your circuit, and tie them together at ONE point only - at the place where the power comes onto your board. This point usually has wide traces with low impedances [meaning the digital currents will devleop relatively low noise signals --> Vnoise = Idigital * Z]. Also, a "one-point" connection helps prevent ground loops. Think of the various grounds emanating from that point kind of like the legs of an octopus. That is the common solution. OTOH, if you look at the datasheets for various high-performance A/D converters [downloadable from National Semi, Linear Tech and Maxim], you will see many of them recommend making the "one-point connection" directly under the A/D itself, which is usually not at the power insertion point of the board. So this kind of goes against the common solution just described. This being said, however, does not mean that simply separating the gnds is going to magically make your analog circuitry noise-free. This is not a stupid or trivial problem by any means - and many engineers spend their entire lives trying to figure it out -[and some are still working in it - he, he]. hope this helps, - dan michaels http://www.oricomtech.com ====================== -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email .....listservKILLspam@spam@mitvma.mit.edu with SET PICList DIGEST in the body

----- Original Message ----- From: Thomas McGahee <tom_mcgaheeKILLspamsigmais.com> To: Bob <.....op1cwkKILLspam.....flashmail.com> Sent: Saturday, March 31, 2001 8:17 PM Subject: Re: [EE]: Seperating grounds {Quote hidden}> Current flowing through wiring will develop voltage drops that > shift the supposed "ground" reference to something other than > the desired ZERO point. > > The problem is not just an analog versus digital problem. It can > rear its ugly head in almost ANY analog circuit, and can even > wreak havoc in an all-digital circuit. It is, however, particularly > prevalent in mixed analog/digital systems. > > Ground wires serve two different functions. Sometimes they are used > to carry currents. At other times you want the ground to serve as > a rock-solid reference point for making precision measurements. > This is especially true in A/D circuits with more than 8 bits of > desired resolution. > > The best way to handle the ground problem is to have different > ground systems that connect at only one point. The precision analog > REFERENCE ground should always be designed so that an absolute > minimum of current actually flows through it. In practice this is > accomplished by having all reference ground connections terminating > at a SINGLE POINT. > > Firstly, all MEASUREMENT ground connections should use individual > traces that converge at a single REFERENCE POINT. The idea is to > not allow any current flow through one reference trace to affect > any other reference trace. What you want to avoid is having one > long trace that snakes all over the board, with many different > ground connections being made at differnt points along this trace. > The currents will add up, causing differnt voltages to appear > along the trace. This is bad news. > > Secondly, all GROUND POWER supplied to the analog section should > use another ground system. This ground system should have a > single connection to the REFERENCE ground point. > > Thirdly, a COMMON ground connection to any major DIGITAL GROUND > system should ALSO be made to the single REFERENCE ground point. > > If properly constructed, the REFERENCE ground point becomes a nice > rock-solid point from which measurements can be made. It will be > COMMON to all other system grounds, but this common connection > should NOT itself experience any current flow. Or at least the > current flow should be absolutely minimal. > > In extremely noisy systems the analog section may be floated > or isolated from other sections. In this case data is communicated > from one section to another via opto-isolators, transformers, > or using other isolation techniques. Complete isolation is also > desired in medical systems where even small currents can do great > damage to a patient. > > The tendency when laying out a printed circuit board is to just > run a ground trace around the board and have all kinds of things > attach themselves to this running ground. But if you desire > precision measurements you MUST have a precision reference POINT > to which ALL measurements are referenced. > > Fr. Tom McGahee > > > > > ----- Original Message ----- > From: Bob <EraseMEop1cwkspam_OUTTakeThisOuTFLASHMAIL.COM> > To: <PICLISTspam_OUTMITVMA.MIT.EDU> > Sent: Saturday, March 31, 2001 6:07 PM > Subject: [EE]: Seperating grounds > > > > I've seen it mentioned here a few times about "seperating" the digital and > > analog ground plains from each other. > > > > Since everything eventually has to be connected to the same common ground > > somehow (at least in my circuit), how exactly is that done? I mean, how does > > one keep the digital signals from getting mixed into the analog ground plane? > > With a signal diode, a cap? An example diagram (draw me a picture ;-), or a > URL > > to a page/circuit that outlines that would help. > > > > Sorry for the stupid question, I've never had to worry about this in my little {Quote hidden}> > analog circuits. > > > > Thanks in advance, > > > > Bob > > > > -- > > http://www.piclist.com#nomail Going offline? Don't AutoReply us! > > email @spam@listservKILLspammitvma.mit.edu with SET PICList DIGEST in the body > > > > > -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email KILLspamlistservKILLspammitvma.mit.edu with SET PICList DIGEST in the body

At 12:39 PM 4/1/01 -0500, you wrote: >Thanks for your reply, > >Okay, I guess that "leads" me to another question or two. How should I tie in >the 2nd ground pin on an F876? And why is it even there for that matter? I was >just going to connect it to the other ground pin by running a trace underneath >the part between them. > First, you have to realize that this is EE, and not CS, and there is a lot of art and black magic here [as Johnson mentions in his book], and that everyone seems to have a different experience and opinions with this stuff. There is probably no one true answer, regarding pcb layouts/etc. Some people think one of those gnds is for analog and the other is for digital, and should be used that way. However, I just measured several chips with my DMM, and got about 2 ohms between the gnd pins - which is actually same reading as between the 2 Vdd pins. So looks like they are simply tied together inside the chips. Personally, I always use a pcb trace between them. ============ >I had did a search in the piclist archive, and kept coming across the term >"vias". What is a "vias"? I'm thinking it must be a euphemism for traces or >something. > Vias are just small plated-through holes on your pcb, normally used to change the board surface along which a trace is running. A common layout scheme is to run bottom traces in a horizontal direction and top traces vertical [or vice versa], and a via is used when a trace needs to change direction. ============ >I believe I read one post in there about using thinner ground traces for high >frequency digital, so that it would cut down on the amount of frequency that >gets back to the central connecting point. > Narrow traces represent "higher" impedance to high-frequencies than narrow traces, so some people feel you can reduce the amount of high-frequency noise being conducted in your power/gnd traces by making them narrow. There are a lot of other issues in pcb layout - about 10,000,000 of them - you can spend a good part of your life learning this stuff. Maybe best to start with a book like Johnson's. I also have some links to helpful material on electronics design: http://www.oricomtech.com/tek-rpt.htm Try esp the appnotes regarding pcb layout/etc, eg: AN-389: Follow PCB Design Guidelines For Lowest CMOS EMI Radiation National used to have a really good note, AN643 - EMI/RFI Board Design, but I see they removed it - ?????????/ cheers, - dan michaels ====================== -- http://www.piclist.com hint: To leave the PICList RemoveMEpiclist-unsubscribe-requestTakeThisOuTmitvma.mit.edu

At 12:39 PM 4/1/01 -0500, Bob wrote: >Thanks for your reply, > >Okay, I guess that "leads" me to another question or two. How should I tie in >the 2nd ground pin on an F876? And why is it even there for that >matter? I was >just going to connect it to the other ground pin by running a trace underneath >the part between them. If one of the grounds is very close to the xtal pins, that would be a clue. See www.dvanhorn.org/Micros/All/Crystals.php Count on this. If there are multiples, you need all of them. >I had did a search in the piclist archive, and kept coming across the term >"vias". What is a "vias"? I'm thinking it must be a euphemism for traces or >something. A via is a hole that's used to take a trace from top to bottom, or bottom to top. It's just like a component lead hole (also reverred to as a "Free via") except smaller. >I believe I read one post in there about using thinner ground traces for high >frequency digital, so that it would cut down on the amount of frequency that >gets back to the central connecting point. BAD idea. Ground fat, VCC thin. See article: http://www.dvanhorn.org/Micros/All/Bypass.php -- Dave's Engineering Page: http://www.dvanhorn.org Where's dave? http://www.findu.com/cgi-bin/find.cgi?kc6ete-9 -- http://www.piclist.com hint: To leave the PICList spamBeGonepiclist-unsubscribe-requestspamBeGonemitvma.mit.edu

Dave Van Horn wrote: >>Okay, I guess that "leads" me to another question or two. How should I tie in >>the 2nd ground pin on an F876? And why is it even there for that >>matter? I was >>just going to connect it to the other ground pin by running a trace underneath >>the part between them. > >If one of the grounds is very close to the xtal pins, that would be a clue. >See www.dvanhorn.org/Micros/All/Crystals.php >Count on this. If there are multiples, you need all of them. > This is one of those points with multiple opinions. As I mentioned, some people think this gnd pin is for your analog signals. OTOH, you have Dave's answer. In my case, I have always used a small gnd trace "island" encircling my xtal and bypass caps, which I have always tied to this gnd, and my analog circuitry [opamps/etc] has a separate gnd trace that goes striaght back to the power injection point on the board. Unfortunately, you can see that this violates the idea of having a short noise-free gnd connection from the analog circuitry to the A/D converter [in this case on the PIC] with a single-point gnd connection between analog and digital under the A/D. It seems you cannot have it both ways :). ============= >>I believe I read one post in there about using thinner ground traces for high >>frequency digital, so that it would cut down on the amount of frequency that >>gets back to the central connecting point. > >BAD idea. >Ground fat, VCC thin. > I notice I didn't fully complete my answer in my previous msg. Personally, on 2-layer boards, I always use as wide gnd traces as possible [50-70 mils] running on one side of the pcb directly under the digital chips, and also use wide Vdd traces [30-50 mils]. Also, connections between the Vdd pins and bypass caps are made as wide as possible, with the caps as close as possible to the Vdd pins. Dave has a slightly different take on this, but he has done a lot of testing, and his boards may be less noisy than mine. IIRC, one thing they do recommend when making a single-point connection between analog and digital gnds, when made "under" the A/D, is to make that trace thin - so DC currents will pass, but digital noise will be somewhat blocked. Is your head spinning yet? [it should be - this stuff is complicated, and there are more hard questions than easy answers :)]. best regards, - dan michaels http://www.oricomtech.com ==================== -- http://www.piclist.com hint: To leave the PICList TakeThisOuTpiclist-unsubscribe-requestEraseMEspam_OUTmitvma.mit.edu

>Since everything eventually has to be connected to the same common ground >somehow (at least in my circuit), how exactly is that done? I mean, how >does There is no short answer to this. You need to analyze what current circulates between the various chips (computer programs for this really analyze EACH wire - but they are out of reach for amateurs), and make sure that this current is 'closed' through a ground (and/or) power line such that it cannot upset other circuits. This cannot be achieved in practice (except if you only have two parts or a completely star-wired power grid). So there is a compromise made between reality and theory, and all the digital grounds are tied together, and all the analog grounds are tied together, each in a single ground point, and these two are tied together at the ground entry point to the circuit. This requirement can place the ground entry point under a chip (common in A/D and RF applications). Sometimes designers play more tricks with the grounds (esp. the analog grounds). These are special cases that invariably lead to lower fiability (if the analog and the digital gnd on a chip manage to develop some potential difference - usually 0.6V or less - then the chip will die). If your project is MP3 or high end audio related you can use the ground-under-the-chip approach and feed the PSU (or battery) ground exactly there. Even if it's in the middle of the board ;-) Peter -- http://www.piclist.com hint: To leave the PICList RemoveMEpiclist-unsubscribe-requestTakeThisOuTmitvma.mit.edu

> >This is one of those points with multiple opinions. As I mentioned, some >people think this gnd pin is for your analog signals. OTOH, you have Dave's >answer. In my case, I have always used a small gnd trace "island" encircling >my xtal and bypass caps, which I have always tied to this gnd, The ground ring isnt' a bad idea at all, but I'm not clear what ground you're tying it to. It should go to the digital ground, not the analog. (if they differentiate. > and my analog >circuitry [opamps/etc] has a separate gnd trace that goes striaght back to >the power injection point on the board. I wouldn't think it was an analog ground, unless it was called out as such in the datasheet. The AVR parts are that way, AVCC and AGND actually power the port where the ADCs are.. What I do is bring all the analog back to this AGND, then link AGND to GND under the CPU with a zero ohm resistor. This lets my cadware see AGND as a separate signal from GND, and it then knows not to connect AGND to anything else. >Dave has a slightly different take on this, but he has done a lot of >testing, and his boards may be less noisy than mine. :) The general idea is to let the bypass function as a "T" filter, so that you're always using the PCB track impedances to steer HF currents where you want them to go. >IIRC, one thing they do recommend when making a single-point connection >between analog and digital gnds, when made "under" the A/D, is to make >that trace thin - so DC currents will pass, but digital noise will be >somewhat blocked. You could use a ferrite bead for this, but I've never had to go that far. >Is your head spinning yet? [it should be - this stuff is complicated, >and there are more hard questions than easy answers :)]. Yes. You really have to get into it and look at all angles, and develop an understanding of the whole picture. -- Dave's Engineering Page: http://www.dvanhorn.org Where's dave? http://www.findu.com/cgi-bin/find.cgi?kc6ete-9 -- http://www.piclist.com hint: To leave the PICList piclist-unsubscribe-requestEraseME.....mitvma.mit.edu

Dave Van Horn wrote: >> >>This is one of those points with multiple opinions. As I mentioned, some >>people think this gnd pin is for your analog signals. OTOH, you have Dave's >>answer. In my case, I have always used a small gnd trace "island" encircling >>my xtal and bypass caps, which I have always tied to this gnd, > >The ground ring isnt' a bad idea at all, but I'm not clear what ground >you're tying it to. >It should go to the digital ground, not the analog. (if they differentiate. > Ummm, my gnd ring goes to the gnd pin closest to the oscillator pins. According to what some believe, this would be the "analog" gnd. However: 1 - why would they put an analog gnd right next to the OSC pins - which are the noisiest points on the chip? 2 - why do I measure only 2 ohms between the 2 gnd pins [same value as 2 ohms between the Vdd pins] if they are really separate? 3 - Would you call this pin an analog gnd on a 40-pin PIC with no A/D, like 16C65/67? And does the pin float on those chips? I doubt it. 4 - You also notice on the 40-pin parts that there is a Vdd pin between the "analog" gnd pin and the A/D channels. Is that "analog" power to the chip? Personally, I don't think this pin is an "analog" gnd pin, per se, and I do believe is it hardwired directly to the other gnd pin internally in the chip. ============= > >I wouldn't think it was an analog ground, unless it was called out as such >in the datasheet. Exactly my feeling. ============== > >>IIRC, one thing they do recommend when making a single-point connection >>between analog and digital gnds, when made "under" the A/D, is to make >>that trace thin - so DC currents will pass, but digital noise will be >>somewhat blocked. > >You could use a ferrite bead for this, but I've never had to go that far. > Dave, how do YOU reconcile the 2 contradictory concepts of a) having a single-point gnd connection back at the power injection point with b) making the single-point gnd connection directly under the A/D converter? [assuming is unlikely the A/D converter will be located at the power injection point]. - dan michaels http://www.oricomtech.com ======================= -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

> From: Dan Michaels [EraseMEoricomuswest.net] [SNIP] {Quote hidden}> Ummm, my gnd ring goes to the gnd pin closest to the oscillator pins. > According to what some believe, this would be the "analog" > gnd. However: > > 1 - why would they put an analog gnd right next to the OSC > pins - which > are the noisiest points on the chip? > > 2 - why do I measure only 2 ohms between the 2 gnd pins [same > value as 2 > ohms between the Vdd pins] if they are really separate? > > 3 - Would you call this pin an analog gnd on a 40-pin PIC with no A/D, > like 16C65/67? And does the pin float on those chips? I doubt it. In hopes of getting some closure on this thread, I dragged out an old windowed PIC16C65B and a multimeter. There are about 5 ohms resistance between the two grounds and mega ohms resistance between the grounds and some randomly sampled other pins. > Personally, I don't think this pin is an "analog" gnd pin, per se, and > I do believe is it hardwired directly to the other gnd pin internally > in the chip. I'd have to side with you on this one. -Mike -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

Gentlemen, let us seperate issues as best we can; I believe that the ring around the crystal pins, or around the plus and minus of an opamp, or whatever ring you make is intended as an electrostatic (capacitive couple) shield. The coupling of any nearby trace will hit the ring first and protect the sensitive high impedance nodes. The ground issues that this thread is founded on are more likely driving towards eliminating errors caused by trace impedances. Say a relay shared a ground trace with the amplifier going into an A/D. When the relay closes, the additional 50mA will cause a DC drop across the ground trace, and thus introduce an error at the opamp. This may be minor, but I have had the return resistor in a high gain circuit misplaced and it amounted to a sub 10% error. The idea extends in more subtle ways to impedance. I doubt if any of the general PIC circuits in average use use frequencies high enough to introduce classsic high speed issues, such as ringing and trace termination, but you still have to be wary of the real impedance of a trace based on inductance. The two ground pins on the PIC are relatively important. I laid out a board for a 73 once with the analog side ground pin floating. The A/D converter was significanly off, 30 or 40 bits if I recall. It took me a while to find, cause the meter showed some tens of millivolts on the pin, and you naturally assume that means ground. The DC drop mentioned above where the 5 ohm resistance drops a DC loss is introducing a gross error. Do not assume that it will just introduce a zero offset. Use these examples of the phenomenon to pick and choose your ground strategy carefully. There is clearly no one right answer. Remember to star the grounds all back to one central point, if possible, and if not then the branches of the star will have islands of importance. If an analog front end has three stages and then both go to an A/D, run a ground through each of the sections that come together at the A/D. If necessary you should run two grounds parallel back to the central point. If you feel foolish, that you could be saving the real estate, then get over the trepadation and run them parallel. If you think that it is a waste, just check out the board in a Japanese consumer good. They frequently have a star ground that looks like an octopus in the copper. Chris~ "Dipperstein, Michael" wrote: {Quote hidden}> > > From: Dan Michaels [RemoveMEoricomEraseMEEraseMEuswest.net] > > [SNIP] > > > Ummm, my gnd ring goes to the gnd pin closest to the oscillator pins. > > According to what some believe, this would be the "analog" > > gnd. However: > > > > 1 - why would they put an analog gnd right next to the OSC > > pins - which > > are the noisiest points on the chip? > > > > 2 - why do I measure only 2 ohms between the 2 gnd pins [same > > value as 2 > > ohms between the Vdd pins] if they are really separate? > > > > 3 - Would you call this pin an analog gnd on a 40-pin PIC with no A/D, > > like 16C65/67? And does the pin float on those chips? I doubt it. > -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

Good to see I wasn't hallucinating on a monday morning after a hard weekend of fun and games! Dipperstein, Michael wrote: {Quote hidden}>> From: Dan Michaels [RemoveMEoricomspam_OUTKILLspamuswest.net] > >[SNIP] > >> Ummm, my gnd ring goes to the gnd pin closest to the oscillator pins. >> According to what some believe, this would be the "analog" >> gnd. However: >> >> 1 - why would they put an analog gnd right next to the OSC >> pins - which >> are the noisiest points on the chip? >> >> 2 - why do I measure only 2 ohms between the 2 gnd pins [same >> value as 2 >> ohms between the Vdd pins] if they are really separate? >> >> 3 - Would you call this pin an analog gnd on a 40-pin PIC with no A/D, >> like 16C65/67? And does the pin float on those chips? I doubt it. > >In hopes of getting some closure on this thread, I dragged out an old windowed >PIC16C65B and a multimeter. There are about 5 ohms resistance between the two >grounds and mega ohms resistance between the grounds and some randomly sampled >other pins. > >> Personally, I don't think this pin is an "analog" gnd pin, per se, and >> I do believe is it hardwired directly to the other gnd pin internally >> in the chip. > >I'd have to side with you on this one. > >-Mike > >-- >http://www.piclist.com hint: PICList Posts must start with ONE topic: >[PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads > > > > -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

Chris Eddy wrote: >Gentlemen, let us seperate issues as best we can; > >I believe that the ring around the crystal pins, or around the plus and >minus of an opamp, or whatever ring you make is intended as an >electrostatic (capacitive couple) shield. The coupling of any nearby >trace will hit the ring first and protect the sensitive high impedance >nodes. > Most discussions I have seen about guard rings concern their use at opamp input pins, but I use them around my xtal pins, as a means to help shield high-frequency noise from getting "out". However, I have no empirical evidence regarding their effectiveness. ================== >The ground issues that this thread is founded on are more likely driving >towards eliminating errors caused by trace impedances. Say a relay >shared a ground trace with the amplifier going into an A/D. When the >relay closes, the additional 50mA will cause a DC drop across the ground >trace, and thus introduce an error at the opamp. This may be minor, but >I have had the return resistor in a high gain circuit misplaced and it >amounted to a sub 10% error. > This would certainly be a bad idea. ========= > >The two ground pins on the PIC are relatively important. I laid out a >board for a 73 once with the analog side ground pin floating. The A/D >converter was significanly off, 30 or 40 bits if I recall. It took me a >while to find, cause the meter showed some tens of millivolts on the >pin, and you naturally assume that means ground. The DC drop mentioned >above where the 5 ohm resistance drops a DC loss is introducing a gross >error. Do not assume that it will just introduce a zero offset. > Hmmm, I wonder what would happen if you assume the gnd pin next to the A/D channels on the PIC is actually an "analog" gnd, so you then connected it to the analog opamp circuitry with its separate gnd bus routed back at the power insertion point in octopus manner, and did NOT connect it by pcb trace to the digital gnd pin. Sounds like this would be worse than treating it like the common digital gnd that [I assume] it is. OTOH, if you assume the pin is a digital gnd, and do not tie your seaprate analog gnd bus to it, but route that bus in octopus fashion, do you not still have a potential A/D LSB error? =========== >Use these examples of the phenomenon to pick and choose your ground >strategy carefully. There is clearly no one right answer. Remember to >star the grounds all back to one central point, if possible, and if not >then the branches of the star will have islands of importance. If an >analog front end has three stages and then both go to an A/D, run a >ground through each of the sections that come together at the A/D. > So this means running a gnd from the analog circuitry directly to the gnd pin on the PIC near the A/D pins, even though it is not an analog gnd, per se? - [or not?] And what if you have a separate A/D, in addition to the one in the PIC? [damn, I'm glad this stuff is so easy to figure out]. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

Dan Michaels wrote: > > Hmmm, I wonder what would happen if you assume the gnd pin next to the > A/D channels on the PIC is actually an "analog" gnd, so you then connected > it to the analog opamp circuitry with its separate gnd bus routed back at > the power insertion point in octopus manner, and did NOT connect it by > pcb trace to the digital gnd pin. > > Sounds like this would be worse than treating it like the common digital > gnd that [I assume] it is. > I spoke briefly with one of the Microchip fellows in Arizona, and he confirmed that the ground pin next to the port A pins is used internally in a way that is much closer to the A/D converter, and is thus meant to be the analog ground. The issue was never that important with the 8 bit converter, which Dr. Seuss could make work. The issue will become more and more important with 10 and especially 12 bit converters in the 873, 773 and others. The important thing to remember is reference point. If the octopus leaves the analog pin on the converter, and the signals are all referenced to that point, and extraneous currents are not expected to pass through the net to the digial side, then I predict that you will have arrived at electron narvana. The last piece of the puzzle, if you have a ground more like a tree of branches, is where to link in the power supply. I had a design with lots of real high gain low noise stuff on it, in addition to a whole raft of A/D and D/A and a PC104 processor. The first design worked like shit. The digital noise was crushing the signals. We then made two seperate boards, one for analog and one for digital. Seperate supplies. And optos for digital signals, and coax with differential recievers for analog signals. The results were breathtaking. The digital noise was nearly absent, and the final result was an A+. I know that this is an extreme example, but just consider doing some of these things on the board itself. Seperate ground planes. Seperate regulators for analog and digital. Deliver signals differential and use an IA at the receiver. This all presumes you have identified a real fault to begin with. If you run the converter without a software filter, and put a fixed input to the front end, and display the value, if properly done you should be able to sit on a bit. Some assume that if you add a software filter, who cares about 4 bits of noise? This is a lazy approach to the problem, especially when the answer is a change in the pattern on the board. Also, I never used anti alias filters before, as I always said that none of my signals had frequencies over the sample rate (/2). I was mistaken. I have no initial sources of higher frequencies, but after adding power supply noise, opamp noise, thermal noise, resistor noise, and noise of my kids playing in the background, do not be suprised to find 3 bits of noise on your signal. Just put a Salen Key in front of your A/D. You will be impressed with the lack of noise. This method is especially important when you have 12 bits or more. Chris~ -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

John Walshe wrote: >Hi guys, > I tend to work with the PICs at a bare die level and can help with some >one of the questions rising here. When working at the die level, the >opportunity exists to separate the Analogue power and ground connections. >For example on the 16C73A there are four(4) die bond pads for Vss beside the >OSC1 pad. Three of these are Vss and one is AVss. In the packaged part these >are all bonded together onto the same pin i.e. the Vss beside the OSC1 pin. >Similarly the AVdd shares the Vdd pin beside RB0. > >This is common throughout the PIC range. > Hi John, great information. Do you know the manner is which gnd pin 8 is internally connected to gnd pin 19? Also, is there a "separate" die bond pad for AVdd which is bonded to Vdd, or only one pad? Lastly, any idea about connections to Vdd pin 11 on 40-pin parts? thanks, - dan michaels http://www.oricomtech.com ========================= -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics

Dan Michaels <RemoveMEoricomTakeThisOuTspamUSWEST.NET> wrote: >1 - why would they put an analog gnd right next to the OSC pins - which > are the noisiest points on the chip? They are not necessarily the noisiest for the analog part. Remember that the A/D runs much slower than the clock so any noise induced by the clock will 'disappear' by being integrated. Or at least that is what should happen. >2 - why do I measure only 2 ohms between the 2 gnd pins [same value as 2 > ohms between the Vdd pins] if they are really separate? Because they are connected to the same power grid on chip. 2 ohms may not seem much but if you use a 8 bit A/D at 5V with 0..5V range then 1 LSB is about 20mV, and the current required to produce a 1 LSB error through 2 ohms is only 10 mA. If you don't tie the grounds properly a lit or unlit LED somewhere on the board will influence the A/D redings. With 10 bits the problem is four times worse (allow 2.5mA through the 2 ohm path). With lower A/D reference voltage even worse than that. It kind of turns out that if you do not study the grounds (and other noise sources) then it is extremely unlikely that any designs with A/D better than 8 bits will work at all (at 5V). >3 - Would you call this pin an analog gnd on a 40-pin PIC with no A/D, > like 16C65/67? And does the pin float on those chips? I doubt it. One of my very first blunders years ago was to use a 16C64 without tying the respective Vdd and Vss pins together (16C64 has no A/D). The pins showed connection (less than 2 ohms) but the circuit did not work until I bridged the prototype board between Vdds and Vsss. I did not call them anything ;-). Peter -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.