Post by thread:[EE:] RAM for IDE Bus

Hello all I'm working on a PIC16F877 IDE hard drive interface and I was wondering if someone could suggest a good type of parallel RAM that I could put right on the IDE bus to hold the next 512 bytes of info that I'm reading/writing to the hard drive. I've never used parallel ram before, but I think this should work right? I have 2 or 3 spare pins on the F877 so I would be able to control the CS pin of the ram or whatever it uses. What about pulling some RAM from an oldschool video card (it's in sockets)? Any help/info/ideas would be appreciated. Cheers ===== MJ Brush LeftClick.ca Internet Media Services mbrush@[NOSPAM]leftclick.ca ______________________________________________________________________ Post your free ad now! http://personals.yahoo.ca -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

Thanks for the info. I don't need to make the bus tri-state since all data will be latched or not latched into the devices only when I asked ... right? Thanks {Quote hidden}> That's not difficult. It might be more difficult > finding > them. DigiKey and Mouser never seem to have the size > I > want in stock. Any of the parallel RAM chips you can > find/salvage should be useable. You might have > better > luck at jameco if you want a small quantity of DIP > versions. > > most of the SRAM chips have parallel address and > data > lines. To control, there is typically a /CE (chip > enable) > and a /WE (write enable). Some also have /OE (output > enable - used to tristate the data lines for bus > systems) > > If you're wanting to put it on the IDE bus, you > probably > want a version that has the /OE signal such as > CY62256. > It's rather large for only using 512 bytes, but it's > typical of the interface used by other chips. > > hope that gets you started in the right direction. ===== MJ Brush LeftClick.ca Internet Media Services mbrush@[NOSPAM]leftclick.ca ______________________________________________________________________ Post your free ad now! http://personals.yahoo.ca -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

On Tue, Jun 15, 2004 at 11:47:41AM -0400, Matthew Brush wrote: > Hello all > > I'm working on a PIC16F877 IDE hard drive interface > and I was wondering if someone could suggest a good > type of parallel RAM that I could put right on the IDE > bus to hold the next 512 bytes of info that I'm > reading/writing to the hard drive. Probably some type of static RAM. > I've never used > parallel ram before, but I think this should work > right? It depends. You have to be able to address the ram to do the job. > > I have 2 or 3 spare pins on the F877 so I would be > able to control the CS pin of the ram or whatever it > uses. But agaon what about the addresses? Since it's a sequential interface you may be able to get away with using some counters (like a pair of 74HCT393 ripple counters) to address the memory. Are you using an 8 line IDE data bus or 16? > What about pulling some RAM from an oldschool > video card (it's in sockets)? That's probably DRAM which you want to stay away from. What would really work well is old 386/486 cache ram, which was 20-25ns static RAM. A one minute look around Jameco.com resulted in this part: 242376cl. A 32kx8 35ns cache ram for $2 USD. It can hold 64 sectors worth of data. With only 3 pins left you may need an intermediate control chip. Since you'll only need outputs, because the data bus will share the bus with the IDE, Maybe a 74HC595 may work giving you 8/16/24 outputs for the cost of 3 PIC I/O. BAJ -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

On Tue, Jun 15, 2004 at 12:16:33PM -0400, Matthew Brush wrote: > Thanks for the info. > > I don't need to make the bus tri-state since all data > will be latched or not latched into the devices only > when I asked ... right? Probably. Usually on a RAM the output buffers are only enabled when CS, OE, and Read are all selected. So it is possible to ground OE and only use CE to select. BAJ {Quote hidden}> > Thanks > > > > > That's not difficult. It might be more difficult > > finding > > them. DigiKey and Mouser never seem to have the size > > I > > want in stock. Any of the parallel RAM chips you can > > find/salvage should be useable. You might have > > better > > luck at jameco if you want a small quantity of DIP > > versions. > > > > most of the SRAM chips have parallel address and > > data > > lines. To control, there is typically a /CE (chip > > enable) > > and a /WE (write enable). Some also have /OE (output > > enable - used to tristate the data lines for bus > > systems) > > > > If you're wanting to put it on the IDE bus, you > > probably > > want a version that has the /OE signal such as > > CY62256. > > It's rather large for only using 512 bytes, but it's > > typical of the interface used by other chips. > > > > hope that gets you started in the right direction. > > ===== > MJ Brush > LeftClick.ca Internet Media Services > mbrush@[NOSPAM]leftclick.ca > > ______________________________________________________________________ > Post your free ad now! http://personals.yahoo.ca > > -- > http://www.piclist.com hint: PICList Posts must start with ONE topic: > [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

> But agaon what about the addresses? Since it's a > sequential interface > you may be able to get away with using some counters > (like a pair of 74HCT393 > ripple counters) to address the memory. Are you > using an 8 line IDE data bus > or 16? I'm using 16 bit data base (mostly going from Wesley's IDE Interface, w/o the 8255 and inverters). I figured that since I won't be accessing the IDE drive and the RAM at the same time, I could share the 16 datalines and some of the control lines (by holding the IDE in RESET) to do addressing and data transfers to the RAM. This won't work? Cheers ===== MJ Brush LeftClick.ca Internet Media Services mbrush@[NOSPAM]leftclick.ca ______________________________________________________________________ Post your free ad now! http://personals.yahoo.ca -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

These are the RAM chips that I salvaged from an old video card: http://www.jameco.com/Jameco/Products/ProdDS/93374.pdf I was thinking I could put 2 chips' address inputs on the high byte of the IDE data bus, and then put each of their 4 IO pins on the low/high 4 bits of the low byte of the IDE databus. This way I believe I could write two chips simultaneously (so 8bits at a time) and each chip would use the same memory addresses. I think this would be pretty easy for reading/writing to the RAM. What do you think? ===== MJ Brush LeftClick.ca Internet Media Services mbrush@[NOSPAM]leftclick.ca ______________________________________________________________________ Post your free ad now! http://personals.yahoo.ca -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

On Tue, Jun 15, 2004 at 02:53:12PM -0400, Matthew Brush wrote: > These are the RAM chips that I salvaged from an old > video card: > > http://www.jameco.com/Jameco/Products/ProdDS/93374.pdf > > I was thinking I could put 2 chips' address inputs on > the high byte of the IDE data bus, and then put each > of their 4 IO pins on the low/high 4 bits of the low > byte of the IDE databus. This way I believe I could > write two chips simultaneously (so 8bits at a time) > and each chip would use the same memory addresses. I > think this would be pretty easy for reading/writing to > the RAM. > > What do you think? DRAM. Much tougher to handle than SRAM. To be honest if you have to ask the question "What do you think?" then the answer is a firm NO! Get static RAM. it'll simplify your project tremendously. BAJ -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

> Get static RAM. it'll simplify your project > tremendously. Bah, I probably don't even need more RAM in this project. Speed isn't an issue really, and I'm using a PIC16F877A putting data on a hard drive either thru serial or parallel port of a PC. I just thought it would be interesting to try, but I don't need any extra headaches :) Thanks for the advice. While were on the topic of RAM, I have a whole pile of EDO ram from old computers sitting around, any ideas where I can find the pinouts and/or some interfacing information? A brief search on google didn't turn up much. Thanks again, Cheers! ===== MJ Brush LeftClick.ca Internet Media Services mbrush@[NOSPAM]leftclick.ca ______________________________________________________________________ Post your free ad now! http://personals.yahoo.ca -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads

On Tue, 15 Jun 2004 12:19:40 -0400 Byron A Jeff <spam_OUTbyronTakeThisOuTCC.GATECH.EDU> wrote: >That's probably DRAM which you want to stay away from. What would really >work well is old 386/486 cache ram, which was 20-25ns static RAM. A one >minute look around Jameco.com resulted in this part: 242376cl. A 32kx8 >35ns cache ram for $2 USD. It can hold 64 sectors worth of data. They're out of stock of that RAM. I tried to order some a few days ago, they said they'd have more on the 23rd. -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics