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PICList Thread
'[sxtech] Surface mount components'
2000\07\13@142439 by sxtech

picon face
Well, now that I've successfully created a circuit board using the
expose/develop/etch method, I want to try my hand using surface mount parts.
I successfully soldered a SM chip in a SOIC package (I think it was SOIC) to
a premade board I had (surf board) and would like to begin usin SM parts on
the circuit boards I make.

Problem I currently have is not knowing what the physical dimensions are of
the various surface mount packages of passive components such as resistors.
I was out shopping this morning and saw devices listed as being in a 603 and
1206 package (and one that started with an 8, but don't remember the rest),
but am not sure what I really want to order since I don't know how big each
package is.

The other thing I ran into is that Allied only sells SM resistors in reels
of 5000!  While $17 is not out of my budget, I just really don't need 5k
resistors hanging around.  Where do you guys go for hobby quantify of
surface mount parts such as resistors and capacitors?  I need to start my
collection of SM parts; everything I have now is all through hole.

Any information is appreciated.

-- Mitch





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Parallax SX tech support:   (916) 624-8333

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'[PICLIST] [sxtech] [OT] Looking For a Used HP5L Pr'
2000\09\02@043723 by sxtech
picon face
Fellow List Members,

I know this is really off topic but a MD friend of mine is trying to find a
used (or new) HP5L laser printer in good condition.  The reason for this need
is he is locked into a particular software package which supports very few
laser printers and the HP5L was the one his office purchased for him.  I went
to the HP web site and even called HP without success (The Model HP5L is
considered obsolete).

If any of you members of these lists want to get a newer printer now might be
an opportunity to sell your older HP5L and use the proceeds to move into a
newer model.

If you have one please E-mail me with a price if you are interested.

Thanks and Regards,
Ed

Egroups help: http://www.egroups.com/info/help/main.html

Parallax SX tech support:   (916) 624-8333

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'[PICLIST] [SX]: VP (Bit Bang) Serial ISR Calculato'
2000\10\11@162703 by jamesnewton
picon face
For any Scenix users, or for PIC users who want to bit bang serial comms,
I've put up a new page at
http://www.sxlist.com/isrcalc.asp
that helps find what baud rates can be supported by a given clock rate, RTCC
pre-scale, RTCC Increment and ISR multiplex divider. It is an extension of
the one I converted from Andy Kunz's code at
www.piclist.com/../microchip/spbrgcalc.asp
This was necessary as there are a lot more variables involved in bit banged
serial.

The exhaustive search can be restricted to a list of one or more clock
speeds, prescales, Max RTCC Increment, Max UART ISR Subroutine Call Divide
Rate, Baud Rates, and allowable error percentage. For the PIC, set the
prescale to 1.

The ISR code supported by the routine would look something like:
;UNTESTED CODE

               bank    serial                  ;switch to serial register bank

:transmit
       djnz tx_divide,:receive ;only do it every tx_divide ISRs
       mov tx_divide,#RS232ISRDiv
       test tx_count           ;and not at all if we have no bits to send
       jz :receive             ; maybe we are recieving
       clc                     ;shift in 0's for a stop bit at end of tx_count
       rr tx_high              ;
       rr tx_low               ;
       movb RS232Tx, c         ;copy the carry from the bottom of tx_low
                               ;to the output pin

;
:receive
       movb c,RS232Rx          ;get current rx bit
       test rx_count           ;currently receiving byte?
       jnz :rxbit              ;if so, jump ahead
       mov w,#9                ;in case start, ready 9 bits
       sc                      ;skip ahead if not start bit
       mov rx_count,w          ;it is, so renew bit count
       mov w, #RS232StartDelay
       mov rx_divide,w         ;ready 1.5 bit periods
:rxbit
       djnz rx_divide,:Out     ;middle of next bit?
       mov w,#RS232ISRDiv
       mov rx_divide,w         ;yes, ready 1 bit period
       dec rx_count            ;last bit?
       sz                      ;if not
       rr      rx_byte         ;  then save bit
       jnz :Out                ;if so
       sc                      ; and if its a valid stop bit
       setb    RS232RxFrameErr ;  set error flag
       setb    RS232Rx_flag    ;  then set flag
:Out


and is based on the following equates for the SXKey:

;EQUATES
*************************************************************************

OptRTCisW       =       %01111111       ;And with Opts to make register 1 show W
OptRTCEnable    =       %10111111       ;And with Opts to enable rtcc interrupt
OptRTCInternal  =       %11011111       ;And with Opts to make rtcc internal
OptRTCIntLead   =       %11101111       ;And with Opts to make rtcc inc on Leading edge
OptRTCPrescale  =       %11110111       ;And with Opts to enable rtcc prescaler
Opts            =       %11111000       ;base Options. Last 3 bits are the PreScale divider.

IF CpuMhz = 100
OptPreScale     =       8
IntPeriod       =       217             ;will be subtracted from 256 to inc RTCC
myOpts          =       Opts & OptRTCEnable & OptRTCInternal & OptRTCisW
ENDIF

IF CpuMhz = 75
OptPreScale     =       8
IntPeriod       =       244             ;will be subtracted from 256 to inc RTCC
myOpts          =       Opts & OptRTCEnable & OptRTCInternal & OptRTCisW
ENDIF

IF CpuMhz = 50
OptPreScale     =       4
IntPeriod       =       217             ;will be subtracted from 256 to inc RTCC
myOpts          =       Opts & OptRTCEnable & OptRTCInternal & OptRTCisW
ENDIF
;217 is a magic number that "just works" at 50 or 100Mhz for RS232
irrespective
;of the Pre Scale. Use 244 most often for 75MHz. See
;www.sxlist.com/techref/scenix/isrcalc.asp
;to calculate other options
;217*4=868 cycles per interrupt.
;57,604 Hz interrupt rate 0.000,017,36 seconds per interrupt


;PreScaleBits
;000=1:2, 001=1:4, 010=1:8, 011=1:16, 100=1:32,
; 101=1:64, 110=1:128, 111=1:256
OptPreScaleBits = ((OptPreScale>3)&1) + ((OptPreScale>7)&1)
OptPreScaleBits = OptPreScaleBits + ((OptPreScale>15)&1) +
((OptPreScale>31)&1)
OptPreScaleBits = OptPreScaleBits + ((OptPreScale>63)&1) +
((OptPreScale>127)&1)
OptPreScaleBits = OptPreScaleBits + ((OptPreScale>255)&1)
IF OptPreScale > 1
       IF OptPreScale <> 2<<OptPreScaleBits
;Just incase an invalid PreScale was selected
       ERROR 'invalid Prescale value'
       ELSE
myOpts          =       myOpts & OptRTCPrescale | OptPreScaleBits
               ENDIF
ELSE
myOpts          =       myOpts | (255^OptRTCPreScale)

       ENDIF

ISRRate = 0
IF myOpts & OptRTCEnable AND myOpts & OptRTCInternal
       MaxISRCycles = OptPreScale * IntPeriod
       ISRRate = cpuMHz*1000000 / MaxISRCycles
       ENDIF

; The following three values determine the UART baud rate.
;  Baud rate = cpuMHz/(RS232ISRDiv * MaxISRCycles)
;            = cpuMHz/(RS232ISRDiv * OptPreScale * IntPeriod)
;
RS232BaudRate   =       9600
RS232ISRDiv     =       ISRRate / RS232BaudRate
IF RS232ISRDiv < 1 or RS232ISRDiv > 255
       ERROR 'RS232BaudRate incompatible with cpuMhz and OptPreScale'
       ENDIF
; The start delay value must be set equal to RS232ISRDiv * 1.5 + 1
RS232StartDelay =       RS232ISRDiv + (RS232ISRDiv>>1) + 1

WKPND_B         =       $09
WKED_B          =       $0A
WKEN_B          =       $0B
TRIS            =       $1F


Let me know if you have any interest, comments or questions.

---
James Newton .....jamesnewtonKILLspamspam.....geocities.com 1-619-652-0593

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'[SX]: VP (Bit Bang) Serial ISR Calculator'
2000\10\11@162703 by jamesnewton

picon face
For any Scenix users, or for PIC users who want to bit bang serial comms,
I've put up a new page at
http://www.sxlist.com/isrcalc.asp
that helps find what baud rates can be supported by a given clock rate, RTCC
pre-scale, RTCC Increment and ISR multiplex divider. It is an extension of
the one I converted from Andy Kunz's code at
www.piclist.com/../microchip/spbrgcalc.asp
This was necessary as there are a lot more variables involved in bit banged
serial.

The exhaustive search can be restricted to a list of one or more clock
speeds, prescales, Max RTCC Increment, Max UART ISR Subroutine Call Divide
Rate, Baud Rates, and allowable error percentage. For the PIC, set the
prescale to 1.

The ISR code supported by the routine would look something like:
;UNTESTED CODE

               bank    serial                  ;switch to serial register bank

:transmit
       djnz tx_divide,:receive ;only do it every tx_divide ISRs
       mov tx_divide,#RS232ISRDiv
       test tx_count           ;and not at all if we have no bits to send
       jz :receive             ; maybe we are recieving
       clc                     ;shift in 0's for a stop bit at end of tx_count
       rr tx_high              ;
       rr tx_low               ;
       movb RS232Tx, c         ;copy the carry from the bottom of tx_low
                               ;to the output pin

;
:receive
       movb c,RS232Rx          ;get current rx bit
       test rx_count           ;currently receiving byte?
       jnz :rxbit              ;if so, jump ahead
       mov w,#9                ;in case start, ready 9 bits
       sc                      ;skip ahead if not start bit
       mov rx_count,w          ;it is, so renew bit count
       mov w, #RS232StartDelay
       mov rx_divide,w         ;ready 1.5 bit periods
:rxbit
       djnz rx_divide,:Out     ;middle of next bit?
       mov w,#RS232ISRDiv
       mov rx_divide,w         ;yes, ready 1 bit period
       dec rx_count            ;last bit?
       sz                      ;if not
       rr      rx_byte         ;  then save bit
       jnz :Out                ;if so
       sc                      ; and if its a valid stop bit
       setb    RS232RxFrameErr ;  set error flag
       setb    RS232Rx_flag    ;  then set flag
:Out


and is based on the following equates for the SXKey:

;EQUATES
*************************************************************************

OptRTCisW       =       %01111111       ;And with Opts to make register 1 show W
OptRTCEnable    =       %10111111       ;And with Opts to enable rtcc interrupt
OptRTCInternal  =       %11011111       ;And with Opts to make rtcc internal
OptRTCIntLead   =       %11101111       ;And with Opts to make rtcc inc on Leading edge
OptRTCPrescale  =       %11110111       ;And with Opts to enable rtcc prescaler
Opts            =       %11111000       ;base Options. Last 3 bits are the PreScale divider.

IF CpuMhz = 100
OptPreScale     =       8
IntPeriod       =       217             ;will be subtracted from 256 to inc RTCC
myOpts          =       Opts & OptRTCEnable & OptRTCInternal & OptRTCisW
ENDIF

IF CpuMhz = 75
OptPreScale     =       8
IntPeriod       =       244             ;will be subtracted from 256 to inc RTCC
myOpts          =       Opts & OptRTCEnable & OptRTCInternal & OptRTCisW
ENDIF

IF CpuMhz = 50
OptPreScale     =       4
IntPeriod       =       217             ;will be subtracted from 256 to inc RTCC
myOpts          =       Opts & OptRTCEnable & OptRTCInternal & OptRTCisW
ENDIF
;217 is a magic number that "just works" at 50 or 100Mhz for RS232
irrespective
;of the Pre Scale. Use 244 most often for 75MHz. See
;www.sxlist.com/techref/scenix/isrcalc.asp
;to calculate other options
;217*4=868 cycles per interrupt.
;57,604 Hz interrupt rate 0.000,017,36 seconds per interrupt


;PreScaleBits
;000=1:2, 001=1:4, 010=1:8, 011=1:16, 100=1:32,
; 101=1:64, 110=1:128, 111=1:256
OptPreScaleBits = ((OptPreScale>3)&1) + ((OptPreScale>7)&1)
OptPreScaleBits = OptPreScaleBits + ((OptPreScale>15)&1) +
((OptPreScale>31)&1)
OptPreScaleBits = OptPreScaleBits + ((OptPreScale>63)&1) +
((OptPreScale>127)&1)
OptPreScaleBits = OptPreScaleBits + ((OptPreScale>255)&1)
IF OptPreScale > 1
       IF OptPreScale <> 2<<OptPreScaleBits
;Just incase an invalid PreScale was selected
       ERROR 'invalid Prescale value'
       ELSE
myOpts          =       myOpts & OptRTCPrescale | OptPreScaleBits
               ENDIF
ELSE
myOpts          =       myOpts | (255^OptRTCPreScale)

       ENDIF

ISRRate = 0
IF myOpts & OptRTCEnable AND myOpts & OptRTCInternal
       MaxISRCycles = OptPreScale * IntPeriod
       ISRRate = cpuMHz*1000000 / MaxISRCycles
       ENDIF

; The following three values determine the UART baud rate.
;  Baud rate = cpuMHz/(RS232ISRDiv * MaxISRCycles)
;            = cpuMHz/(RS232ISRDiv * OptPreScale * IntPeriod)
;
RS232BaudRate   =       9600
RS232ISRDiv     =       ISRRate / RS232BaudRate
IF RS232ISRDiv < 1 or RS232ISRDiv > 255
       ERROR 'RS232BaudRate incompatible with cpuMhz and OptPreScale'
       ENDIF
; The start delay value must be set equal to RS232ISRDiv * 1.5 + 1
RS232StartDelay =       RS232ISRDiv + (RS232ISRDiv>>1) + 1

WKPND_B         =       $09
WKED_B          =       $0A
WKEN_B          =       $0B
TRIS            =       $1F


Let me know if you have any interest, comments or questions.

---
James Newton EraseMEjamesnewtonspam_OUTspamTakeThisOuTgeocities.com 1-619-652-0593

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'[sxtech] [SX]: math or load of PC ALWAYs clears PC'
2000\10\17@140425 by sxtech

picon face
I'll document that at the
http://www.sxlist.com
site, but shouldn't that be in the datasheet or errata or somewhere?

---
James Newton
1-619-652-0593
http://www.sxlist.com
jamesnewtonspamspam_OUTgeocities.com

{Original Message removed}

'[SX]: math or load of PC ALWAYs clears PC.8?'
2000\10\17@141423 by jamesnewton

picon face
Ok, here is what I know...

1. When executing a jmp PC+W, on the SX 18,28,etc.. no carry of the addition
from bit 7 to bit 8 of the PC is performed. This means that relative jumps
are restricted to the half page of 256 instructions from which the jump
originates. Understood, well documented.

2. The call instruction clears the 9th bit (bit 8) of the PC so you can only
call into the first 256 instruction half page of each 512 instruction page.
Understood, well documented.

Now, here is the one I want to make sure I'm not missing something on...

3. As far as I can tell, despite this not being documented anywhere, adding,
or-ing, and-ing, moving, etc... an 8 bit value to the PC (bits 0..7) also
results in CLEARING the 9th bit (bit 8) of the PC. So you can only do
relative or computed jumps into the first half page of each page. Just like
calls.

Can some one confirm that? or correct me on that point? or point me to where
that third point (and not the first two points) are documented by ANYONE?

The main thing that concerns me is that the documentation doesn't appear to
me to make that clear. Please prove me wrong.

---
James Newton
1-619-652-0593
http://www.sxlist.com
@spam@jamesnewtonKILLspamspamgeocities.com

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2000\10\17@143640 by jamesnewton

face picon face
I'll document that at the
http://www.sxlist.com
site, but shouldn't that be in the datasheet or errata or somewhere?

---
James Newton
1-619-652-0593
http://www.sxlist.com
RemoveMEjamesnewtonTakeThisOuTspamgeocities.com

{Original Message removed}

'[sxtech] Re: [SX]: math or load of PC ALWAYs clear'
2000\10\17@152458 by sxtech

picon face
That's all great documentation of points 1 and 2 in my post. It does NOT
address point 3, which appears to be completely undocumented.

{Original Message removed}

'[SX]: math or load of PC ALWAYs clears PC.8?'
2000\10\17@153530 by jamesnewton

face picon face
That's all great documentation of points 1 and 2 in my post. It does NOT
address point 3, which appears to be completely undocumented.

{Original Message removed}

'[sxtech] Re: [SX]: math or load of PC ALWAYs clear'
2000\10\21@033825 by sxtech

picon face
Thanks for that.

Seems like this was something that the SX doc's people "assumed" everyone
would know since the SX is 5x compatible.

James Newton
1-619-652-0593
http://www.sxlist.com
spamBeGonejamesnewtonspamBeGonespamgeocities.com


{Original Message removed}

'[SX]: math or load of PC ALWAYs clears PC.8?'
2000\10\21@044800 by James Newton

face picon face
Thanks for that.

Seems like this was something that the SX doc's people "assumed" everyone
would know since the SX is 5x compatible.

James Newton
1-619-652-0593
http://www.sxlist.com
TakeThisOuTjamesnewtonEraseMEspamspam_OUTgeocities.com


{Original Message removed}

'[SX]: Microchip's Math Libraries application notes'
2000\10\22@175442 by James Newton

face picon face
The SX 18 and 28 are fully code compatible with the 16C5x PICs.

Try
http://www.sxlist.com
for Scenix code including lots of math, but not floating point yet. I
believe that is available directly from
http://www.scenix.com


James Newton
RemoveMEjamesnewtonspamTakeThisOuTgeocities.com
1-619-652-0593 phone

{Original Message removed}


'[SX]: external program code on a memory chip'
2000\11\04@134259 by Thomas Robert de Massy
flavicon
face
Hi,
   I heard it's possible on certain microcontroller to store the program
code on an external memory chip to get some extra space. I would like to
know if it's possible with SCENIX's SX28AC chip to get more than 2k of
program memory. If it's possible how can I do it, and what kind of memory
should I use (any other info could be useful)

Thanks

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2000\11\04@152518 by Olin Lathrop

flavicon
face
>     I heard it's possible on certain microcontroller to store the program
> code on an external memory chip to get some extra space. I would like to
> know if it's possible with SCENIX's SX28AC chip to get more than 2k of
> program memory. If it's possible how can I do it, and what kind of memory
> should I use (any other info could be useful)

This doesn't answer you question directly, but some of the 17C PICs can use
external program memory.


*****************************************************************
Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, olinEraseMEspam.....cognivis.com, http://www.cognivis.com

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2000\11\04@190655 by Dan Michaels

flavicon
face
At 01:34 PM 11/04/2000 -0500, you wrote:
>Hi,
>    I heard it's possible on certain microcontroller to store the program
>code on an external memory chip to get some extra space. I would like to
>know if it's possible with SCENIX's SX28AC chip to get more than 2k of
>program memory. If it's possible how can I do it, and what kind of memory
>should I use (any other info could be useful)
>

No [unless I missed something]

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2000\11\05@122958 by w. v. ooijen / f. hanneman

picon face
>     I heard it's possible on certain microcontroller to store the program
> code on an external memory chip to get some extra space. I would like to
> know if it's possible with SCENIX's SX28AC chip to get more than 2k of
> program memory. If it's possible how can I do it, and what kind of memory
> should I use (any other info could be useful)
Short and blunt answer: NO
Wouter

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2000\11\05@142529 by Bob Ammerman

picon face
The SX doesn't support external memory.

Some of the PIC17C series do support external memory.

The PIC18C architecture is specified to support up to 1MByte of external
memory, but, AFAIK, none of the currently avaiable 18C series chips support
the external memory.

Many PICs do provide internally much more than the 2k of program memory that
is available on the SX28.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

{Original Message removed}

'[SX]: Memory layout?'
2000\11\06@132937 by jamesnewton

picon face
Does anyone have some good ideas, doc's or samples that show more automatic
ways of getting the most out of the memory layout of the SX chips? Or the
PIC 16C5x chips?

I'm looking at using macros to re-org and compile jump tables and other
things that use a relative or computed jumps or calls (including all
subroutine entries) in a reserved chunk of "first half of page" memory.
Seems like a hell of a waste.

Ideally I'd like to find and document on the site the "best" layout of
memory in general (to support interrupts, debugging, subroutine placement
and calls, etc...) without having to shuffle things 500,000 times after each
code addition that over-runs the available "first half of page" space or
violates some other memory layout rule or ....

BTW, if you haven't seen the exhaustive "how to do a comparison" table at
www.sxlist.com/../scenix/lib/flow/compcon_sx.htm
and the SXKey Structured Programming macros built from it at
www.sxlist.com/techref/default.asp?url=scenix/keymacs.src
you might want to check it out. This version is much more stable than the
last. My testing hasn't found any bugs in a while so they may just work for
you!


---
James Newton 1-619-652-0593
EraseMEjamesnewtonspamsxlist.com
SX FAQ: http://www.sxlist.com or .org

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2000\11\06@181436 by jamesnewton

face picon face
You sure? If you have an SX Key, try these out... I was playing around while
I was waiting for responses:

Subroutine MACRO
noexpand
;Usage: Define a Global lable, execute Subroutine, assign :Entry to the
value now
;set in SubEntryAddr. Continue the definition of the subroutine. Elsewhere,
call
;@Sub:Entry where Sub is the global lable you defined for the subroutine.
;Example
;SUB1   Subroutine
;:Entry = SubEntryAddr
;....
;       Call SUB1:Entry
_SubAddr = $
org LowHalfPage
SubEntryAddr = $
;if we got here, the pagesel bits must be set for here
IF ($ / $100) = (_SubAddr / $100)
jmp _SubAddr
ELSE
jmp @_SubAddr
 ENDIF
LowHalfPage = $
IF $+1 & $100
  ERROR 'Out of LowHalfPage Space'
  ENDIF
org _SubAddr
ENDM

GotoW MACRO
noexpand
_SaveAddr = $
org LowHalfPage
_GotoWPage = \1
REPT \0
 IF (\% / $100) <> (_GotoWPage / $100)
  _GotoWPage = \%;
  ENDIF
 ENDR
IF ($ / $100) = (_SaveAddr / $100)
cja WReg,\0,_SaveAddr
ELSE
CJA WReg,\0,@_SaveAddr
 ENDIF
IF _GotoWPage <> \1 ;has to be a big table
rl WReg
 IF \0 > 128
jc :TableMiddle
jmp PC+W
  REPT \0
   IF \% < 128
jmp @\%
    ENDIF
   IF $+1 & $100
    ERROR 'Out of LowHalfPage Space'
    ENDIF
   ENDR
  ENDIF ;\0 > 128
 ENDIF ;_GotoWPage <> \1
:TableMiddle
jmp PC+W
REPT \0
 IF _GotoWPage <> \1
  IF \% >= 128
jmp @\%
   ENDIF
 ELSE
jmp \%
  ENDIF
IF $+1 & $100
  ERROR 'Out of LowHalfPage Space'
  ENDIF
 ENDR
LowHalfPage = $
org _SaveAddr
:TableEnd
ENDM

LookupW MACRO
noexpand
;Defines an in-line DW/IREAD lookup table returns the 12 bit value indexed
by W in M:W.
;Affects M and W.
jmp @:TableEnd
:TableBegin
REPT \0
DW \%
ENDR
:TableEnd
MOV M,#:TableBegin>>8  ;upper 4-bits of table address
IREAD                  ;Retrieve data
;{use the data}
ENDM

       org 0
ISR ;Put the ISR here (or just a jump to the ISR somewere eles in memory.
:Out

;Jump tables are assembled here by the SUBROUTINE, and GOTOW macros.
LowHalfPage = $

       org 100
SUB1    Subroutine
:Entry = SubEntryAddr
       jmp :Out
:test
       ;so something
:Out

Main
       GotoW Main, ISR, SUB1
       LookupW Main, ISR, SUB1, 1, 2, 3
       call @SUB1:Entry        ;global call to subroutine
       call SUB1               ;local call to subroutine

---
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RemoveMEjamesnewtonspam_OUTspamKILLspamsxlist.com
SX FAQ: http://www.sxlist.com

{Original Message removed}

'[SX]: [PIC]: Memory layout?'
2000\11\06@191639 by Alexey Vladimirov

flavicon
face
06 Nov 00, RemoveMEjamesnewtonTakeThisOuTspamspamgeocities.com writes to All:

j> Does anyone have some good ideas, doc's or samples that show more automatic
j> ways of getting the most out of the memory layout of the SX chips? Or the
j> PIC 16C5x chips?

I think, the best way - leave it for compiler and memory optimizer.
For example, AS2SX Hitech C postprocessor use very clever optimization
methods and you will get highly optimized compiled code with very small number
of PAGE and BANK commands.

Now it is possible to write programs for Scenix SX on the Hitech PIC C and
debug it on the target hardware with full C-source level support.

SX-DEV development system now integrate well-known Hitech C PICL compiler (free
version included), AS2SX postprocessor, assembler and memory optimizer and
SX-DEV in-circuit debugger/programmer with real-time module - all in one
environment.

More details and software Beta version available at
http://www.svtehs.com/sxdev.htm

Alexey Vladimirov
EraseMEavladspamspamspamBeGonesvtehs.com

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'[SX]: Memory layout?'
2000\11\07@184207 by jamesnewton

face picon face
Ok, those were garbage, but these work a bit better... The idea is that
stuff you need to do with computation on the PC are replaced by a macro that
uses some (minor) smarts to A) compile a replacement (like with iread for
data lookups) B) put the subroutine entry jumps in the first low half page
if the subroutine is not already in the lower half of a code page C) compile
jump tables into the first low half page using page selects with each jump
only if the addresses it needs to get to are on different pages.

As long as there are less than 256 bytes used for the jump to the ISR, the
jumps to subroutines not in low half pages and the jump tables, memory will
take care of itsself... I think...

       RESET reset_entry

LookupW MACRO
noexpand
;Defines an in-line DW/IREAD lookup table which
;returns the 12 bit value indexed by W in M:W.
;Affects M and W.
expand
jmp @$+\0+2
; IF \0
_LookupWTableBegin = $
noexpand
REPT \0
expand
DW \%
noexpand
ENDR
_LookupWTableEnd = $
expand
IF _LookupWTableBegin & $FF <> 0
mov temp,w     ;WARNING temp modified by macro
mov w, #_LookupWTableBegin & $FF
add w, temp    ;offset from start of table
 ENDIF
mov m,#_LookupWTableBegin>>8
IF (_LookupWTableBegin / $100) <> (_LookupWTableEnd / $100)
snc            ;correct if carry
mov m,#_LookupWTableBegin>>8+1
ENDIF
iread          ;Retrieve data
noexpand
;{use the data}
ENDM

Subroutine MACRO
noexpand
;Usage: Define a Global lable, execute Subroutine, assign :Entry to the
value now
;set in SubEntryAddr. Continue the definition of the subroutine. Elsewhere,
call
;@Sub:Entry where Sub is the global lable you defined for the subroutine.
;Example
;SUB1   Subroutine
;:Entry = SubEntryAddr
;....
;       Call SUB1:Entry
_SubAddr = $
IF (_SubAddr & $100) <> 0
 org LowHalfPage
 SubEntryAddr = $
;if we got here, the pagesel bits must be set for here
 IF ($ / $100) = (_SubAddr / $100)
  expand
jmp _SubAddr
  noexpand
 ELSE
  expand
jmp @_SubAddr
  noexpand
  ENDIF
 LowHalfPage = $
 IF $+1 & $100
  ERROR 'Out of LowHalfPage Space'
  ENDIF
 org _SubAddr
ELSE ;The subroutine was already starting in a LowHalfPage
 SubEntryAddr = $
 ENDIF
ENDM

GotoW MACRO
noexpand
_SaveAddr = $
org LowHalfPage
_GotoWPage = \1
REPT \0
 IF (\% / $100) <> (\1 / $100)
  _GotoWPage = \% ;
  ENDIF
 ENDR
IF _GotoWPage <> \1 ;has to be a long jump table
 IF \0 > 127
  ERROR 'Since the addresses are in different pages, long jumps must be
used and no more than 127 entries can be supported'
  ENDIF
ELSE
 IF \0 > 255
  ERROR 'No more than 255 entries can be supported'
  ENDIF
 ENDIF
expand
_GotoWTableBegin = $
IF _GotoWPage = \1 AND (_GotoWPage / $100) <> 0
page \1
 ENDIF
jmp PC+W
noexpand
REPT \0
 IF _GotoWPage <> \1
expand
jmp @\%
noexpand
  IF $+2 & $100
   ERROR 'Out of LowHalfPage Space'
   ENDIF
 ELSE
expand
jmp \%
noexpand
  IF $+1 & $100
   ERROR 'Out of LowHalfPage Space'
   ENDIF
  ENDIF
 ENDR
LowHalfPage = $
org _SaveAddr
IF _GotoWPage <> \1 ;its a long jump table
expand
rl WReg
noexpand
  ENDIF
expand
jmp @_GotoWTableBegin
noexpand
ENDM

       org 0
ISR ;(Interrupt Service Routine) **********************
;put your ISR (or just a jump to it) here.
       jmp @VPS

:Out ;-------------------------------------------------
;The Virtual Peripherals are expected to jump back
; to @ISR:Out when done
       ; << added to correct bug in 9818 chips
               mov m,#WKEN_B   ;Enable Port B interrupts
               mov !rb,#rbIntMask
               mov m,#TRIS     ;Point mode back to ports
       ; end bug fix >>
               mov !option, #myOpts
               mov     w,#-IntPeriod           ;1
               retiw                           ;3
;retiw adds w to RTCC which avoids
;jitter due to variations in ISR path or latency.

TABLES ;***********************************************
;Jump tables are assembled here by the SUBROUTINE,
; and GOTOW macros.
LowHalfPage = $

       org $100        ;Leave space in the first LowHalfpage

STARTUP ***********************************************
reset_entry             ;must be in the first page
       jmp @MAIN

       org $+2 ;Leave space for the debugger

MAIN ;PROGRAM *****************************************
       GotoW Main, $800, ISR, SUB1, $800, $100, $200, $300, $400, $500, $600,
$700, $400, $500, $600, $700, $800
       GotoW Main, SUB1

       LookupW Main,ISR,SUB1, 1, 2, 3, 4095

       call @SUB1:Entry        ;global call to subroutine
;       call SUB1               ;local call to subroutine

VPS ;Virtual Peripherals ******************************
;Time slice kernal goes here
       mov w, --VPSSlice
       snz
       mov w, #VPSCount
       mov VPSSlice, w
       GotoW UART, PWM


UART ;Universal Asynchronous Receiver Transmitter
;(UART) Virtual Peripheral-----------------------------
;etc
       jmp @ISR:Out

PWM ;Pulse Width Modulation Virtual Peripheral --------
;etc
       jmp @ISR:Out


;SUBROUTINES ******************************************
;with luck, the main program and VPS will push this
;into a new LowHalfPage. Subroutines can be rearranged
;manually to help the macros save memory.

SUB1 Subroutine ;======================================
:Entry = SubEntryAddr
       nop
;do stuff
       jc @:Out
:test
       djnc 10,@:test
:Out

---
James Newton 1-619-652-0593
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{Original Message removed}

'[SX]: external program code on a memory chip'
2000\11\08@122303 by Andrew Seddon

picon face
I suppose you could write a assembly interpreter. Much like parallax have done with their SX version of the stamp. Except rather than interpreting basic you could use assembly opcodes. I would imagine code running from external mem would work at at least a factor of 15 slower. I suppose tho you could cache a loop etc in the internal SRAM to prehaps make things a tad quicker. I would however recommend that you simply upgrade to a SX52, essentially 2xSX28`s.
Andrew Seddon

Pants Systems
(contract development of low performance, low function, high-level, high cost software)

Seemed funny at the time bob :-)...
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2000\11\08@124152 by Bob Ammerman

picon face
Pants Systems
(contract development of low performance, low function, high-level, high
cost software)

Seemed funny at the time bob :-)...

Sounds like M$ to me...

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

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2000\11\09@134029 by jamesnewton

face picon face
I think there is something to be said for this approach. The XPL0 core
language interpreter has been implemented in an SX and the basic stamp (with
its' interpreted language) has been very successful.

The key advantage of this is that you get A) in ONE chip (or two at the most
if you count external program memory) B) a very fast, hardware interface,
microcontroller (ala Virtual Peripherals) and C) a slower, more powerful,
general purpose computing engine with a big program memory that can be
external while still only using a few pins.

The problem with the STAMP is that its not configurable. E.g. if I don't
need the DTMF but I do need floating point... oh well.

The problem with XPL0 is that it is not completely debugged (although it is
GPL'd) and people are not showing an interest in it.

---
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{Original Message removed}

'[SX]: Memory layout?'
2000\11\09@145447 by jamesnewton

face picon face
More clean up...
www.sxlist.com/techref/default.asp?url=scenix/keymacs.src
now incorporates all the macros I've written, with more bug fixes, into a
program template and layout that aims to allow very automated coding without
worrying about long or short jumps, or subroutine or jump table placement.

It also automates the building of the options settings for the prescaler,
etc... and lays out some conditionals for number of pins, date code,
processor difference, etc...

---
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{Original Message removed}

'[SX]: external program code on a memory chip'
2000\11\09@160315 by steve

flavicon
face
> The problem with XPL0 is that it is not completely debugged (although it is
> GPL'd) and people are not showing an interest in it.

That may be because it doesn't come up in search engines and I
haven't seen any mention of it other than on this mailing list.
Got a link ?

Steve.

======================================================
Steve Baldwin                Electronic Product Design
TLA Microsystems Ltd         Microcontroller Specialists
PO Box 15-680, New Lynn      http://www.tla.co.nz
Auckland, New Zealand        ph  +64 9 820-2221
email: EraseMEstevebspamEraseMEtla.co.nz      fax +64 9 820-1929
======================================================

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2000\11\09@175714 by jamesnewton

face picon face
Its actually two languages, XPL0 is sort of Pascal like (similar to JAL) but
it compiles to a byte code called I2L which is interpreted by the chip.

http://www.sxlist.com/languages.htm

http://www.sxlist.com/../language/xpl0

Loren Blaney and Richard Ottosen have ported the I2L byte code interpreter
to the SX from the original code written for the 6502 by P.J.R. Boyle, Wayne
Wall, Ted Dunning, Loren Blaney, Larry Fish and Richard Ottosen. I2L is
pretty cool and the license is GPL...

There are also ports for the "8080, 6800, PDP-10, IBM-360, a homebrew
machine, 65802, 680x0, PIC, Scenix, and the 80x86 family used by the PC"
(support for SVGA and mice available for the PC), so you can run a (minimal)
XPL0 program (binary) on at least 8 (very) different processors. Its sort of
like Java, but GPL'd and not that complex.

But that's really not the point. Again, the major advantage that I can see
is that you can have a little bit of very fast code doing hardware related
things and a bunch of slower code (via external serial flash or FRAM) doing
general purpose things.

I have a 10-MAR-2000 Version 1.02 copy of the port (it's written for MPASM
so could even be used on a large PIC) from Richard and Loren
http://www.sxlist.com/xpl0/I2L.ASM

I hope that they don't mind that I've posted it at sxlist.com

---
James Newton
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@spam@jamesnewton@spam@spamspam_OUTsxlist.com
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{Original Message removed}

'[SX]: Irda VP doesn't establish the connection wit'
2000\11\11@184930 by Frank

picon face
Hi there,

I have given a try to the AN16, which is the Irda VP for SX28 on the Scenix web site.

I could make the chip to reply to commands in SX2SX mode, however the two other applications (transparent and SX2PC) are completely dead.

The application note specifies 115.2k com. speed for the uart (debug port) but it actually worked at 38.4k.
Are there more catches?

I would appreciate your comments and experience with it.

Thanks.

Ferenc Vereb
spamBeGonefverebspamKILLspamhotmail.com

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'[PICLIST] FW: [SX]: external program code on a mem'
2000\11\13@103259 by jamesnewton

face picon face
I just received this reply from Loren, and wanted to forward it to the list.

To summarize, the SX port of I2L (compiled XPL0) is at
http://www.sxlist.com/xpl0/I2L.ASM
and the main XPL0 (zero not oh) page is at
http://www.idcomm.com/personal/lorenblaney/

Loren and Richard are very interested in continuing the development of the
language (both of them really) but have not seen any interest(!).

This is a great opportunity to make available the ease of use of the STAMP,
the speed of the SX and, at the same time, solve the program space problem.

If there is any interest at all, I would be willing to put (some) money into
it (prize? pay?), as well as web space, time and what ever else it needs.

---
James Newton
1-619-652-0593
TakeThisOuTjamesnewton.....spamTakeThisOuTsxlist.com
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{Original Message removed}

'[SX]: Scenix_programming_and_debug ?'
2000\11\29@075457 by Alexey Vladimirov

flavicon
face
29 Nov 00, Russell McMahon writes to All:

P> Question:             What are other people using for amateur/hobbyist
P>                       level Scenix programming and debug?

One of the most popular Scenix tools - SX-DEV in-circuit debugger/programmer.
It can be used in power-critical applications (draws less than 5 mA from the
target board), support all features of SX48/52, support low-voltage
applications, have user-selectable frequency source and more...

And now, it include free version of Hitech PICL C compiler with C source-level
debug suport.

Check http://www.svtehs.com/en/products/scenix.htm for more details

For Scenix resoirces check http://www.svtehs.com/scenix.htm

Best regards

Alexey
TakeThisOuTavladKILLspamspamspamsvtehs.com

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Chall'
2000\11\29@143348 by jamesnewton

flavicon
face
SCENIX VIDEO VIRTUAL PERIPHERAL
Design Challenge and Contest

Ok, its time for us Scenix users to put this PIC video thing to rest... We
alone have the speed required in a low cost micro controller to really make
it happen!

Just a few thoughts:
Even at 50MHz on an Scenix SX (and the 100Mhz SX52's are working nicely),
the 52uS video line on a standard TV allows for up to 2600 instructions. At
40 columns that would be 65 instructions per column. 320 dots per line (8
dots per column) would allow 8 instructions per dot. Enough to be shifting
out bits by rotating port A interleaved with indexing a table and looking up
the next character dot line value? 256 dots per line would allow 10.
http://www.efd.lth.se/~e96rg/mc/video/rtvideo.html

The lack of memory is the major limiting factor. With the 52 and about 200
bytes of RAM, we could try for a 40 character by 5 line display. Or 20 x 10.
And if you are displaying only numbers... in BCD that is 400 digits.
(...last 40 Caller ID numbers?, ...video paper tape for a calculator?,
etc...)

And there is enough time (about 600 instructions) between lines to do some
unpacking of the next line...
www.sxlist.com/techref/method/compress/embedded.htm
www.sxlist.com/techref/method/compress.htm
www.sxlist.com/techref/scenix/lib/math/radix/index_sx.htm
...or reading in a new line from an external serial RAM
http://www.sxlist.com/techref/mem/srams.htm
FRAM is $2.95 each for the 2kByte part

To generate character data for 128 characters, a 5 x 7 character matrix is
640 bytes of data in FLASH (hard to rotate though...). Or 1536 bytes with a
8 x 12 matrix. Use IREAD so you won't have any problems with big tables.
Really only need 95 characters. The data is already done for you:
http://www.sxlist.com/techref/datafile/charsets.htm

Here is the current "state of the art" in PIC video character generation.
www.efd.lth.se/~e96rg/mc/mc.html#softvideo
www.efd.lth.se/~e96rg/mc/mechanic/232disp.html
http://www.rt66.com/dthomas/pic/vidclock.html
http://www.brouhaha.com/~eric/pic/pictock.html
http://www.tinaja.com/glib/muse134.pdf
http://www.ubasics.com/adam/pic/archive/picdream.zip

In graphics, 200 bytes is only 1600 dots.. maybe 32 by 50 on the screen. The
gameboy is 160x144. It might be more interesting to make larger "sprites" in
FLASH instead of characters and work out a way to position them anywhere on
a 256 x 256 grid.
http://www.rt66.com/dthomas/pic/pong.html
http://www.brouhaha.com/~eric/pic/picpong.html
http://www.efd.lth.se/~e96rg/mc/video/tetris.html

Why bother?

- Drop-in Big Screen replacement for an LCD panel. Very nice when you need
to see the status of the device you are operating from across the room.
- Combine with RF modulator and small antenna for a wireless status display
from a device in motion... bio monitor, robot, RC car or plane, etc... Could
also overlay video from an on-board camera. Battery level, debugging info,
etc...
- TV overlay kitchen timer. Bake the cake while watching Opra.
- General use: Much cheaper than an LCD panel since you already have a TV.
- Worlds smallest (SMT) video game? School project for the terminal
Playstation addict. Maybe use a standard LCD portable TV. Do they have video
inputs? RF Modulator?
- A small device for the deaf that says "telephone is ringing" etc... on the
TV. Add caption decoding to older TV's?
- All of which pale in comparison to the #1 reason why this would be a cool
thing to do...

...its a really neat HACK!

Also, I like CRT's better than LCD's... So...

I'm announcing the first sxlist.com challenge!

I will pay $100, give away some SX's and do a big write-up on the site for
the first person who can make a 20 character by 4 line NTSC output, standard
Hitachi 44780 command (or RS232 or SPI or I2C or... anything useful) input,
LCD replacement using an SX processor, some resistors, and the right code!

http://www.sxlist.com gets about 10,000 hits a day from 500 or so visitors
(distinct IPs) and I will proclaim that you are an SX Master on every page
for a week with a link to the full write-up of your accomplishment.

Now, if money is what motivates you, and the exposure doesn't bring you any
new customers, you can re-write the code with what you learned (its always
better the second time around), add the RS232 hardware and virtual
peripheral and sell the unit.

Intelligent LCD controllers with 20 x 4 LCD's (and an RS232 input) cost
better than $100. Even if you don't already have a TV (or need a bigger
display) you can buy a 9" professional video monitor for less than that or a
little TV (no video input need RF modulator) for $39 or even a color unit
(with CATV input) for $100 so you might have a Serial Backpack(tm) killer.
(Serial Backpack is a registered trademark of Scott Edwards electronics)
http://www.seetron.com/bpp420_1.htm $79.00
if you can get 40 x 4 it would replace the BPP440
http://www.seetron.com/bpp440_1.htm $159.00

Or build up some competition for bob:
http://www.decadenet.com/bob2/bob2.html
http://www.decadenet.com/bob2/screensht.htm

Fine print:
- With the finished unit, you should be able to unplug the LCD and 44780 (or
RS232 terminal, etc...) from any device and plug in the TV. 4 or 8 bit
interface (either one) is fine. See here for 44780 details:
http://www.sxlist.com/techref/io/lcd/44780.htm

- Must respond to cursor positioning commands as a minimum. I'd really like
to see all the features of the 44780. It would be cool to add some TV
typewriter ability... but leave that for somebody's project or product down
the road.

- Minimum of 64 symbols in the character set although I'd probably settle
for ten (0...9) if the source code was not terribly difficult to extend to
64 or 96 characters for other applications. It would be good to be flexible
on that point as the trade off between character set bitmap data and
application program space is likely to be an issue. A numerical only
character set would free up a lot of code space for calculating the numbers
to be displayed!

- Must work with both PAL and NTSC. Just make it possible to change the
number of lines in each frame between 625 and 525 and you cover the world!

- No restrictions on clock speed. I'd be most happy to see something slower
due to power consumption issues and because you can always re-write tight
code to make it run slower on a faster processor but the other direction...
<GRIN> It might also be good to look at some "best common fit" between baud
rates and video... the RS232 ISR Timing Calculator at
http://www.sxlist.com/techref/scenix/lib/io/osi2/serial/rs232_sx.htm or
www.sxlist.com/techref/scenix/isrcalc.asp
might be helpful.

- The source and design must use a Scenix SX and be GPL'd.

- I'm the judge, jury and executioner, no-one comes to the money except by
me, my decisions are final. ...Always wanted to say that...

- The contest will run from now until the end of January 2001. About 2
months. Something to do over the holidays.

- I WILL award at least half the prize money to SOMEONE and I will post all
entries to the site so send in what you have even if it's not perfect.

Happy hacking!

James Newton
1-619-652-0593
.....jamesnewtonspamRemoveMEsxlist.com
SX FAQ: http://www.sxlist.com

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'[PICLIST] [sxtech] [sx]: SCENIX VIDEO VIRTUAL PERI'
2000\11\29@164233 by Alexey Vladimirov

flavicon
face
29 Nov 00, James Newton writes to All:

s> Ok, its time for us Scenix users to put this PIC video thing to rest... We
s> alone have the speed required in a low cost micro controller to really make
s> it happen!

Yes, it's really good application for the SX...

s> ...or reading in a new line from an external serial RAM
s> http://www.sxlist.com/techref/mem/srams.htm

Probably, one can have some character data at the small external FRAM.
Typical 8x8 CGA/EGA generator is 1024 bytes.

s> FRAM is $2.95 each for the 2kByte part

Sorry, $1.33 for FM24LC16 in single qty, $1.27 for 100 pcs at our
http://www.svtehs.com

s> To generate character data for 128 characters, a 5 x 7 character
s> matrix is 640 bytes of data in FLASH (hard to rotate though...). Or
s> 1536 bytes with a 8 x 12 matrix. Use IREAD so you won't have any
s> problems with big tables. Really only need 95 characters.

External character data looks better, living more program memory for
application and will be easy modified for different codepages (actual for
all non-english countries).

s> - Drop-in Big Screen replacement for an LCD panel. Very nice when you need
s> to see the status of the device you are operating from across the room.

Yes. Something, that can be attached to the same connector, where HD44780-based
LCD indicator already works. Few settings - what indicator it should emulate
(for example, 8x1, 16x1, 24x1, 16x2, 20x2, 20x4, etc...) and how big should be
symbols/digits on the display.

s> - Combine with RF modulator and small antenna for a wireless status
s> display from a device in motion... bio monitor, robot, RC car or
s> plane, etc...

;-) Good idea.

s> Could also overlay video from an on-board camera. Battery level,
s> debugging info, etc...

Exactly.

s> - TV overlay kitchen timer. Bake the cake while watching Opra.

TV overlay urgent e-mail messages from the computer, from the Internet-enabled
washing mashine, like this one
www.lge.com/aboutus/news/pressroom/2000/2000_1012.html
or just for internet-enabled coffee machine, like this
http://www.edevice.com/content/news/newsp3.htm

s> - General use: Much cheaper than an LCD panel since you already have a
s> TV.

With small b/w monitor - yes.

s> - Worlds smallest (SMT) video game?

Already done by some company (sorry, NDA)...

s> - A small device for the deaf that says "telephone is ringing" etc...
s> on the TV.

Yes. Also GSM SMS to TV gateway...


In general, very good idea...

Alexey

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Chall'
2000\11\30@005112 by Russell McMahon

picon face
You need to specify what additional hardware is acceptable.
While you can certainly do it with the processor alone, addition of a single
dot clocked shift register greatly reduces overhead.
Sure, it's then not pure software but if the aim is to be purist rather than
allow a $0.20 part you may have to also exclude any external resonator and
run with the Scenix internal oscillator (at 4 MHz). After all, the resonator
costs rather more than the glue logic needed for a dot clock and shift
register. Then we'll see how it compares to a PIC :-).

>Ok, its time for us Scenix users to put this PIC video thing to rest... We
>alone have the speed required in a low cost micro controller to really make
>it happen!


While we are on the "we alone have ..." thought, look at the Clive "I can do
magic" Sinclair ZX80 which used an ancient and venerable (and venerated?)
Z80 plus a shift register to work video magic. It also managed to pretend to
be a "full" computer during the flyback period. The CISC set-and-forget
block move instruction has it's place :-).

I'm sure the Scenix would be hard to beat in this application using a true
single chip solution but it does wilt rather on other tasks in the face of
some of the competition.




Russell McMahon

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'[SX]: Scenix programming and debug'
2000\11\30@014707 by Dan Michaels

flavicon
face
Russell wrote:
>> Available hardware will suffice for the present project but has led me to
>> wondering what hobbyist level products are in use if I get enthused
>enough
>> to point others towards the SX. I looked at the SX: material on this list
>-
>> not much mention of programmers that I could see. My (less than
>exhaustive)
>> web searches seem to indicate a general lack of resources.
........

Wouter wrote:
>I used fluffy (assuming that is the programmer you mean - 16x84 based) with
>succes, until someone was kind enough to send me some SXBlitz/Key's. NB my
>Jal compiler does support the SX18 and SX28.
>


Hey Wouter, PayPal now does international transfers --> Netherlands is
on the list --> you're no longer a credit card outcast [and people can
buy your stuff, too :-)].

Re SX tools, I have been using the SX-Blitz for 1 1/2 years now - works
great for me - $59 from jameco.com. SX-Key is better + much more $$$$$,
if you really need a Debug capability.

SX resources:

http://www.sxtech.com/
http://www.sx-forum.com/
http://www.svtehs.com/scenix.htm <-- Alexey's site

cya,
- Dan Michaels
Oricom Technologies
http://www.oricomtech.com
=========================

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'[SX]:Oscillator question'
2000\11\30@041733 by rubenj

flavicon
face
Hello all,

I have a design with a SX18 which originally used the internal RC-osc
at 4 MHz. At tests it has showed that this is not accurate enough. I
then switched to a 4MHz ceramic resonator to get better accuracy. I
also have a header with connections to the both osc-pins, 5V and 0V,
used for programming and debugging. However, when I touch this header
with my fingers (the osc-pins) the oscillator frequency goes off and
sometimes the oscillator also stops and won't start again unless I
cycle the power off and on again.

Is this normal behavior or is it something I should be worried about?
Would the same happen if I use a crystal instead?

Thanks in advance / Ruben
==============================
Ruben Jvnsson
AB Liros Elektronik
Box 9124, 200 39 Malmv, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
RemoveMErubenspamspamBeGonepp.sbbs.se
==============================

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Chall'
2000\11\30@054050 by mike

flavicon
face
On Thu, 30 Nov 2000 14:37:08 +1300, you wrote:

>You need to specify what additional hardware is acceptable.
>While you can certainly do it with the processor alone, addition of a single
>dot clocked shift register greatly reduces overhead.
>Sure, it's then not pure software but if the aim is to be purist rather than
>allow a $0.20 part you may have to also exclude any external resonator and
>run with the Scenix internal oscillator (at 4 MHz). After all, the resonator
>costs rather more than the glue logic needed for a dot clock and shift
>register. Then we'll see how it compares to a PIC :-).
If you want to keep the hardware to a minimum, you can of course use
an I/O port as a shift register to get one pixel per cycle using
rotate instructions - this can work well for character based apps,
where you have a gap between bytes to do the reload. The horizontal
flyback time gives you enough time to prepare the next line of data.
I did this awhile ago for an app generating 6 characters per line at
6MHz.
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2000\11\30@075320 by Bob Ammerman

picon face
> While we are on the "we alone have ..." thought, look at the Clive "I can
do
> magic" Sinclair ZX80 which used an ancient and venerable (and venerated?)
> Z80 plus a shift register to work video magic. It also managed to pretend
to
> be a "full" computer during the flyback period. The CISC set-and-forget
> block move instruction has it's place :-).

Correct me if I am wrong, but...

I believe the ZX80 did _not_ use a block move instruction to do the video.
Instead, it set a special flag that indicated that it was about to
_execute_(!) video. When this flag was set the opcodes being fetched from
RAM were routed to the screen. Of course this would confuse the processor
something awful (or else really restrict what could be displayed). So, the
hardware would 'jam' a no-op onto the processor's data bus when the video
flag was set, regardless of what instruction was fetched from memory.

In other words: the program counter of the Z80 became the video refresh
address register.

> I'm sure the Scenix would be hard to beat in this application using a true
> single chip solution but it does wilt rather on other tasks in the face of
> some of the competition.

Sure would be nice to have a built in USART to shift out the dots. That is
how my PIC18C manages to get 432 H x 240 V pixels on the screen, including
animated graphics.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

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'[SX]:Oscillator question'
2000\11\30@115758 by Dan Michaels

flavicon
face
Ruben Jvnsson wrote:
>Hello all,
>
>I have a design with a SX18 which originally used the internal RC-osc
>at 4 MHz. At tests it has showed that this is not accurate enough. I
>then switched to a 4MHz ceramic resonator to get better accuracy. I
>also have a header with connections to the both osc-pins, 5V and 0V,
>used for programming and debugging. However, when I touch this header
>with my fingers (the osc-pins) the oscillator frequency goes off and
>sometimes the oscillator also stops and won't start again unless I
>cycle the power off and on again.
>
>Is this normal behavior or is it something I should be worried about?
>Would the same happen if I use a crystal instead?
>

Hello Ruben, there are many different oscillator selections
on the SX chips, and you might try other selections to see if
something else is more stable. There are also "long" sheets of
errata notes for the SX parts, and you might look thru those
too.

- dan michaels

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2000\11\30@143313 by MIKE

flavicon
face
Yes your fingers will effect/stop the oscillator.
The 'oscillator in' pin in the circuit will be adversly affected by
noise,capacitance and leakage to earth, for this reason I would normally
keep the connections between the xtal/resonator and the device short. I
would not reccomend having it connected to other connectors or anywhere
where it might come into contact or influence of other circuits etc. If it
is being driven by a low impedance source such as an oscillator module then
a more relaxed aproach can be taken.



Regards

Mike Pearce

Neutronics



Hello all,

I have a design with a SX18 which originally used the internal RC-osc
at 4 MHz. At tests it has showed that this is not accurate enough. I
then switched to a 4MHz ceramic resonator to get better accuracy. I
also have a header with connections to the both osc-pins, 5V and 0V,
used for programming and debugging. However, when I touch this header
with my fingers (the osc-pins) the oscillator frequency goes off and
sometimes the oscillator also stops and won't start again unless I
cycle the power off and on again.

Is this normal behavior or is it something I should be worried about?
Would the same happen if I use a crystal instead?

Thanks in advance / Ruben
==============================
Ruben Jvnsson
AB Liros Elektronik
Box 9124, 200 39 Malmv, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
spamBeGoneruben@spam@spamspam_OUTpp.sbbs.se
==============================

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'[SX]: Scenix now UBICOM'
2000\11\30@153834 by jamesnewton

picon face
Scenix has changed its name to UBICOM ("Ubiquitous Communications") to more
accurately reflect its focus on internet connectivity.

The processors are still SX's (no product name changes) and sxlist.com is
still a great resource.

---
James Newton
1-619-652-0593
TakeThisOuTjamesnewtonspamspamsxlist.com
SX FAQ: http://www.sxlist.com

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Chall'
2000\11\30@184853 by Russell McMahon

picon face
>Sure would be nice to have a built in USART to shift out the dots. That is
>how my PIC18C manages to get 432 H x 240 V pixels on the screen, including
>animated graphics.


And how does that compare with the likely software only Scenix performance
using software alone I wonder?


RM

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2000\11\30@190953 by Bob Ammerman

picon face
----- Original Message -----
From: Russell McMahon <apptechEraseMEspamCLEAR.NET.NZ>
To: <RemoveMEPICLISTEraseMEspamspam_OUTMITVMA.MIT.EDU>
Sent: Thursday, November 30, 2000 4:14 PM
Subject: Re: [sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Challenge and
Contest


> >Sure would be nice to have a built in USART to shift out the dots. That
is
> >how my PIC18C manages to get 432 H x 240 V pixels on the screen,
including
> >animated graphics.
>
>
> And how does that compare with the likely software only Scenix performance
> using software alone I wonder?
>

Imagine using a scheme where you store 8 pixels in a PORT register, and feed
the MSBit to the outputs.

Now you could have code that looks like this:

   movwf    PORTx        ; output msbit
   i1
   i2
   i3
   rlf            PORTx,F    ; move to next bit
   i1
   i2
   i3
   rlf           PORTx,F    ; move to next bit
   i1
   i2
   i3

where 'i1', 'i2' and 'i3' are instructions that are getting the next byte of
pixels ready to send.

Note that this gives you 24 instructions to prepare each byte, but they have
to be in little
groups of 3.

I would imagine you'd need at least these 4 instructions per pixel to manage
anything reasonable. It would be hard to do anything conditional in fewer
cycles.

So: PIC = 8 instructions for  8 pixels
and SX = 32 instructions for 8 pixels

Thus for equivalent resolution the SX would need four times the MIPS as the
PIC.

My PIC does 10MIPS, so an SX at 40MIPS should be able to manage it.

However, it would be _very_ tricky coding!  Going to 50MIPs on the SX and 5
instructions per bit might help a lot.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

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2000\11\30@193719 by rottosen

flavicon
face
I did some SX "video" to drive a controllerless graphic LCD. The SX
generates every pixel for this 240x64 pixel LCD using code.

If 26K is not too big, I can post the source files it to the PICList.
:-)

-- Rich

p.s. James, does this count for partial credit in the SX video contest?
I know you said you wanted to eliminate LCD's...



Russell McMahon wrote:
{Quote hidden}

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Chall'
2000\12\01@004048 by rottosen
flavicon
face
Bob:

That is a little hard to answer precisely. The code was never optimized
so I don't have an exact number. My notes say that there is a
perceptible flicker when using a 24MHz oscillator (24 MIPS).

A lot of bit shuffling is done to create a large font with 64 pixels per
character dot. The dots must then be put into appropriate pixels of the
4 quadrants making up the 240 by 64 pixel graphic display.

-- Rich


Bob Ammerman wrote:
>
> {Original Message removed}

2000\12\01@020130 by James Newton

face picon face
Excellent! That code will be very useful for LCD projects. Part of it will
undoubtedly apply to the SX video contest, but I hope someone will post a
video solution in the future.

James Newton, PICList Admin #3
@spam@jamesnewtonRemoveMEspamEraseMEpiclist.com
1-619-652-0593 phone
http://www.piclist.com

{Original Message removed}

2000\12\01@021428 by James Newton

face picon face
I believe your analysis is specific to graphic (pixel) data from RAM rather
than character pixel data from program memory with the character selected by
RAM data and that you have not taken into account the SX's IREAD
instruction...
http://www.sxlist.com/techref/scenix/inst.htm
www.sxlist.com/techref/scenix/usersmanual/gohtm/result_86.html
which does a one cycle lookup of a memory location any where in program
memory (character data) addressed by the combination of the mode register
and W and returns a 12 bit result in mode and W.

I have a chunk of code written (untested) that will put out a pixel from a
character table every other instruction with an extra pixel separation
(black) between each character.

Any takers?

I'll post it tomorrow.

James Newton
EraseMEjamesnewtonspam@spam@sxlist.com
1-619-652-0593 phone
http://www.sxlist.com

{Original Message removed}

2000\12\01@103240 by sxtech

picon face
I believe your analysis is specific to graphic (pixel) data from RAM rather
than character pixel data from program memory with the character selected by
RAM data and that you have not taken into account the SX's IREAD
instruction...
http://www.sxlist.com/techref/scenix/inst.htm
www.sxlist.com/techref/scenix/usersmanual/gohtm/result_86.html
which does a one cycle lookup of a memory location any where in program
memory (character data) addressed by the combination of the mode register
and W and returns a 12 bit result in mode and W.

I have a chunk of code written (untested) that will put out a pixel from a
character table every other instruction with an extra pixel separation
(black) between each character.

Any takers?

I'll post it tomorrow.

James Newton
@spam@jamesnewtonspam_OUTspam.....sxlist.com
1-619-652-0593 phone
http://www.sxlist.com

{Original Message removed}

2000\12\01@131537 by jamesnewton

face picon face
This (TOTALLY UNTESTED OF THE TOP OF MY HEAD) code uses RA as the (4 bit)
shift register so that only 3 IO lines are wasted. RA.0 is the video out
pin.

It assumes a 7 x (ScanLines / Rows) character size with each character pixel
row stored in the lower byte of a 12 bit program memory word and that there
are 256 characters (a kind of a waste but that could be fixed).

It assumes that the SX's built in hardware comparitor is being used as a
Horizontal Sync detector for an external source of video which is being
overlaid with text.


;code for generating a frame of character video using the
;Ubicom (Scenix) SX 18 or 28. See
;http://www.sxlist.com/techref/scenix/contest/video.htm

       mov RowCout, #Rows
:RowLoop
       mov RowScanLine, #(ScanLines/Rows)

;if you wanted to, you could skip a line of video here (between
;rows) and use the time to load a row of character data from
;external RAM or FRAM
;http://www.sxlist.com/techref/mem/srams.htm

:ScanLineLoop
       jnb HorzSync, $ ;wait for the Horizontal sync.
       mov ColCount, #Cols
       mov w, ScanLine ;high pointer into the character generator table
       mov m, w                ;(which character pixel row)
       mov w, ind              ;low pointer into the table (which character)
       iread
:CharScanLoop
       mov ra, w
       mov DataHi, W
       rr ra
       inc fsr
       rr ra
       setb fsr.4
       rr ra
       mov w, <>DataHi
       mov ra, w
       mov w, ind
       rr ra
       iread
       rr ra
       dec ColCount
       rr ra
       jnz :CharScanLoop
;And extra cycle or 2 here just spaces the characters a bit more.
       djnz RowScanLine, :ScanLineLoop
       djnz RowCount, :RowLoop

;each entry in the character generator table needs to have bits 8..11 (the
;top 4 bits of the 12 bit word) set to the top 4 bits of the address of
;that word so that when M is loaded by the IREAD, its value is retained.
;http://www.sxlist.com/techref/datafile/charsets.htm

Well? Does that help? Any comments? Anyone playing with it?

---
James Newton
1-619-652-0593
spamBeGonejamesnewtonEraseMEspamsxlist.com
SX FAQ: http://www.sxlist.com



{Original Message removed}

2000\12\01@132823 by Simon Nield

flavicon
face
>row stored in the lower byte of a 12 bit program memory word and that there
>are 256 characters (a kind of a waste but that could be fixed).

how about 4 bit colour ?
use msb used for "bright", and the other 3 bits for r g and b...

would be impressive to see a colour display from a PIC or a Scenix.

Regards,
Simon

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2000\12\01@141923 by jamesnewton

face picon face
Well, the 12 bit data I was talking about was a part of the character
generator data (the pixels that make up each scan line of a characters
image) so it would always be the same for each character. You could have a
red "A" and a blue "B" or a "C" with alternating green and red scan lines
...sounds pretty silly until you think about "sprites" and video games
...or if the characters are images on a playing field (like pacman or a
chess board) then hard coded character color makes sense.

And how would you find the processing time to display and move the pacman
and ghosts? You put out the board on the even frames and (only) the sprites
on the odd frame. Some tight programming there, but it could be done (I
think).

Now, you could take the top bit of each byte of character data (from RAM)
and put that out on a second pin to bias the character image a bit lighter
or darker
...or use a different scan line loop under each character row to do an
underline
...or invert the pixel data for reverse video.

---
James Newton
1-619-652-0593
RemoveMEjamesnewton@spam@spamspamBeGonesxlist.com
SX FAQ: http://www.sxlist.com



{Original Message removed}

2000\12\01@144822 by rich+piclist

flavicon
face
> While we are on the "we alone have ..." thought, look at the Clive "I
> can do magic" Sinclair ZX80 which used an ancient and venerable (and
> venerated?) Z80 plus a shift register to work video magic. It also
> managed to pretend to be a "full" computer during the flyback period.
> The CISC set-and-forget block move instruction has it's place :-).
Wanna buy one?

http://users.rcn.com/zebra.interport/ts2/index.html

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'[SX]: Hot new Embedded Internet chip announced by '
2000\12\04@163830 by jamesnewton

picon face
Ubicom (formerly Scenix) has announced a hot new chip today...
...details at
http://www.ubicom.com/hardware/IP2022.html

"The IP2022 Internet Processor is the first member of a new family of Ubicom
Internet Processors that can be programmed, and reprogrammed, using
pre-built software modules and configuration tools to create true
single-chip solutions for a wide range of device-to-device and
device-to-human communication applications. It is optimized for Internet and
network connectivity solutions, and is ideally suited for use in the node
and bridge/gateway portions of the Internet infrastructure. The IP2022
offers substantial capabilities that are specifically intended for the
development of highly integrated connected devices, from the communication
physical layer interface through application code.

Networking Software Package
Complete end-to-end solution
Integrated all software based protocol stack and Ethernet MAC/PHY
100% RFC compliant stack
ARP, DHCP, IP, ICMP, UDP, TCP, HTTP, SNMP, SNTP, TFTP, DNS, SLIP, PPP
Embedded networking application layer
Stack configuration tool
Preemptive real-time operating system

Processor Performance
RISC engine core with 100 MIPs operation using 2 MHz clock input
Single-cycle instruction execution on most instructions
8x8 signed/unsigned single-cycle Multiply
3-cycle internal interrupt response, including context save

On-chip Memory
64KB (32Kx16) flash program memory
16KB (8KX16) SRAM shadow program memory
4KB SRAM data memory

General-Purpose Hardware Peripherals
Eight-channel, 10-bit ADC, 48 kHz maximum sampling rate
Differential comparator with hysteresis
Two 16-bit multi-function timers with PWM/Capture/Compare and prescalars
8-bit timer and prescalar
Real-time clock (RTC) timer with 32.767 kHz crystal input

Special Function Hardware Peripherals
Two full-duplex serializer/deserializer (SerDes) channels for 10BaseT
(MAC/PHY), USB, and other fast serial protocol support
Embedded connectivity nodes
Two channels for protocol bridging
Slave parallel/host port interface, 8/16-bit selectable for use as
communication co-processor

In-System Reprogrammability (ISP)
Hardware SPI interface for ISP
Self-programming capability via boot loading method and IWRITE and IERASE
instructions
One-voltage operation, Vpp = Vdd

Low-Power Operation
Operating voltage = 2.5V +/- 10%
Speed instruction for on-the-fly execution speed changes
Selectable clock PLL on/off
Sleep instruction for power-down with wakeup on watchdog or interrupt
RTC timer-independent operation with rest of chip powered down

General
52 general-purpose I/O pins
80-pin 14x20 mm PQFP package
Non-volatile data storage capability
On-chip in-system debug (ISD) support
High-quality development tool chain support from multiple 3rd party vendors:
Cygnus/Red Hat tool chain and Nohau's high-end debugger

Sample quantities of the IP2022 Internet Processor will be available in the
first quarter of 2001. Offered in an 80-pin plastic quad flatpack (PQFP)
package, pricing in quantities of 10,000 will be $13.30.

---
James Newton
1-619-652-0593
.....jamesnewtonRemoveMEspamsxlist.com
SX FAQ: http://www.sxlist.com

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2000\12\04@190613 by Dan Michaels

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At 01:38 PM 12/4/00 -0800, you wrote:
>Ubicom (formerly Scenix) has announced a hot new chip today...
>...details at
>http://www.ubicom.com/hardware/IP2022.html
>

Far out - so they actually "are" becoming a communications
company - more than just in words - he, he.

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2000\12\04@202127 by Sean H. Breheny

face picon face
Wow, that chip sounds great! The only thing I wonder is whether many of
these new chips and software offered for embedded development are going the
way of micro$oft to some extent: creating such a complex system that it
becomes impossible for you to totally debug it. For example, preemptive
multitasking going on behind the scenes.

Sean

At 01:38 PM 12/4/00 -0800, j newton wrote:
>Preemptive real-time operating system

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Chall'
2000\12\06@114416 by jamesnewton

face picon face
Ummm... no, it hasn't been done with an SX as far as I know...

...which is why I'm sponsoring the contest...

see
www.sxlist.com/techref/scenix/contest/video.htm
for links to the current PIC code, ideas, signal specifications and the
challenge and contest rules.

---
James Newton
1-619-652-0593
.....jamesnewtonSTOPspamspam@spam@sxlist.com
SX FAQ: http://www.sxlist.com



{Original Message removed}

2000\12\06@120836 by jamesnewton

face picon face
I've been thinking about sync detect without using an external sync
separator. Doesn't seem to be much on the web about doing that with a
microcontroller...

...but it also seems to me like it ought to be very possible.

Referring to
www.sxlist.com/techref/io/video/ntsc.htm
if we add a check for a sync pulse in the character loop of the code below,
so that it will pick up the sync pulse on the half scan line for even
fields, and count scan lines so we know when to stop on the odd fields, we
can enter a vertical refresh detection loop that counts the width and number
of the pulses...

We just need to look for 5 more fast (double the hsync rate) narrow pulses,
then 6 fast wide pulses, then 6 fast narrow pulses. If we are counting
narrow pulses and we see a wide pulse, then we resync to the wide pulse
loop. If we see hsync rate pulses, we have missed the vertical sync and have
to wait for the next one. If we match up with the entire vertical sync
pattern and then miss one fast pulse, we are on an even field, otherwise we
are starting an odd field.

Doesn't it seem like that could pretty easily be turned into code?

http://www.sxlist.com/techref/scenix/contest/video.htm

---
James Newton
1-619-652-0593
jamesnewtonEraseMEspam@spam@sxlist.com
SX FAQ: http://www.sxlist.com



{Original Message removed}

2000\12\06@212743 by rottosen

flavicon
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James:

I would suggest that you emulate how it is done in dedicated hardware.
See the National Semiconductor LM1881 data sheet for an example.

The vertical sync pulses are separated using an integrator and
comparators. This could be implemented using up/down counters in
software. When the counter crosses a threshold value that is the
beginning or end of the vertical sync region.

A retriggerable one shot can be used to get the horizontal pulses. Set
the one shot time to be longer than a serration or equalizing pulse
spacing but shorter than a horizontal line period. This can be done with
software counters as well.

Once you have the horizontal and vertical separated, you do similar
tricks using them together to get the odd/even field signal.


-- Rich



James Newton wrote:
{Quote hidden}

> {Original Message removed}

2000\12\08@023529 by Nikolai Golovchenko

flavicon
face
James Newton wrote:
> I've been thinking about sync detect without using an external sync
> separator. Doesn't seem to be much on the web about doing that with a
> microcontroller...

> ...but it also seems to me like it ought to be very possible.

Sync detection is sure possible with a SX. I made a quick
test on the evaluation board (50 MHz SX28), just for
horizontal sync, using the comparator to catch the sync
pulses. It works in most cases, but sometimes, when video is
bad quality (noisy, but screen is stable) lines are missed
with that setup.

There are a few problems:

1) Comparator lowest input voltage level is 0.4V. With a 0
to 1V video, sync threshold is at about 0.15V. So it is out of
specs, though seems to be working.

2) Noise. I wonder how screen remains stable even when
signal is noisy. There must be some filtering in a TV. I'll
try to dig the sync separator circuit from an old TV.

3) SX counts the pulse width in a loop like:
       .
       .
       .
measure_ov2
       mov w, #5
       mov dx, w
measure3
       mov w, #128-100
       mov RTCC, w
       mov w, #compMode
measure3a
       mov !RB, w
       mov temp, w
       snb temp.0
        jmp measure_ok
       sb RTCC.7            ;or any other reg my be used for
                            ;counting
        jmp measure3a
       decsz dx
        jmp measure3
;too long - repeat pulse catch
       jmp wait_1
       .
       .
       .

The inner loop takes 8 cycles (without comparator that would
be 6 cycles). So the comparator is sampled every 8 cycles,
and maximum jitter in sync detection is 8 cycles. That can
be visible if SX frequency is too low. Probably, it will be
better to build an external circuit on a transistor and not
use the comparator altogether.

Well, the text over video is a cool idea! I'll play with it
a bit more. :)

Nikolai

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2000\12\08@032825 by Michael Rigby-Jones

flavicon
face
part 1 7048 bytes content-type:multipart/alternative; (decoded quoted-printable)


------_ 2000\12\08@034949 by Sean H. Breheny
face picon face
Hi Mike,

Could you please explain how that circuit works? I haven't had much time to
study it, but simple as it is, it isn't obvious to me.

Thanks,

Sean

At 08:29 AM 12/8/00 +0000, you wrote:


>{Original Message removed}

2000\12\08@041029 by Michael Rigby-Jones

flavicon
face
> -----Original Message-----
> From: Sean H. Breheny [SMTP:spamBeGoneshb7KILLspamspam@spam@CORNELL.EDU]
> Sent: Friday, December 08, 2000 8:50 AM
> To:   PICLISTspam_OUTspam@spam@MITVMA.MIT.EDU
> Subject:      Re: [sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Challenge
> and Co ntest
>
> Hi Mike,
>
> Could you please explain how that circuit works? I haven't had much time
> to
> study it, but simple as it is, it isn't obvious to me.
>
> Thanks,
>
> Sean
>
>
The diode/resistor combination bias the transistors base to a nominal 0.6
volts.  Any negative going signal on the emitter will switch the transistor
on, effectively stopping the emitter swinging below 0 volts.  The video is
AC coupled to the emitter so this ensures the bottom of the sync pulses
cannot be lower than 0 volts.  Theoretically the sync level is always a
fixed amount lower than the black level ( can't remember exactly by how
much), so the video can be processed by a comparator with a fixed reference.

In practice this circuit definitely works, I build the DCFG, and I was most
impressed at seeing TV pictures (in B/W) on my old 286 many years ago.
However, this is definitely not a "production quality" circuit.  A "proper"
circuit would use the back porch part of the video signal to clamp the true
black level to ground, so the size of the sync pulses wouldn't matter.  If
this circuit was set up with a comparator that gave good operation on one
video source, there is no guarantee it would work 100% on another source

Hope that helps, I'm really quite bad at explaining stuff even when I know
how it works :o)

Mike

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2000\12\08@053237 by Simon Nield

flavicon
face
michael:
>ISTR that TV's use a "Flywheel" circuit, which is actualy a phase locked
>loop.  This would give a good degree of noise immunity.  This could probably
>be implemented with the scenix, although I'll leave that as an exercise for
>the reader :o)

use a counter with a variable end count / reset point. when the counter resets to zero this is you
internal H sync.

if the next external sync occurs before your internally generated sync then you decrement the end
count variable. if the external sync occurs after the internal one then you increment the end count
variable.

this will take some time to lock up, but is effectively a fairly heavily damped pll.

(to speed up the initial locking time you could 'crash lock' the counter for a while at power-up:
reset the counter on each external sync and just keep adjusting the end count. when you are 'close
enough' to the right number then stop crash-locking)

locking vertically should be a lot easier now. when you get a V sync in and you are 'near' then end
of the field (vertical counter greater than some arbitrary number) then set a flag to reset the
internal vertical counter on the next H sync generated internally.




another possibility would be to run the device off a voltage controlled video rate clock (13.5MHz or
some multiple of that) and to control that clock frequency with a dac output; change the voltage
rather than the counter length. this would have the advantage of scaling anything you put on the
screen too. not too sure how easy building your own vco would be but it might be as simple as
replacing one of the caps on a standard crystal with a varicap diode...?


regards,
Simon

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2000\12\08@074320 by mike

flavicon
face
>> 2) Noise. I wonder how screen remains stable even when
>> signal is noisy. There must be some filtering in a TV. I'll
>> try to dig the sync separator circuit from an old TV.
>>
>ISTR that TV's use a "Flywheel" circuit, which is actualy a phase locked
>loop.  This would give a good degree of noise immunity.  This could probably
>be implemented with the scenix, although I'll leave that as an exercise for
>the reader :o)
You can also get a big improvement by adding a holdoff, so that when
you get a sync pulse you ignore any input until just before you're
expecting the next one - very simple and pretty effective. Checking
the sync pulse width & rejecting too-short ones can also help.
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2000\12\09@034029 by Nikolai Golovchenko

flavicon
face
Thanks Mike for the circuit.

I assembled it and now it works in my TV. :) By the way,
this is where I experiment with the SX video thing. The TV
is assembled from a black-and-white monitor and a radio
channel block from a TV. The block has a video output with a
DC component of a few volts (about 2V - I didn't measure
it), but the monitor works only for zero DC video signal.
Before I used a 'dirtier' circuit of a 22 uF capacitor and
an adjustable 470 Ohm resistor in parallel, connected
between video ouput of the block and video input of the
monitor to lower the DC offset. It sort of worked, with
some of contrast lost. Now it's much better with the new
circuit :)

One catch with the DC separator is that the capacitor is
charged by the transistor through the video output and the
output has to have a sufficiently low impedance, which my
radio channel hadn't. So I added a p-n-p emitter follower
before the DC separator to make it work.

It should also work for the SX comparator input (or simply a
digital input) if the transistor base is adjusted to
something like 0.7V. I'll check it.

Yesterday I tried a circuit that separates sync signal from
video. It uses 2 transistors and a few resistors and
capacitors. It has a good digital output, but I still can't
make SX synchronize at the same period to every individual
HSYNC pulse in the noise presence. So besides sync
separation a PLL scheme should be added. In that case, I
guess the sync separation can be made in software
altogether, if the DC separator and a comparator is used.

Thanks all for replies,

Nikolai

---- Original Message ----
From: Michael Rigby-Jones <spamBeGonemrjones@spam@spamNORTELNETWORKS.COM>
Sent: Friday, December 08, 2000 10:29:13
 To: RemoveMEPICLISTEraseMEspamKILLspamMITVMA.MIT.EDU
Subj: [sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Challenge and Co              ntest



>> {Original Message removed}

'[PICLIST] [SX] [PIC] PIC vs SX: Sleep & Brownout'
2000\12\13@123411 by parkiss

picon face
Has anyone figured out for sure how the SX handles a brownout
condition that occurs during sleep (low-power) mode?  It appears to
us that a brownout can go undetected on a sleeping SX18, hence no
reset occurs once the supply voltage returns above the brownout
threshold.

Does the PIC reliably detect and then reset due to a brownout
which began and ended while in sleep mode?

Thanks

Steve

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Chall'
2000\12\13@134657 by jamesnewton

face picon face
For anyone participating in the sxlist video design challenge (
www.sxlist.com/techref/ubicom/contest/video
) or who is interested in overlaying PIC or SX generated signals on existing
video, this is a fantastic tutorial on how to detect sync in software.

http://64.30.204.60/tom/theory/theory.htm

This is related to descrambleing cable video, but the site is technical
enough that no one could build one without completely understanding it. And
I'm not posting this link to show people how to descramble cable, but rather
how to reliably genlock to a video signal using software. If that makes me a
hypocrite, tell me so off-list.

---
James Newton
1-619-652-0593
spamBeGonejamesnewtonspam_OUTspamRemoveMEsxlist.com
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{Original Message removed}

'[SX]:Scenix video on a graphic LCD'
2000\12\13@162113 by rottosen

flavicon
face
I finally got my "Big LCD" project posted on my personal Web page.

This was a project to test using the SX to put large characters on a
graphic LCD which does not have a built-in intelligent controller. The
display I used just has the shift registers that drive the pixels. The
SX generates all the pixels continuously at a video rate to keep the LCD
screen refreshed.

I put the schematic, some graphic LCD data sheets and several pictures
on the page as well as the uncensored code. ;-)

http://www.idcomm.com/personal/ottosen/

Look for the title "Display large characters on a graphic LCD" in the
Stupid PIC Tricks section.

Enjoy.


-- Rich

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'[SX]: Code challenge Parsing the radix from "B" fo'
2000\12\14@135222 by jamesnewton

face picon face
Now why didn't I see that! <GRIN> It makes setting the radix as simple as

Radix           ds 1    ;radix to change data from
RadixBin        =       Radix.1 ;B  01000011
RadixOct        =       Radix.4 ;O  01010000
RadixDec        =       Radix.2 ;D  01000101
RadixHex        =       Radix.3 ;H  01001001

Radix
:Set    ;enter with "B", "O", "D" or "H" in W
       mov radix, w
       inc radix
       retp

:Change
       jnb RadixHex, @:HexOut
:Hex
;convert from Hex by Andrew Warren from
;http://www.sxlist.com/ubicom/lib/math/radix
       mov     W, #'0'
       snb     CHAR1.6
       mov     W, #'A'-10
       sub     CHAR1, W

       mov     W, #'0'
       snb     CHAR2.6
       mov     W, #'A'-10
       sub     CHAR2, W

       mov     W, <>CHAR1
       add     W, CHAR2
       retp
:HexOut

       jnb RadixOct, @:OctOut
;       etc...
;       etc...
;       etc...

;by James Newton and Nikolai Golovchenko
;Enter with an ASCII character representing the desired base for a radix
conversion.
;B=Binary
;D=Decimal
;H=Hex
;O=Octal
;
;Challenge 1: exit with a different bit set for each base.
;Challenge 2: exit with the radix (2 for binary, 10 for decimal, 16 for hex,
8 for octal)
;Challenge 3: exit with a jump table index
;
;My best:

       Radix           ds 1    ;radix to change data from
RadixBin        =       Radix.1 ;B  01000011
RadixOct        =       Radix.4 ;O  01010000
RadixDec        =       Radix.2 ;D  01000101
RadixHex        =       Radix.3 ;H  01001001

Answer1
       inc     radix   ;B=3,D=5,H=9,N=15,O=16
;done
       jb      radixBin, binary
       jb      radixDec, decimal
       jb      radixHex, hex
       jb      radixOct, octal

Answer2
       inc     radix
       clrb    radix.6 ;B=3,D=5,H=9,O=16
       sb      radix.2 ;if not D (5)
        dec    radix   ;B=2,D=5,H=8,O=15
       snb     radix.1 ;if D or H
        rl     radix   ;B=2,D=11,H=17,O=15
       clrb    radix.0 ;B=2,D=10,H=16,O=14
       snb     radix.2 ;if O
        clrb   radix.1 ;B=2,D=10,H=16,O=12
       clrb    radix.2 ;B=2,D=10,H=16,O=8

;or...

       inc     radix
       mov     w, #2
       snb     RadixOct
        mov    w, #8
       snb     radixDec
        mov    w, #10
       snb     radixHex
        mov    w, #16

;and if you want to handle N = nibble

       inc     radix
       mov     w, #8
       snb     radixDec
        mov    w, #5           ;D or N
       snb     radixHex
        mov    w, #16  ;H
       snb     radixBin
        mov    w, #2           ;B or N
       snb     radixDec
        rl     radix
;if both .0 and .1 were set radix = 4
;if only .1 was set radix = 10

Answer3
       clrb    radix.6
       dec     radix   ;B=2,D=5,H=8,O=15
       clc
       rr      radix   ;B=1,D=2,H=4,O=7
       dec     radix   ;B=0,D=1,H=3,O=6
       clb     radix.2 ;B=0,D=1,H=3,O=2

{Original Message removed}

'[SX]: 0831 routine'
2000\12\16@003804 by Dan Michaels

flavicon
face
At 09:59 PM 12/15/00 +0930, you wrote:
>hi,
>whenever the main program call the subroutine below I get garbages
>I hope somebody can point out my mistake cause I don't see what is
>wrong with it.
>
>thanks
>
>;this routine read the ADC0831
>adc     setb    cs                      ;cs high (ra.1)
>        setb    clk                     ;clk high (ra.0)
>        mov     trk,#8                  ;number of time to loop
>        clrb    cs                      ;enable the 0831
>        clrb    clk                     ;start convertion
>        nop
>        setb    clk
>        nop
>loop    clrb    clk
>        mov     data,rb                 ;read the 0831
>        setb    clk
>        rr      rb                      ;shift data to the right (rb.7 is
the input)
>        djnz    trk,loop                ;is loop over if not loop again
>        mov     flash,rb                ;save data
>        ret                             ;return to the main program
>

Maybe:

loop    clrb    clk
       mov     temp,rb                 ;read the 0831
       setb    clk
       rl      temp
       rr      data                      ;shift data to the right (rb.7 is
the input)
       djnz    trk,loop                ;is loop over if not loop again
       mov     flash,data                ;save data
       ret                             ;return to the main program

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2000\12\16@004943 by jayian

picon face
thanks for the input  I'll try it

Dan Michaels wrote:
{Quote hidden}

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'[SX]:Overlaying video'
2000\12\16@102428 by Nikolai Golovchenko

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face
part 1 4562 bytes content-type:text/plain; charset=us-ascii (decoded 7bit)

Okay, synchronizing to horizontal pulses video in software
works now. The trickiest part was to lock to sync pulses with
the free running internal oscillator. Even the smallest
errors (under 0.01 us per line) build up very quickly and
synchronization fails...

The program implements only horizontal sync locking, but
vertical sync pulses detection should be a bit easier since
they coincide with horizontal ones. Here is the details:

I used the built-in comparator and a DC level shifter to
separate sync pulses. Here is the circuit in ascii 'art'.

                    -------*----------> +5V
                    |      |  R2
                    |      |  4k
              VT1   |      --/\/\/--
              n-p-n C\|            |       _
                     B|----*-/\/\/-*   RB1| \
    R1       C2     E/|    |  R3   -------|- \   RB0
    1k       0.22u  |      |  30       RB2|   >----o
o--/\/\/--*--||-----*------|--------------|+ /  Composite
Video     |         |      |              |_/   sync out
In       --- C1     \ R5   --|>|---|
         --- 330p   / 2.2M   VD1   |     Comparator
          |         \              |
         === GND   ===            === GND

The resistors R2,R3 and diode VD1 set about a 60 mV
threshold above the sync pulses lower level (sync pulses are
negative going). Surprisingly, the comparator negative input
reference should have been taken *above* the transistor base
(as it is in the circuit). One would assume that BE voltage
drop is about 0.6V and the negative input of comparator is
already 0.6V above the sync 'floor'. But it is not so. The
capacitor C2 has almost no way to discharge and consequently
it is charged with very low current and the BE drop is about
0 V. Therefore, the sync floor potential is equal to the
voltage set by divider at the transistor base. When the
charging current rises, which happens when a new sync pulse
arrives, so does the difference between comparator inputs,
so the pulse at this moment is not missed.

The circuit takes 3 pins: 2 comparator inputs and 1
output. Comparator output could be checked by polling its
configuration register, but it takes 3 instructions to check
it this way:

waitHigh mov !RB, w     ;exchange comparator conwfiguration
                       ;with w (mode = $08)
       mov temp, w
       sb temp.0
        jmp waitHigh   ;6 cycles in loop

while it takes just 1 instruction to check the port pin

waitHigh sb RB.0
        jmp waitHigh   ;4 cycles in loop

So I chose to sacrifice the pin as it is better to sample
the comparator output a little faster (and smaller code size
too).

Locking to the HSync frequency is the most difficult part
here. As Simon Nield suggested I use two PLL modes:

    1) Crash PLL. It is used after chip reset and when too
    many sync pulses are missed. On each external pulse
    (longer than 2 us) SX resets RTCC and calculates error
    on the next pulse. Errors are summed up for 256 samples
    and the timer load value is corrected with the average
    error value. The timer load value is 16 bit, higher byte
    adds directly to RTCC and lower one to phase
    accumulator.

    This mode works until average error goes low enough.
    After that the SX enters the fine PLL mode.

    2) Fine PLL. This is the hardest part. In this mode,
    the RTCC load value is not corrected (that is the line
    is assumed to have a fixed length), only RTCC is
    corrected. The correction value is produced by a low
    pass filter, which averages the errors. This works like
    an integral term in a PI regulator. I found out that
    proportional term (subtracting current error from RTCC)
    doesn't help really, because the error signal is so noisy
    that subtracting it from RTCC results in passing the
    noise further.

It works pretty well for a wide range of video sources,
maybe just a bit worse than the TV circuit. Another possible
issue may be that a line can have slightly different length
for a different video source. That may result in a different
position of overlaid image on the screen, because the clock
is not adjusted, only its period is adjusted by PLL.

By the way, this was tested on SECAM, but I think NTSC and
PAL are very close to SECAM in the horizontal sync
parameters. In SECAM horisontal period is 64 us, sync pulse
is 4.7 us, and equalizing pulses are 2.35 us.

Next step is vertical sync...

Anyone knows of a cheap way to mix video with a signal from
SX?

Attached: hsync_pll.asm

Nikolai

part 2 8711 bytes content-type:application/octet-stream; name="hsync_pll.asm" (decode)

part 3 136 bytes
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'[SX]: 0831 routine'
2000\12\16@111243 by Dan Michaels

flavicon
face
At 12:46 AM 12/16/00 +0930, you wrote:
>thanks for the input  I'll try it
>

Also occurred to me you might need delays in the loop,
the SX is very fast.


>> Maybe:

loop    clrb    clk
           call    delay
       mov     temp,rb                 ;read the 0831
       setb    clk
           call    delay
       rl      temp
       rr      data                      ;shift data to the right (rb.7 is
       djnz    trk,loop                ;is loop over if not loop again
       mov     flash,data                ;save data
       ret                             ;return to the main program

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2000\12\16@112943 by jayian

picon face
it's run at 4mh in turbo mode but the main program
has a delay before calling the routine should I move
the delay from the main program to the routine

Dan Michaels wrote:
{Quote hidden}

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'[SX]: dsp for pic'
2000\12\21@131947 by jamesnewton

face picon face
SXs can overcome the speed objections and simple multiply by a constant and
accumulate operations can be executed in a surprisingly few instructions
(see
www.sxlist.com/techref/piclist/codegen/constdivmul.htm
for Nikolai Golovchenko code generator for multiplication and division by a
constant which now supports the SXs)

I wonder if SXs aren't being used some times for DSP.

You are certainly correct about the memory limitations.

---
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SX FAQ: http://www.sxlist.com



{Original Message removed}

2000\12\21@133500 by Dan Michaels

flavicon
face
Andy Warren wrote:
>info <PICLISTspam_OUTspamMITVMA.MIT.EDU> wrote:
>
>> I hear microchip are releasing a 16 bit micro controller with DSP
>> core next year.
......
>    Given Microchip's past performance with regard to production
>    schedules for new architectures, I'd be VERY surprised if they
>    hit their "early 2002" date... Which is too bad, because there
>    will be significant competition for the dsPIC's target market by
>    then, and it would be a shame if Microchip missed the boat.
>

Anyone know when the Scenix/Ubicom IP2000 is slated to hit
the streets?

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2000\12\21@155555 by Stephen Holland

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As of right now, you can expect to see it in general availability in Q3
2001.


{Quote hidden}

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2000\12\22@032533 by Michael Rigby-Jones

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{Quote hidden}

Even a 100MHz SX wouldn't be able to touch the performance of most of the
basic DSP's in most applications, but as you say it probably has sufficient
power for many "lightweight" DSP apps.  OTOH, DSP's are virtualy useless at
port related operations where micros such as the PIC and SX excel.
Microchips new dsPIC should offer the best of both worlds.  It is allegedly
instruction compatible with the PIC, obviously with extra instructions for
MAC etc.  Personaly I can't wait to have a fiddle with one, hope they do a
decent eval board.

Mike

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2000\12\22@135820 by Dan Michaels

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Stephen Holland wrote:
>As of right now, you can expect to see it in general availability in Q3
>2001.


Thanks Steve, there is just enough description on the website
to whet one's appetite - yes?.

BTW, do you have any idea why your guys didn't ever do an SX48/52
in PLCC? Sure would be nice for smallish production runs.

thanks,
- danM

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'[PICLIST] [SX] Looking for recommended C Compilers'
2000\12\23@070805 by Neil Gandler

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Are there any good C compilers for the SX processors. I looked into the Bytecraft C compiler, listed on the Scenix
website, yet the I couldn't find pricing information in the listed distributor web links. I would love to hear from people
who have experience with any of these compilers. Please give us pros/cons Thanks

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2000\12\23@100243 by Alexey Vladimirov

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23 Dec 00, spamBeGoneneil_gandlerspamgetmai.com writes to All:

ng> Are there any good C compilers for the SX processors.

>From our experience, Hitech PICL C compiler is the best for PIC and SX
microcontrollers. Excellent support, good compatibility, large libraries,
very compact and efficient code.

SX-DEV development system now include freeware version of Hitech PICL C
compiler with full source-level debug support.

Check http://www.svtehs.com/en/products/ubicom.htm for more details.

Alexey
spam_OUTavladSTOPspamspamsvtehs.com

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2000\12\23@123107 by Bob Blick

face
flavicon
face
Hi Alexey,

I visited your site but did not see details about HiTech use with SX. I
have PICC, what does it take to compile for the SX?

Thanks,

Bob Blick

{Quote hidden}

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2000\12\23@131718 by Alexey Vladimirov

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face
23 Dec 00, Bob Blick writes to Alexey Vladimirov:

P> I visited your site but did not see details about HiTech use with SX.

You need AS2SX postprocessor for this task. This software can be downloaded
separately from geocities.com/SiliconValley/Station/7733/
You can compile files with HiTech C to AS_source, than assemble and
optimize it with AS2SX.

If you register, you can also download full SX-DEV software version from
http://www.svtehs.com, where both HiTech PICL C and AS2SX included.
With this system you can not only compile, but also program SX and debug your
application on the C source level. You can write C source code, compile it,
program to the target board and debug your application in real-time - all
within the same IDE.

We have some happy customers, already finished their first C projects for SX.

One example - "TV advertising killer" - simple device, analyzing full TV signal
for company logo and switching off audio, when the logo disappeared during the
commercial break. Sorry, only Russian description now:
http://www.svtehs.com/ru/logo.htm
However, all is clear from the photo...

Some technical details: SX comparator input using for 4-bit videoADC (160 ns
resolution time), 8x8 pixels logo mask, simple correlation algorithm, up to 16
logotypes can be stored simultaneously, on-screen display up to eight 8x8
symbols plus logo graphics, five control keys.

All is done on SX28, FM24C16 FRAM, CD4053 and LM1881 synchro separator,
all firmware written on C...

Same hardware can be used for different TV on-screen display functions,
real-time analyzing for video fragments (for example, in robotics and security
applications) and more. On SX52 also teletext and VPS detection can be
included, and analyzing area can be expanded up to 16x16 pixels... More
potential applications decribe James Newton at http://www.sxlist.com

Alexey
RemoveMEavladspamspamsvtehs.com

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2000\12\23@150333 by Bob Blick

face
flavicon
face
>You need AS2SX postprocessor for this task. This software can be downloaded
>separately from geocities.com/SiliconValley/Station/7733/
>You can compile files with HiTech C to AS_source, than assemble and
>optimize it with AS2SX.

Thanks, I'll give it a try. Recently I was given a Parallax SX-Key,
together it sounds like fun.

>One example - "TV advertising killer" - simple device, analyzing full TV
signal
>for company logo and switching off audio, when the logo disappeared during
the
>commercial break. Sorry, only Russian description now:
>http://www.svtehs.com/ru/logo.htm

Brilliant idea, if you make an NTSC version for sale I will buy one!

Thanks,

Bob Blick

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'[SX]: dsp for pic'
2000\12\24@004233 by Stephen Holland

flavicon
face
Honestly, we can offer better prices on all our devices if we have a minimal
amount of packages to manufacture. There is usually small and smallest as
the 2 main choices for package types...

Stephen

{Original Message removed}

'[SX]: Dual UART Virtual Perioheral'
2000\12\26@075008 by Russell McMahon

picon face
Has anyone used Ubicom's combined virtual peripheral example - 2 x UARTs and
IIC as supplied in a single example program.

I'm having a few problems which MAY be due to having hacked the code about
somewhat but maybe not.
Can anyone confirm that the code works OK as supplied.



regards,





     Russell McMahon
_____________________________

What can one man* do?
Donate food daily free !!! -  http://www.thehungersite.com/
Donate Vitamin A!  http://www.thechildsurvivalsite.com/
http://www.rawa.com  - one perspective on Afghanistan
http://www.changingourworld.com    http://www.easttimor.com   http://www.sudan.com

(* - or woman, child or internet enabled intelligent entity :-))

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2000\12\26@121912 by Dan Michaels

flavicon
face
Russell McMahon wrote:
>Has anyone used Ubicom's combined virtual peripheral example - 2 x UARTs and
>IIC as supplied in a single example program.
>
>I'm having a few problems which MAY be due to having hacked the code about
>somewhat but maybe not.
>Can anyone confirm that the code works OK as supplied.
>

Hi Russell, I have used the VP code a little. Can you describe
more fully what your problem "appears" to be.

best regards,
- Dan Michaels
Oricom Technologies
http://www.oricomtech.com
==================================================================
"To every thing there is a season, and a time to every purpose..."
==================================================================

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2000\12\26@161524 by Russell McMahon

picon face
>>Has anyone used Ubicom's combined virtual peripheral example - 2 x UARTs
and
>>IIC as supplied in a single example program.
>>Can anyone confirm that the code works OK as supplied.

>Hi Russell, I have used the VP code a little. Can you describe
>more fully what your problem "appears" to be.
>- Dan Michaels


I can describe exactly what the problem "is" :-) - the UART that I have
tried to use so far works fine on transmit but not on receive AND as I
understand the supplied code, it appears faulty! I'm still new to Scenix and
may be missing something but don't think so (of course :-) ).

In the 2 UART plus MM IIC code they use a single global variable
uart_rx_flag in flags.0  as the character received bit for ALL UARTS. Or
that's how I read the code. This would be bizarre as either UART will set or
reset this flag as if it is the only UART in action. While it is a trivial
matter for me to either use another bit in the global registers or to use a
flag bit in a bank which is unique to the currently active UART this is
disturbing as it suggests one of -

i    The code as supplied never worked and / or has not been tested
(properly)

ii    I am missing a major point about how it works

Hence my query whether anyone else has used this specific code and whether
it works. I believe I fully understand the principles involved but clearly
either I or Ubicom are wrong! Which seems most likely ? :-)

A possibility is that if you only use one UART channel then it works OK if
the other is idle and they have expanded code for a one UART peripheral and
missed the error and tested it using only one UART at a time. I had hoped to
just drop this code into place with changes for different port arrangements
(to fit my existing hardware) and get on with the task which will be using
the VPs - I don't really want to be debugging Ubicom's code which I assumed
would be working! There is the possibility that I have done something silly
with port changes but I have checked it carefully several times and it all
should be quite straight forward.



regards

           Russell McMahon

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2000\12\26@212655 by Dan Michaels

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Russell McMahon wrote:

>I can describe exactly what the problem "is" :-) - the UART that I have
>tried to use so far works fine on transmit but not on receive AND as I
>understand the supplied code, it appears faulty! I'm still new to Scenix and
>may be missing something but don't think so (of course :-) ).
>
>In the 2 UART plus MM IIC code they use a single global variable
>uart_rx_flag in flags.0  as the character received bit for ALL UARTS. Or
>that's how I read the code. This would be bizarre as either UART will set or
>reset this flag as if it is the only UART in action. While it is a trivial
>matter for me to either use another bit in the global registers or to use a
>flag bit in a bank which is unique to the currently active UART this is
>disturbing as it suggests one of -
>


Russell, I just checked the ubicom site and didn't see a VP
combining I2C and RS232. The older I2C peripheral required you
to shut down all the other VPs to run it. Maybe they have fixed
it - by interleaving into the other VPs - in the past year.

Also, I was not very happy with some of their older VPs. The
multichannel PWM was a disaster. We talked about it last spring
on piclist. And once you get several VPs going, things tend to
bog down. Personally, I like to run one thing at a time rather
than multiple things on the scenix, but then go like a bat out
of h*** [religious references bleeped out on piclist].

Re the RS232 VP, you will notice that it probably will not run
faster than 19200, as the divider values [loop counters] will
have non-integer values. Also, it really looks to me like the
accuracy of sampling diminishes greatly for higher baudrates.
The VPs sample the ports when the timer interrupts occur, and
these are not locked to the actual port pin changes.
So ..... makes me wonder.

You might also check how they do RAM bank switching in the VP
you are looking at. This is the real key to how the VPs work.
For multiple VPs of the same type, they have duplicate variables,
used in exactly the same manner, but located in different banks.

best regards,
- Dan Michaels
Oricom Technologies
http://www.oricomtech.com
==================================================================
"To every thing there is a season, and a time to every purpose..."
==================================================================

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2000\12\27@064837 by Andrew Kunz

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Hey, Russ, there are enough Mot and Mchip appnotes with bugs - it isn't just
Scenix.

Andy

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2000\12\27@232349 by Russell McMahon

picon face
>Hey, Russ, there are enough Mot and Mchip appnotes with bugs - it isn't
just
>Scenix.
>Andy


True, but the Scenix "virtual peripherals" are meant to be an alternative to
having the same functions in silicon.
As such, if they are to be the "flagships" for their product one would hope
they would be a little more sorted out than typical app notes.

That said, my present problems could all be of my own making. Time will
tell.
Hope to get back to it in a day or so.


   Russell

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERAL Design Chall'
2001\01\02@022851 by Dan Michaels
flavicon
face
Rich Ottosen wrote:
>No characters here but there is color. Yes, it is a SX doing all the
>work.  :-)
>
>See the picture I have attached!
>I hope the picture file isn't too large for the list.
>

Pretty amazing stuff for an SX. What are you using for RAM
space, or doing it all on the fly? [and isn't about time you
retired that monitor? :)].

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2001\01\02@113329 by rottosen

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face
Dan Michaels wrote:
>
> Rich Ottosen wrote:
> >No characters here but there is color. Yes, it is a SX doing all the
> >work.  :-)
> >
> >See the picture I have attached!
> >I hope the picture file isn't too large for the list.
> >
>
> Pretty amazing stuff for an SX. What are you using for RAM
> space, or doing it all on the fly? [and isn't about time you
> retired that monitor? :)].

The video is generated from code using only the RAM in the SX.
[NO! Then how could I play Lemmings on my Amiga 2000???]

And, Dan there may be a live demonstration of SX video at the 6502 Group
meeting tonight at the Colorado School of Mines in Golden. You and any
other PIC-Lister are invited. Contact me for details.


-- Rich



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2001\01\02@221233 by James Newton

face picon face
Totally cool Richard!

I'm amazed at the nice range of colors you got...
...are details forthcoming? ...on the hardware and software you used?

James Newton
EraseMEjamesnewtonRemoveMEspamsxlist.com
1-619-652-0593 phone
http://www.sxlist.com

{Original Message removed}

2001\01\03@133315 by rottosen

flavicon
face
Ted:
Thanks for the interest. If you are ever in Colorado you are invited to
a meeting! We have other members that come from far away: California,
Oregon, Kansas, Massachusetts and other exotic places.

The groups has interests in just about anything technological or
scientific. The only subjects not regularly discussed are religion and
sports. Politics is allowed and members are very opinionated (on this
and every other subject). We are a mix of hardware and software types
with a fair amount of cross breeding.

There is interest in PIC's and SX's. I have counted over half a dozen
members of the group that have hacked PIC/SX hardware or software.

Stupid PIC Tricks have been done by some of us for years now. See my
personal Web page for a list:
http://www.idcomm.com/personal/ottosen/

Not much is done with 6502's nowadays, although one member did some code
on an old Apple][ to update an even older program in a custom SBC for
one of his customers. I still recover old software from my Apple][ on
occasion.

Of course, the world is stuck the &%$%#@ PC so most of our work is done
on that platform. Members run DOS, Windows and Linux on their machines.

Our groups Web site is at  http://6502group.org/  (not http://www.6502.org) and
has a little information about some of the members.

The 6502 Group is very much like the PIC List. This makes a complete
description of the group impossible :-)


-- Rich


Ted Melton wrote:
{Quote hidden}

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2001\01\04@205546 by rottosen

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Dan:
Sorry you missed the 6502 Group meeting. We (Eric Smith and myself) did
show SX generated video to the group.

I demonstrated the SX doing color and talked about the basics of TV
video and how the hardware works. Eric demonstrated his SX created
monochrome character display and talked about how his software works.
Eric also talked about some of the subtleties of NTSC color.

Check here to see for some pictures:
  http://www.brouhaha.com/~eric/ubicom/servid/


-- Rich


Richard Ottosen wrote:
{Quote hidden}

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'[sx]: SCENIX advice'
2001\01\05@030604 by Roman Black

flavicon
face
Hi, hope this is not an annoying question.

I have PIC development stuff and have used
16F84 and 16F877 etc in some hobby and commercial
apps. I use MPLAB for programming, and use the
simulator sometimes.

I am considering going to Scenix for a new
commercial app as it would be nice to have the
higher execution speed. :o) I am currently using
16F84A at 20MHz (5MHz inst). I need 13 IO pins
but a couple more pins wouldn't hurt.
I want flash chips, I can't stand messing with
windowed chips.


So;
* Which Scenix chip is similar size/price?
* Can I still code in MPLAB?
* If not, does Scenix have a IDE/sim?
* Are the Scenix chips reliable/obtainable?
(my firm relies on the PIC for availability etc)
* How stiff is the re-learning? I have limited time.

I have spent an hour browsing the Scenix.com site
but will need a lot more hours before I am ready
to make that decision to start developing on a
whole new family of chips and investing time and
money in new development tools.
I guess some of you SX guys did just what I'm
contemplating, and I really would appreciate a
few tips! :o)
-Roman

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2001\01\05@110824 by jamesnewton

face picon face
The answers to your questions are:

* SX28 (a bit more expensive, and actually closer to the 16c5x, but with
some nice extra instructions and flash programmable and much faster)
* Yes you can use MPLAB (just tell it you are programming a 16c54) with
macros for the extra instructions but you won't be able to make use of the
in circuit debugging from MPLAB.  You can use the SXKey for the ICD and use
macros to make it understand MPLAB style instructions. See:
http://www.sxlist.com/ubicom/inst.htm for details

* No free IDE from Ubicom, but see:
http://www.sxlist.com/ubicom/languages.htm
and check out the SX-DEV or SX-KEY. You can even use the Hitech PIC C Lite
(free) C compiler!

* Scenix is using die patterns that can be mfgr'd by almost any fab. See:
http://www.sxlist.com/ubicom/buy.htm
for links to suppliers.

* If you forgo the in circuit debugging and don't learn the "Parallax"
mnemonics (stay with MPLAB or use the MPLAB macros with the SXKey) and skip
learning the new instructions, there is * zero * learning curve. See:
http://www.sxlist.com/ubicom/picreplace.htm

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{Original Message removed}

2001\01\05@115408 by rottosen

flavicon
face
Roman:
I am not a typical case but here are my answers:

The Sx18AC is an 18 pin device with the same pinout as the PIC16C84. The
SX28AC is a 28 pin device with the "old" pinout. The SX18AC is $5.00 and
the SX28Ac is $5.54 from Mouser Electronics here in the U.S.

I use small quantities so I can't help on availability details.

Both devices have 2K 12-bit words of program memory. Neither have
internal user EEPROM. :-(

Since these are the 12-bit core, there are a few instructions missing.
In addition, there are more severe bank and page restrictions as
compared to the 14-bit core PIC's. A few instructions have been added to
partially deal with these irritants.

Parallax Advanced Transdata and other vendors have in-circuit
programmers and debuggers. Programmers are less than a hundred dollars
and debuggers a a few hundred dollars.

Your PIC programmer cannot program the SX parts. You can, however use
the MPASM assembler and to some extent the MPLab simulator with the SX
since the SX can be used in a completely PIC compatible mode. The catch
is that if you use the SX op-code extensions the PIC simulator can no
longer be used. You _do_ want to use the new op-codes.

I use a set of MPASM macros for MPASM, called SXDEFS.inc, to let me
write and assemble a program. Once the program is assembled, I use a
Parallax SX-Key to do the programming.

There are SX simulators available. The one I use was written by Loren
Blaney and is called called SXSIM.

There is SX information and other links at:
http://www.brouhaha.com/~eric/ubicom/

Also see my Web sites at:
http://www.rhoent.com/
and:
http://www.idcomm.com/personal/ottosen/
for more examples an the files I mentioned.

-- Rich


Roman Black wrote:
{Quote hidden}

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERAL'
2001\01\05@133756 by jamesnewton

face picon face
Totally excellent.

Looks like we will have a winner in the sxlist contest! After you guys
polish the code and release it, I'll post it on the site (or link to it) and
arrange to send you the prizes.
http://www.sxlist.com/techref/ubicom/contest/video.htm

I think I'll keep the contest running in case anyone else comes up with an
improvement or different version. There is a lot of room for cool
applications of this idea.

BTW, I love your development environment...

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{Original Message removed}

2001\01\05@145657 by Dan Michaels

flavicon
face
Rich Ottosen wrote:
.......
>
>I demonstrated the SX doing color and talked about the basics of TV
>video and how the hardware works. Eric demonstrated his SX created
>monochrome character display and talked about how his software works.
>Eric also talked about some of the subtleties of NTSC color.
>

Hi Rich, good show, looks like you win the prize, too.

As the current resident xperk on video subtleties, maybe you can
help ole Jinx out. He was wanting to remove|overlay|delete an
onerous icon that his local TV station places in an obvious
part of the screen.

Ideally, I guess, he would like to "recognize" the icon, and
then make it blend_in|go_away|etc. Maybe you can comment.
[BTW, J doesn't actually know what an sx is, but just the
same ....].

- danM

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERAL DesignChalle'
2001\01\06@062144 by Alexey Vladimirov

flavicon
face
05 Jan 01, Dan Michaels writes to All:

P> As the current resident xperk on video subtleties, maybe you can
P> help ole Jinx out. He was wanting to remove|overlay|delete an
P> onerous icon that his local TV station places in an obvious
P> part of the screen.

P> Ideally, I guess, he would like to "recognize" the icon, and
P> then make it blend_in|go_away|etc. Maybe you can comment.
P> [BTW, J doesn't actually know what an sx is, but just the
P> same ....].

We have this done some time ago with SX28. It is simple project, calling
"advertisiment killer" - it recognizes current logo from the stored library (up
to 16 logo) and switch off audio, when the logo disappeared during the
commercial break. Sorry, only Russian description now:
http://www.svtehs.com/ru/logo.htm
However, all is clear from the photo...

Some technical details: SX comparator input using for 4-bit videoADC (160 ns
resolution time), 8x8 pixels logo mask, simple correlation algorithm, up to 16
logotypes can be stored simultaneously, on-screen display up to eight 8x8
symbols plus logo graphics, five control keys.

All is done on SX28, FM24C16 FRAM, CD4053 and LM1881 synchro separator,
all firmware written on Hitech C...

Infrared module with learning capabilities can be added to this design to
remove commercials from the videotape during tape writing or to switch on some
other signal source (CD, DVD, video, etc...) at the commercial break.

Same hardware can be used for different TV on-screen display functions,
real-time analyzing for video fragments (for example, in robotics and security
applications) and more. On SX52 also teletext and VPS detection can be
included, and analyzing area can be expanded up to 16x16 pixels... More
potential applications decribe James Newton at http://www.sxlist.com

NTSC version and english description will come soon, if this design is
potentially interesting...

Alexey
spamBeGoneavladRemoveMEspamEraseMEsvtehs.com

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'[sx]: SCENIX VIDEO VIRTUAL PERIPHERALDesignChallen'
2001\01\06@121036 by rottosen

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Wow. Quite a task. Much harder than just generating sync and video. It
seems to me that it would require some kind of image recognition to find
the offending pattern and some healthy image processing to figure what
it should _really_ look like.


-- Rich


Dan Michaels wrote:
{Quote hidden}

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2001\01\06@121459 by rottosen

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Alexey:

I find it very interesting! I can hardly wait for the NTSC/English
version!!!!

-- Rich


Alexey Vladimirov wrote:
{Quote hidden}

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'[PICLIST] [SX] Looking for recommended C Compilers'
2001\01\10@110147 by Neil Gandler

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face
I checkout out your site, but I cant find an links to the hitech c compiler.
I am looking for a site that gives
details and pricing info on this compiler. Nothing is mentioned on the
Ubicon/Scenix site about this compiler either. Thanks


Neil Gandler
Founder, CTO
MAI Technology Inc.
P.O. Box 64072
Sunnyvale, CA 94088-4072
Phone & Fax: 408-904-5089
Investor and Business Relations: 1-888-205-3215
e-mail: neil_gandlerSTOPspamspamKILLspamgetmai.com
http://www.getmai.com
{Original Message removed}

'[SX]: Looking for recommended C Compilers fo SX pr'
2001\01\10@124313 by Alexey Vladimirov

flavicon
face
10 Jan 01, @spam@neil_gandler.....spamspamgetmai.com writes to All:

ng> I checkout out your site, but I cant find an links to the hitech c
ng> compiler.

Please check http://www.svtehs.com/en/scenix/software.htm

ng> I am looking for a site that gives details and pricing info on this
ng> compiler.

Hitech PICL C compiler is freeware. More details at
http://www.htsoft.com/products/piclite/piclite.html

ng> Nothing is mentioned on the Ubicon/Scenix site about this compiler
ng> either.

Yes. Hitech Did not have native support for Ubicom microcontrollers.
You need AS2SX postprocessor for this task. You can find it at
http://geocities.com/SiliconValley/Station/7733/

>> You can compile files with HiTech C to AS_source, than assemble and
>> optimize it with AS2SX.
>>
>> If you register, you can also download full SX-DEV software version from
>> http://www.svtehs.com, where both HiTech PICL C and AS2SX included.
>> With this system you can not only compile, but also program SX and
>> debug your application on the C source level. You can write C source
>> code, compile it, program to the target board and debug your
>> application in real-time - all within the same IDE.
>>
>> We have some happy customers, already finished their first C projects
>> for SX.

>> One example - "TV advertising killer" - simple device, analyzing full
>> TV signal for company logo and switching off audio, when the logo
>> disappeared during the commercial break. Sorry, only Russian
>> description now: http://www.svtehs.com/ru/logo.htm
>> However, all is clear from the photo...
>>
>> Some technical details: SX comparator input using for 4-bit videoADC
>> (160 ns resolution time), 8x8 pixels logo mask, simple correlation
>> algorithm, up to 16 logotypes can be stored simultaneously, on-screen
>> display up to eight 8x8 symbols plus logo graphics, five control keys.
>>
>> All is done on SX28, FM24C16 FRAM, CD4053 and LM1881 synchro separator,
>> all firmware written on C...
>>
>> Same hardware can be used for different TV on-screen display functions,
>> real-time analyzing for video fragments (for example, in robotics
>> and security applications) and more. On SX52 also teletext and VPS
>> detection can be included, and analyzing area can be expanded up to
>> 16x16 pixels... More potential applications decribe James Newton at
>> http://www.sxlist.com

Alexey
spamavlad.....spam.....svtehs.com

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'[SX]: Looking for modified UART virtual peripheral'
2001\01\10@200028 by Neil Gandler

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face
I am using an SX28 microcontroller, including the UART virtual peripheral. If someone has modified the VP
to detect and decode a 9th parity bit and framing error, I would appreciate the forwarded source code.
I am sure its easy to do, yet if someone has proven source code, it would save me time.
Thanks

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2001\01\11@055848 by Russell McMahon

picon face
>I am using an SX28 microcontroller, including the UART virtual peripheral.
If someone has modified the VP
>to detect and decode a 9th parity bit and framing error, I would appreciate
the forwarded source code.
>I am sure its easy to do, yet if someone has proven source code, it would
save me time.


Neil,

I haven't done this yet but I would be interesting in exchanging notes
offlist (or on if useful).
I am using an SX28 with triple VP UARTS based on their dual UART plus
Multimaster IIC plus timer example.

I believe their sample code for the dual UART implementation has a sometimes
but not always fatal bug. This bug does NOT apply to the single UART version
but is a product of incorrectly expanding it to a multi-UART clone. As I
understand the code you could use either UART OK and both at once maybe. I
have corrected this and my version works but the original problem was
combined with a hardware fault so I never saw how well their version
actually worked in practice. I suspect that in many cases the fault would
not have been obvious.

I don't need the 9th bit at this stage but thought it may be useful to mimic
the Philips extra bit they use for flagging addresses in a multi processor
coms system.

Outline suggestions and thoughts:

The VP UARTs TX routine actually uses 2 data bytes and should handle up to
16 bits (including all starts and stops and parities) so should be easily
modified. This is a strangely inefficient use of registers but makes your
requirement easy.

At present txlow contains only a start bit in bit 7. Data proper is in
txhigh.

                   rr      tx_high   ; and shift to next bit
                   rr      tx_low   ;
                  dec     tx_count  ;decrement bit counter
                  snb tx_low.6  ;output next bit

By packing the bits differently

       Start bit in txlow b6
       Data in Txhigh 6 to txlow 7
       Parity in tx high 7

And changing the snb tx_low.6 above to snb tx_low,5 the code will send 1
start bit, 8 data bits, 1 parity.
(This is outline only - other code will need changing including sb tx_low.6
a few lines down).

Unfortunately, the RX routine only uses a single register for the data byte
so you will probably have to add extra code to detect the occurrence of the
9th bit and save it separately.

     dec     rx_count                ;last bit?
     sz                              ;if not
     rr      rx_byte                 ; then save bit
     snz                             ;if so,

At present this just fills rx_byte with the 8 bit data word.
By increasing the initial value of rx_count by one this will cause the lsb
of data to overflow into carry when the above code completes.
By reading carry immediately after this you can recover the last data bit
and the parity bit is contained in rx_byte.7

Use above ideas with care. YMWV !!! :-)



regards


               Russell

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2001\01\11@122847 by Stephen Holland

flavicon
face
Neil,

Here is a routine I wrote awhile back that generates even parity.

; Subroutine - Generate even parity for contents of W register. Parity bit
is returned
;              in bit 0 of parity register.
;
even_parity     mov     parity,w                ;This routine will leave the
parity of
               mov     w,<>parity              ; PARITY register in
PARITY.0
               xor     parity,w
               mov     w,>>parity
               xor     parity,w
               snb     parity.2
               inc     parity
               retp

In the send_byte subroutine, you'll need to insert the following line to
properly setup the parity bit.

               movb    tx_high.7,parity.0      ;Load parity bit into frame

I never got around to writing the receive code, but these routines could be
used there too.

Stephen

{Original Message removed}

'[SX]: 32bit / 16 bit assembly divide routine for S'
2001\01\16@125535 by Neil Gandler

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face
32bit / 16 bit assembly divide routine for Scenix processor? I need a 32bit dividend / 16-bit divisor, assembly divide routine for the Scenix SX processor. They offer a 16 bit/16bit divide routine. I am not sure there is a way to add an extra step to achieve the routine I am looking for, or if I need a completly different routine. Either way I would prefer not to write one from scratch. Thanks!
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2001\01\16@131454 by jamesnewton

face picon face
www.sxlist.com/techref/ubicom/lib/math/div/div16or32by16to16_sx.htm

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{Original Message removed}

'[SX:] Has anyone made their own multitasker for a '
2001\01\18@224237 by Neil Gandler

flavicon
face
I was considering making a crude multitasker for the PIC
and even the SX device. Especially with SX devices with its
blinding up-to 100MIPS speed, it would benefit from such
a multitasking scheme. The way I would do it is to create
a number or threads that execute every interrupt cycle,
which interval depends on the timer overflow. For example, an interrupt can be set to occur ever 20us. And if there are
32 threads, each thread would excute every 640us.
The program flow in each thread would procede a certain
amount of cycles, and to the discretion of the programmer,
the routine would exit and return from interrupt. Before
exiting the routine, the PC could be saved and when the
same routine runs again, the program flow could resume at the same spot. Why do all of this? It would allow me to have (in this case) 32 seperate processes that can run relatively independent of each other. In high speed devices such as the SX processor, there can be much idle time while reading and writing to an I2C eeprom, doing an A/D reading etc. This method could maximize efficiency and allow more complex operations.  I would love to hear comments and ideas from others.

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2001\01\18@235127 by Dan Michaels

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face
Neil Gandler wrote:
>I was considering making a crude multitasker for the PIC
>and even the SX device. Especially with SX devices with its
>blinding up-to 100MIPS speed, it would benefit from such
>a multitasking scheme.

There is an old Mchp appnote describing a rudimentary
multitasker, AN585.
================


The way I would do it is to create
>a number or threads that execute every interrupt cycle,
>which interval depends on the timer overflow. For example,
>an interrupt can be set to occur ever 20us. And if there are
>32 threads, each thread would excute every 640us.


What you are describing here is the basic idea underlying
the Scenix VPs - virtual peripherals. TImer overflows every
6 usec or so, and a divider on each process counts down the
interrupts to determine when the process should run/etc.

The big problem you encounter with the scenix, IMO, is that
even with its high performance, it still bogs down when the
#processes starts to grow.

- danM

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'[SX]: USB Keyboard VP demo'
2001\01\24@130710 by jamesnewton

picon face
See... I inspired something good!

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{Original Message removed}

'[SX]: Lawsuit Status?'
2001\01\28@012446 by Sean H. Breheny

face picon face
Hi all,

I was thinking recently: What is the status of the Microchip lawsuit
against Scenix (now Ubicom)?

Sean

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2001\01\28@015303 by Randy Glenn

picon face
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Settled.

http://www.microchip.com/10/edit/prelease/pr160/index.htm

- -Randy Glenn

This coming from the guy with a system tray 7 icons wide... by 2
tall...
=================================================
Randy_Glenn-at-tvo.org - PICxpert-at-picxpert.com
PICxpert-at-yahoo.com - PICxpert-at-home.com
           http://www.picxpert.com/
=================================================

- {Original Message removed}

'[sx]: UBICOM VIDEO VP Contest WINNER'
2001\01\31@132917 by jamesnewton

flavicon
face
SCENIX VIDEO VIRTUAL PERIPHERAL
Design Challenge and Contest

It started out with:

       "Ok, its time for us Scenix users to put this PIC video thing to rest... We
alone have the speed required in a low cost micro controller to really make
it happen!"

And now the results are in:

AND WE HAVE A WINNER!

SX MASTERS: Eric Smith and Richard Ottosen's SERVID entry clearly meets the
contest requirements for the Video VP Design Contest at
www.sxList.com/techref/ubicom/contest/video.htm
Trophies, toys and $100 are on their way to the team.

The SERVID is an intelligent RS232 video terminal (4x20 character display)
in one chip. It ROCKS! See the write up including source, hex code and
pictures at:
http://www.sxList.com/techref/ubicom/lib/io/dev/video/servid.htm

...and now on to next months challenge... which will be released very, very
soon. Watch for another email in the next few days or check the site at
http://www.sxList.com

And please let me know if you aren't interested, or forward this to anyone
who you think might be.

James Newton
1-619-652-0593
RemoveMEjamesnewtonspamBeGonespamspamsxlist.com
SX FAQ: http://www.sxlist.com

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2001\01\31@202250 by Eric Smith

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James Newton wrote:
> It ROCKS!

Thanks, James!

Although it's obviously not a requirement, I'd be delighted
to hear from anyone that actually uses this code.

Eric

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'[SX]: UBICOM VIDEO VP Contest WINNER'
2001\02\01@005113 by dre Domingos F. Souza
flavicon
face
>James Newton wrote:
>> It ROCKS!
>Thanks, James!
>Although it's obviously not a requirement, I'd be delighted
>to hear from anyone that actually uses this code.

       Hey Eric, congratulations for the great design! When I grow up, I want to understand pic like you! ;oD


--------------8<-------Corte aqui-------8<--------------

       All the best!!!
       Alexandre Souza
       .....xandinhoRemoveMEspaminterlink.com.br
       Linux User #85093

--------------8<-------Corte aqui-------8<--------------

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'[sx]: Modify NOPPP to program SX28 chips?'
2001\02\10@203730 by James Newton

face picon face
www.sxlist.com/techref/scenix/devprogs.htm
Lists the SX programmers I know about.

Were I you, I would buy an SXKey and run it on a windows machine. The
debugging ability is just worth it.

The lowest cost option I know is the SX-Blitz from Parallax $79 and then use
the
http://sourceforge.net/projects/gsxprog/
software under Linux.

If you really want a "free" programmer and are willing to port some DOS C
code to Linux you might want to look at
http://www.codepuppies.com/~ben/sens/pic/sx/

See the PIC programming page at
www.piclist.com/techref/microchip/devprogs.htm
for some people who have ported DOS PIC programmers to Linux.
specifically, look at
http://www.piclist.com/techref/microchip/16F877/taitlinux.htm

If you do port the code, please consider posting the result for others.

James Newton
KILLspamjamesnewtonspamTakeThisOuTsxlist.com
1-619-652-0593 phone
http://www.sxlist.com

{Original Message removed}

'[SX]: CONTEST: FAST EMBEDDED ETHERNET IDEAS'
2001\02\12@110841 by jamesnewton

picon face
Well, the SX Video Design Challenge and Contest
www.sxlist.com/techref/ubicom/contest/video.htm
went so well that Ubicom (Scenix) kicked in 20 Ethernet SX Stack Evaluation
Kits as prizes for the next contest!

Wow!

These boards have:
- SX52BD 50 MHz communications controller (everything soldered down, no
surface mount work required.)
- Realtek 10Base-T (IEEE802.3) Ethernet device for physical and MAC layer
support
- 32kB EEPROM memory chip for storing web content
- 24-pin wide-body DIP socket for Ubicom' JVM (Java Virtual Machine)
application prototyping and expansion
- Two RS-232 communication ports
- Clock circuit, power and transmission status LEDs, RESET button

and the kits include:
- AC Power Supply
- CAT5 Ethernet cross-over cable
- 10-pin IDC to DB-9 cable
- CD-ROM containing source code files, support files for reprogramming
EEPROM device, and documentation
- User's guide

Software support includes the TCP/IP Stack and Application Layer Software:
Protocols integrated into the SX controller include:
- IP (Internet Protocol) and ICMP (Internet Control Message Protocol)
- TCP (Transport Control Protocol, supporting two concurrent sockets)
- UDP (User Datagram Protocol)
- ARP (Address Resolution Protocol)
- DHCP (Dynamic Host Control Protocol)
- HTTP (Hypertext Transfer Protocol)
- SMTP (Simple Mail Transfer Protocol)

Memory Usage            CODE    RAM
SX Stack
- UDP/IP/PPP            1700     61
- HTTP/TCP/IP/PPP               3200    100
- SMTP/TCP/IP/PPP               3000     90
- POP3/TCP/IP/PPP               2800    127
Physical Layer - Ethernet
- Ethernet IO           ~512     16
Physical Layer - Modem
- DTMF Detection                 295     52
- DTMF Generation                 89     15
- FSK Detection           42      6
- FSK Generation                  47      8
- Caller ID                      369     70
- Ring Detect             19      3
- UART                    51     10

The (minimal) hardware for the Modem Physical Layer is NOT on these boards,
but I've included the figures incase you want to plan for that in the long
run.

So...
...you need to pic one of the SX Stack Layers and then add that to whatever
Physical Layer parts you want and subtract that from the 4k words and 262
bytes of RAM the SX52 provides to find out how much room you have for your
application idea.


IDEAS
What can you do with them? Anything that needs a fast little processor
connected to the inter or intra net. Here are a few ideas off the top of my
head:
- An intranet intercom or phone unit that uses existing network cabling to
avoid additional wire runs / switching equipment. Forget compression, its on
an intrA net. Or squeeze in some ADPCM compression. In a big, industrial
building, the cost of the wire runs or the extra phone switch could easily
pay for the development and production of a little box with and SX and
Ethernet adapter, a mic, a speaker, some op amps and a keypad.
- Multi FAX to net adapters. Each one plugs into a phone line and answers
FAX calls, then streams the data over the net to a common server that stores
and serves the images. Much cheaper than the currently available multi-line
fax boards and can be positioned where ever the phone lines are now rather
than requiring a central connection point.
- Security camera to net adapter. Uses a low cost CCD or CMOS camera.
Digitizes one or more "columns" of pixels per frame and forwards that to a
PC on the net. It might get one entire image per 256 frames or about 4
seconds. Sort of a high-speed slow scan transmitter. The central PC builds
and updates the images from many units onto its display, looks for movement
by comparing old and new frames and then compresses and archives the frames
as an mpg movie. No video wire runs, no RF problems, costs a lot less...
- RFID or IRDA network adapters. Anywhere that you need to track where
things are that move around in your building (or what room your cat is
hiding in 2 minutes before the vet appointment..) you can tag them with RF
or IR xmitters and place one SX/Ethernet board with a receiver and ID
decoder in each room to report what it sees back to a PC via UDP. Given two
way IR or RF connections, this could be extended to provide wireless network
support with each device acting as a "cellular network transceiver" for its
office space.

...besides any number of industrial control or reporting solutions where you
need a network connection and some signal conditioning or processing and
intelligence in the interface.

And, of course, its perfect for connecting the office coffee and soda
machines to the net so you don't have to walk all the way down the hall if
your drink of choice isn't available. <GRIN>

THE CONTEST
Since we are getting started late and in a short month, I'm going to make
this a three month / three phase contest:

Now to MAR: By the end of Feb, you need to have emailed or posted your
contest idea. No code required, just a write up of what and why. These will
be posted and discussed. I'll give some feed back on how likely your idea is
to be doable and a winner. All the ideas will be posted on the site with
full credit to the author. Also, keep in mind that the first person to
register an idea owns it for the purposes of this contest. You can't enter
an idea that someone else has already entered. So post your plan NOW!

MAR to APR: Next comes the actual code. Remember: this is for an SX52. More
code, more registers. A few tricks. But I'm not going to require that you
have one now. Put in dummy SX-Stack API calls (all just retp's) and write
the code in an SX 28 , a PIC or even a simulator. I will try to get some
SX52 chips for people who want them and don't have them (the current
distributors are targeting big volumes only for this powerful chip) and we
will discuss programming and debugging the monster. By the end of March, you
need to have emailed or posted some code. Doesn't have to be working, but it
has to be complete and look reasonable; needing only porting to the SX52 and
debugging.

APR to MAY: At the start of this phase, I will mail out the 20 Ethernet SX
Stack Evaluation Kits to the best entries so you can actually implement your
design. This final part of the contest is a race... the first finalist to
post working code wins the contest and is declared the SX Master (or
Mistress) on the site, receives a trophy and some toys and a $100 cash
(check) award.


THE PRIZE:
20 Finalists will be shipped Ethernet SX Stack Evaluation Kits
www.ubicom.com/ethernet/ethernet_sx_stack_eval.html
These things are $200 a pop.

One winner will receive $100 a trophy and some toys and will be advertised
on every page on my servers. We are averaging 11,000 hits a day from 1,100
visitors (distinct IP's) so this is not a bad thing. You can check it out
yourself at
http://www.sxlist.com/techref/stats/exsum.htm

FINE PRINT:
- The source and design must use an SX and be GPL'd.
- I'm the judge, jury and executioner, no-one comes to the boards and money
except by me, my decisions are final. ...Always wanted to say that...
- The contest will run from now until the end of May 2001 in three phases:
Deadline for entry: March 1st, 2001. Deadline for code: April 2nd, 2001.
Deadline for finished entry: May 1st, 2001. About 2.5 months.

I WILL give out as many boards as I can
...and I WILL award at least half the prize money to SOMEONE
...and I WILL post all entries to the site:

So send in what you have even if it's not perfect. Check for updates at
http://www.sxlist.com/techref/ubicom/contest/ethernet.htm

James Newton
1-619-652-0593
TakeThisOuTjamesnewtonspamspam_OUTsxlist.com
SX FAQ: http://www.sxlist.com

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2001\02\13@133116 by jamesnewton

face picon face
Great idea! I'm assuming the device will work with a PC on the house network
to store and retrieve recipes, shopping lists, and for the games as the 262
bytes of ram in the SX52 are no where near enough to keep anything and the
EEPROM is limited life (you can only write to it so many times). Or will you
add some external RAM to the device?

It seems like making it work as a sort of smart terminal / minimal web
browser would be best so that the intelligence / applications can be a
service of a remote server. The commercial opportunity is to sell the unit
at cost (or less) since it will be very inexpensive and then make your money
off the service. This also allows you to offer constant upgrades, recipe of
the month, dietary planning, chat services and <GRIN> new games.

As for the touch screen, how about just using large "button" areas on the
display and a ring of LED's and photocells around the display frame. When
the beam from the LED is interrupted, you know the fingers position, then
you just have to figure out if it is actually being pressed against the
display. Perhaps a microphone attached to the display could "hear" the tap
of the finger against the glass. Just ideas.

---
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1-619-652-0593
RemoveMEjamesnewtonspamspamSTOPspamsxlist.com
SX FAQ: http://www.sxlist.com




{Original Message removed}

2001\02\13@133319 by jamesmichaelnewton

picon face
That is a heck of an idea. I would think that big trucking or delivery firms
would be very interested in that ability. Many of these companies are using
wireless networking to provide a datalink to their drivers on the road, so
the network connections may already be provided.

I don't see the telephone cable running out of the truck stop restaurant
phone, down the road to the trouble stop and into the cab, <GRIN> but with
the RF link, its an easy winner.

Perhaps it would also be useful at a mechanics shop when remote assistance
is needed to troubleshoot a tricky problem.

Really what you are talking about is an OBD-II to internet transducer. The
bulk of the work would be in the connection to the vehicle and figuring out
a helpful way of displaying the ODB-II codes.

Can you firm up the proposal a bit and re-submit it?

---
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1-619-652-0593
.....jamesnewtonEraseMEspamsxlist.com
SX FAQ: http://www.sxlist.com



{Original Message removed}

2001\02\13@133332 by jamesnewton

face picon face
-----Original Message-----
From: Amaury Jacquot [spamBeGonesxpertspamRemoveMEhttp://www.esitcom.org]
Sent: Saturday, February 10, 2001 20:14
To: .....jamesnewtonEraseMEspamsxlist.com
Subject: contest #2 : my entry


Ok,
After reading the contest definition, I just found something that
I'm sure is gonna be a winner...

here is an ascii-art of the project :
   _______________    ________________
   |             |    |              |
----|eth          |----| video        |-- to TV
   |             |    | text         |
   |    sx52     |    | generator    |
   |    board    |    | (contest #1) |
   |_____________|    |______________|
      |      |                     |
      |      |                     |
      |      +----- phone line     +-- video in
      |
      +-->|--+ IR led(s)
            _|_
            ///         (other sensors, such as tv on)

here is the concept...
the device is hooked
* to the phone line (caller id)
* to the video generator (modified for the occasion, see below)
* to some ir-leds
* to the home/office network

possibilities include :
* getting caller-id info and sending it to a computer
* drawing text on the tv (the caller id info, or whatever is
  sent to the proper UDP port.
* remote controlling the various A/V equipment with commands
  sent via the ethernet.

a daemon on one of the computers on the network would control
what the device.
the device may include some automatic things, like turn the TV on
and show callerid info automatically and then turn the tv off if
it was off previously.
eventually include also an IR receiver to remote control some other
things through the network.

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'[SX]:'
2001\03\17@015049 by Michele Bellini
flavicon
face
I want only post for sx scenix microcontroller.

I dont want post about PIC.

To excuse everyone; i have make an error yesterday; i have understand that with the registration from yesterday, i can have about sx scenix  microcontroller.

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2001\03\17@042112 by Michele Bellini

flavicon
face
[SX]

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2001\03\17@122449 by Dan Michaels

flavicon
face
Michele Bellini wrote:
>I want only post for sx scenix microcontroller.
>
>I dont want post about PIC.
>
>To excuse everyone; i have make an error yesterday; i have understand that
with the registration from yesterday, i can have about sx scenix
microcontroller.
>

Administrators - sounds like Michele would like some help along
the lines of determining how to filter out all messages except
those beginning with [SX]:

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'[SX]: Using Microchip's Floating Point Library wit'
2001\03\20@004930 by Thomas Robert de Massy

flavicon
face
Hi,
   I would like to know if someone has already used Microchip's IEEE 754
compliant Floating point library (AN575) in a SCENIX SX28AC ? what's the
best way to make the library SCENIX compatible ? I planned to convert
instruction by instruction to the SCENIX syntax, but I was wondering if
there's a program that can convert code from PIC to SX. Or could it be
possible to compile the library using a PIC assembler and get and object
file usable in a SCENIX program (since the SX is PIC instruction compatible)
Do you have any suggestion ? or an already converted library.

I also plan to use the Floating Point routines library.

Thanks in advance

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'[SX]: looking for parallax mnemonic reference manu'
2001\03\20@150048 by Thomas Robert de Massy

flavicon
face
Hi,
   I saw that SASM support parallax's SX mnemonic. Where can I find a
parallax SX mnemonic reference manual ? I only found SX-Key manual on
parallax's site, should I use these mnemonic ? is SASM 100% compatible with
parallax ? can we mix SCENIX mnemonic with parallax in a program ? for
exemple I would like to use a library writen in SCENIX mnemonic in a program
writen in parallax.

Thanks in advance

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2001\03\20@153058 by Stephen Holland

flavicon
face
Thomas,

Just to clarify, SASM supports Ubicom's (formerly Scenix) SX mnemonic, and
has added supported for all of the [known] Parallax macro instruction
mnemonics. I'm not sure what you mean when you say, 'mixing Scenix mnemonic
with Parallax'...

Both assemblers are 100% compatible for native instructions. Parallax still
goes their own way with some of the assembler and tool specific directives
(ie. device directives, macros, etc.) and operators, so you'll need to
consult the SX-Key manual for Parallax, and the SASM User's Manual for SASM.
All of the code on the Ubicom website give the user the ability to choose
the assembler being used, so you could consult the code as well to get some
pointers.

Stephen

{Original Message removed}

2001\03\20@153851 by Thomas Robert de Massy

flavicon
face
I'm a bit confuse with the difference between Ubicom's SX mnemonic and
Parallax mnemonic, only the macro instruction are different ? are standard
instructions like MOV the same ? I thought that parallax have more standard
instructions.


{Original Message removed}

'[SX]: SX-Key Demo board & QuickProto schematic nee'
2001\03\20@235458 by Thomas Robert de Massy

flavicon
face
Hi,
   Does anyone has a good resolution schematic version of the SX-key demo
board & quickproto board ? the schematic version on the manual are not
usable.

Thanks
send them to RemoveMEtomasdRemoveMEspamRemoveMEaxess.com

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'[SX]: Using Microchip's Floating Point Library wit'
2001\03\20@235716 by Nikolai Golovchenko

flavicon
face
Thomas, try this:

http://www.sxlist.com/cgi-bin/mpasm2sasm2.exe

I haven't converted the floating point library, but it should be
possible. Also, keep in mind, that the library may have errors! For
example, some time ago we had discussion about errors in INT2416. The
corrected version can be found at piclist.com (and discussion in
archives).

Check the license for MChip code. Some new application notes don't
allow the code use on other microcontrollers! :)

I wonder, is there a reason to use floating point at all? Fixed point
is easier and more efficient IMHO.

Hope it helps,
Nikolai

---- Original Message ----
From: Thomas Robert de Massy <tomasdKILLspamspamspamAXESS.COM>
Sent: Tuesday, March 20, 2001 7:13:56
 To: spam_OUTPICLIST@spam@spamMITVMA.MIT.EDU
Subj: [SX]: Using Microchip's Floating Point Library with SCENIX

{Quote hidden}

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'[SX]: looking for parallax mnemonic reference manu'
2001\03\21@123212 by Stephen Holland

flavicon
face
The PIC mnemonics and Parallax mnemonics are different, but Ubicom (Scenix)
didn't bother to use PIC-like mnemonics at all and just went for 8051-like
(which Parallax also uses) mnemonics as they are much, much easier for
people to understand.



{Original Message removed}

'[SX]: Pic programmer now for Sx and Atmel'
2001\03\29@121946 by Peter Crowcroft

flavicon
face
Kit 117 - picall pic programmer has been a good success. Bojan Dobaj (
http://picallw.com ) has a 2 year track record of fully supporting his
software. About 900 have been sold since 11/98.

Bojan has extended the software to some Atmels and some Sx uC's. See his
website for details. I have now done the hardware to hopefully support the
new software.

You can see the new hardware schematics and overlay at

http://kitsrus.com/zip/k144.zip

I need a couple of people to test the new hardware. I will give away free
two K144 programmers to two people who will test it with chips like
SX-18,SX-28,AT90S2313,4414,8515,8535 and give a report to Bojan and myself.

Please email me privately if you are interested.

Thank you,


regards,

Peter Crowcroft
           DIY Electronics (HK) Ltd
     PO Box 88458, Sham Shui Po, Hong Kong
Voice: 852-2720 0255   Fax: 852-2725 0610
Web:  http://kitsrus.com     Email: TakeThisOuTpeterspam_OUTspamkitsrus.com
   Number One in Electronic Kits Worldwide
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2001\03\29@125124 by jamesnewton

face picon face
I would be willing to test it with the SX18 and 28. I haven't started in on
the Atmel stuff yet.

This is assuming we can put our moral differences aside? <GRIN>

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{Original Message removed}


'[SX]: testing a new programmer'
2001\05\11@034637 by Vasile Surducan
flavicon
face
Hi everyone,
A friend of mine has built his own SX52BD programmer.
As he claimed everything it works ok with programming sequence but
he can't do a led to flash.
If there are experienced users of SX52BD can someone  mail a functional
flashing led program on RA7 with internal osc ?
BTW, simulation is ok.
Thanks in advance.
Vasile

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2001\05\14@025430 by Vasile Surducan

flavicon
face
part 1 669 bytes content-type:TEXT/PLAIN; charset=US-ASCII

Where are you SX-listers? , I'll made another try, with flashing led code
attached. Please take a look.

On Fri, 11 May 2001, Vasile Surducan wrote:

{Quote hidden}


part 2 1859 bytes content-type:TEXT/PLAIN; charset=US-ASCII; name="stefled1.asm"
(decoded base64)

;Assembler file modified and tested by ing. Albert Stefan

;Date - 2001.apr.26.

;This file was generated by P2C-plus compiler version 2.00.6e

;************************************************************



org $0

param00_delay_ms                equ 10  ;general RAM

param00_delay_s                 equ 12  ;general RAM



   org _Reset

   jmp Start ;set reset jump address



   org 0

   reti

Start

   jmp start__code

_delay_s

   jmp _delay_s__code

_delay_ms

   jmp _delay_ms__code

start__code



_main__code



   mov w, #29

   mov m, w

   mov w, #128

   mov !ra, w



   mov w, #30

   mov m, w

   mov w, #255

   mov !ra, w



   mov w, #31

   mov m, w

   mov w, #$7F

   mov !ra, w



label_0000

   setb RA.7

   mov w, #1

   mov param00_delay_s, w

   call _delay_s

;    page 0  

   clrb RA.7

   mov w, #1

   mov param00_delay_s, w

   call _delay_s

;    page 0  

   jmp label_0000

label_0001

_main__end

_delay_s__code

label_0002

   mov w, #250

   mov param00_delay_ms, w

   call _delay_ms

;    page 0  

   mov w, #250

   mov param00_delay_ms, w

   call _delay_ms

;    page 0  

   mov w, #250

   mov param00_delay_ms, w

   call _delay_ms

;    page 0  

   mov w, #250

   mov param00_delay_ms, w

   call _delay_ms

;    page 0  

   decsz param00_delay_s

   jmp label_0002

   retp

_delay_s__end

_delay_ms__code

label_0003

   mov w, #2

   mov param00_delay_ms+1, w

   nop

label_0004

   nop

   nop

   nop

   nop

   nop

   nop

   nop

   nop

   nop

   decsz param00_delay_ms+1

   jmp label_0004

   nop

   decsz param00_delay_ms

   jmp label_0003

   nop

   retp

_delay_ms__end

;end


part 3 131 bytes
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2001\05\14@150452 by Stephen Holland

flavicon
face
part 1 1303 bytes content-type:text/plain;Vasile,

Here is a modified version of the 16-bit timer VP from Ubicom's website that
uses the internal oscillator at 4MHz and toggles RA.7.

It took only a few minutes to change the code and get it running... You
should check out the other source files there for other examples.

Stephen

> {Original Message removed}
part 2 31927 bytes content-type:application/octet-stream; (decode)

part 3 131 bytes
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2001\05\15@022236 by Vasile Surducan

flavicon
face
On Mon, 14 May 2001, Stephen Holland wrote:

> Vasile,
>
> Here is a modified version of the 16-bit timer VP from Ubicom's website that
> uses the internal oscillator at 4MHz and toggles RA.7.
>

Thanks Stephen !
Vasile

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'[PIC]: [SX]: Jal 04-35'
2001\05\15@171313 by uter van ooijen & floortje hanneman

picon face
There is a new Jal version at the Jal home page
http://www.xs4all.nl/~wf/wouter/pic/jal
The differences with the previous version are small, but there is also a -
long awaited - Linux version!

NB for those who do not know: Jal is a free (freeware, but not open source)
compiler for a language that looks like Pascal. It targets 16x84, 16F877,
12C508/9, SX18/28.

corrections:
- COMF instruction simulation
- problem with out parameters for functions
- handling of directory separator character
additions:
- minimalistic support for 12CE674
- ; as alternative for -- (to make it easier to 'import' commented MPASM
fragments)

The 12CE674 support only means that the file registers (RAM) on the first
page are set correctly. Otherwise the chip is treated as a 16F84, which
might give some surprises. The configuration word must surely be set by hand
in the programmer. NB I did not test this, I have no 12CE674.....

Wouter

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'[SX]: Programming SX MCUs'
2001\05\17@155539 by Jan Malina

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I know of one DIY circuit for a programmer that is on the sxlist site, but are there any other out there?

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2001\05\17@235059 by Alejandro Lavarello

picon face
Hi, Jan!

Well, I have not tested it, but maybe you can use the "Fluffy"
programmer.
It seems a good tool. It is based in a PIC16F84 which
communicates with the PC using serial and/or parallel port
(automatic detection).
Can program PIC and Ubicom (formerly Scenix) microcontrollers.

Check the page:
http://www.codepuppies.com/~ben/sens/pic/sx/

Cheers!
      Alejandro.

At 21:56 17/05/01 +0200, you wrote:
>I know of one DIY circuit for a programmer that is on the sxlist site, but
are there any other out there?
>
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2001\05\18@013105 by uter van ooijen & floortje hanneman

picon face
> Well, I have not tested it, but maybe you can use the "Fluffy"
> programmer.
I have used it (sometime ago) and it worked fine for SX18 and SX28.
Wouter

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2001\05\18@034224 by Jan Malina

flavicon
face
Yea, I have already seen the 'fluffy', but the problem is that you would
need a PIC for that, and a programmer for that PIC. And the basic reason
why I am going to use the SX MCUs is because I can get them here easily,
the PICs are harder to get around here....

{Original Message removed}

2001\05\18@081945 by michael brown

flavicon
face
I use a Picall programmer (CPS117).  It will program all PIC12 and PIC16,
Atmel AVR, SX18, SX28 and some serial EPROM chips, although I haven't
programmed any Atmel or SX chips with it.  I got it from Amazon electronics
(http://www.electronics123.com)  The kit price is $69.95 US.  This includes the
license for the software.  You do need to supply a 40pin ZIF socket and
power supply.  Hope this helps.

Michael Brown
Instant Net Solutions
http://www.KillerPCs.net

{Original Message removed}

2001\05\25@135037 by jamesnewton

face picon face
I have made a standing offer of $100.00 and a write-up on every page of the
site to anyone who will add SX programming ability to the
bubblesoftonline.com pocket programmer which is open source and very home
buildable.

http://www.piclist.com/techref/microchip/devprogs.htm#pocket

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Jan Malina wrote on 01-5-19 2:22:

I know of one DIY circuit for a programmer that is on the sxlist site, =
but are there any other out there?

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'[SX]: What happened to Chuck Glenn?'
2001\06\04@195036 by James Newton. Admin 3
face picon face
part 1 898 bytes content-type:text/plain; (decoded 7bit)

What happened to Chuck Glenn? Anybody have a more up to date copy of the
Scenix (now Ubicom) tool kit? and the nice little SXSIM.EXE?

James Newton
1-619-652-0593 phone
EraseMEjamesnewtonspamKILLspamsxlist.com
Ubicom code http://www.sxlist.com

{Original Message removed}
part 2 1268 bytes content-type:message/rfc822; (decode)

part 3 136 bytes
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2001\06\04@202723 by Randy Glenn

picon face
I have a version from March 1999... with Delphi sources, by the look of it.

Is that of any help?

-Randy Glenn

New record for time between Windows reinstalls: 4 months.
=================================================
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PICxpert.com going away - use picxpert.dyndns.org
   Not that the site works yet, of course...
=================================================

{Original Message removed}

2001\06\05@133701 by jamesnewton

face picon face
YES! Could you send it to me at jamesnewtonTakeThisOuTspamKILLspamsxlist.com? Thank you.

Are you related to Chuck? Do you know where I could reach him to ask
permission to post the simulator on sxlist.com?

---
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{Original Message removed}

'[SX]: Programming 16C54's with the Pocket'
2001\06\12@015319 by James Newton. Admin 3

face picon face
SX's are NOT parallel programmed. They are programmed from only two data
lines (connected to OSC1 and 2). The pocket could easily be extended to
support SXs. All the required information is at the sxlist.com site. And I
will pay $100 etc... to the first person who does it.

James Newton, PICList Admin #3
@spam@jamesnewtonSTOPspamspampiclist.com
1-619-652-0593 phone
http://www.piclist.com

{Original Message removed}

2001\06\12@021130 by Dan Larson

flavicon
face
Forgive the heresy, but the AVRs which use either low or high voltage
serial programming would be a breeze too. They are essentially programmed
through an SPI interface, save for the exception of the state of MCLR.
Newer AVRs will support JTAG.

Dan

On Mon, 11 Jun 2001 22:14:26 -0700, James Newton. Admin 3 wrote:

>SX's are NOT parallel programmed. They are programmed from only two data
>lines (connected to OSC1 and 2). The pocket could easily be extended to
>support SXs. All the required information is at the sxlist.com site. And I
>will pay $100 etc... to the first person who does it.
>
>James Newton, PICList Admin #3
>TakeThisOuTjamesnewtonTakeThisOuTspamRemoveMEpiclist.com
>1-619-652-0593 phone
>http://www.piclist.com
>
>{Original Message removed}

2001\06\12@021755 by Randy Glenn

picon face
Actually, SX's can be programmed using either a parallel or serial method -
both are documented on Ubicom's webpage.

As for programming 12-bit parallel PICs, what about a shift register hooked
up to the ICSP output? Surely it wouldn't be too hard to do... and I doubt
that the hardware adaptor would be incredibly large for a given footprint
(trying to do 18, 28 and 40 pin on the same adaptor would not be much fun,
of course).

-Randy Glenn

New record for time between Windows reinstalls: 4 months.
=================================================
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=================================================

{Original Message removed}


'[SX]:'
2001\07\19@042618 by herschke
flavicon
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'[SX]: Looking for programming header pinouts for M'
2001\07\28@073557 by Neil Gandler

flavicon
face
I have a design that incorperates a PIC microcontroller and
a Ubicom (Scenix) SX series Microcontroller.
For the PIC, the programming interface consists or VPP, Program CLK, Program DAT, GND.
For the SX, the programming interface consists of the 2 OSC pins and GND.
For production purposes, I would like to use the standard pin-out scheme and header type (if a standard actually exists)
that works with most common programmers for these devices. So during production, I can simply interface a programmer for these devices to the target board without any conversion cables. Can anyone refer to some online documentation that spells this out. Thanks

Neil Gandler
Founder, CTO
MAI Technology Inc.
P.O. Box 64072
Sunnyvale, CA 94088-4072
Phone & Fax: 408-904-5089
e-mail: EraseMEneil_gandler.....spamgetmai.com
http://www.getmai.com

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2001\07\28@081354 by Alexey Vladimirov

flavicon
face
28 Jul 01, spamneil_gandlerKILLspamspam@spam@getmai.com writes to All:

ng> I have a design that incorperates a PIC microcontroller and
ng> a Ubicom (Scenix) SX series Microcontroller.
ng> For the SX, the programming interface consists of the 2 OSC pins and =
ng> GND.

VDD also is necessary for the SX programmer/ICE.

ng> For production purposes, I would like to use the standard pin-out
ng> scheme and header type (if a standard actually exists) that works
ng> with most common programmers for these devices.

All known for me SX development tools can be used with this header:
http://www.brouhaha.com/~eric/ubicom/technotes/prog_hdr.html

Some tools use only 4-pin header, some use 6-pin with pin 5 deleted (as a key
to prevent wrong connection).

Alexey

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'[SX]: First open source update for SXKey users!'
2001\08\17@171609 by jamesmichaelnewton
picon face
When Parallax stop developing the SXKey, I was crushed. There followed many
cries of despair from the SX community and for a long time we just suffered.

I started recommending other SX debuggers
http://www.sxlist.com/techref/ubicom/debuggers.htm

Finally, Parallax, did the right thing, and released the source code for the
IDE
www.parallaxinc.com/html_files/downloads/downloads_sx.htm
and finally, we are starting to see some grassroots updates.

Peter Montgomery has released his first SXKey software improvements!
Here's a list of the current changes:

1. All windows store (and use) their last positions in the registry.
2. Added a button labeled "Default Pos." on the Debug window which will
reset the debug windows to the default position when pushed.
3. The COM port is stored and retrieved from the registry.
4. The IRC calibration settings are stored and retrieved from the registry.
5. The program now maintains a list of the 5 most recently opened files in
the registry. When a file is loaded from this list, the current working
directory becomes the directory of the open file. This more or less
eliminates the need for a default directory since users can open files from
the most recent list and then navigate from there if needed.

Download SXKey 1.33.1 from Peters member page at:
http://www.sxlist.com/techref/member/pm-csi-com/index.htm

Peter says: "Here's hoping that people find this useful. More changes are in
the works, but they will have to wait a little bit. Yes, an updated editor
with undo, redo, scrollbars, etc is planned"

Thanks Peter!

---
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'[SX]: Hi Temp Operation'
2001\08\24@133036 by Mr MCU

flavicon
face
Has anyone done any testing of the SX parts above 85C?  Any info will help.

Thanks,

- Mike

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2001\08\24@170339 by jamesnewton

face picon face
I had one running for about 1/2 hour with two outputs pulled hi and shorted
externally to ground. The chip burned my thumb when I touched it but it was
running correctly the entire time....

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{Original Message removed}

2001\08\24@183443 by Stephen Holland

flavicon
face
I once layed a soldering iron across one and it still ran fine.


> -----Original Message-----
> From: Mr MCU [TakeThisOuTmikepspamspamSGI.NET]
> Sent: Friday, August 24, 2001 10:30 AM
> To: KILLspamPICLISTKILLspamspamspamBeGoneMITVMA.MIT.EDU
> Subject: [SX]: Hi Temp Operation
>
>
> Has anyone done any testing of the SX parts above 85C?  Any
> info will help.
>
> Thanks,
>
> - Mike
>
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>
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'[SX]: Dual UART & IIC multimaster virtualperiphera'
2001\09\14@034211 by Russell McMahon
picon face
Has anyone successfully used the Ubicom sample dual UART & IIC multimaster
virtual peripheral ?

I've just returned to a project where I'm intending to use this code.
The dual UART had a fatal flaw which I have fixed. This probably came from
someone having duplicated code for a single UART but missing a common flag
fatally shared between the two routines - possibly OK if only one was active
at once and you changed serial connections over to test each in turn. I've
added a 3rd UART to this and they all work OK.

I've just started on the IIC (where I only need a single master) and at
first try it appeared "dead in the water".
I added a debugging call to a print routine part way through the code. This
needed a bank switch and I then restored the bank to where it "should" have
been after the serial call, and lo & behold, it burst into somethinfg like
life. Removing the serial call but keeping the subsequent bank call (which
should now be redundant) and it still works partially. This suggests the
basic code is flawed. If anyone else has used this with success I'd love to
hear from them. I'll no doubt get it going but short circuiting having to
fix something which isn't meant to be broken would be nice.

I'd like to think that it was just something I was doing wrong but the fact
that the UART was definitely broken suggests the other problem also may be
real.


regards


               Russell McMahon

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2001\09\14@080526 by Mr MCU

flavicon
face
As a matter of course, I never use any supplied code without going through it
first and debugging it.  I look at them as SAMPLES!  I always make changes ...

- Mike

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'[PICLIST] [sxtech] [SX]: Dual UART & IIC multimast'
2001\09\14@103253 by Stephen Holland

flavicon
face
Since the combos are just that, a combination of virtual peripherals, they
may or may not contain the most updated version of VP code. So yes, there
may be bugs. These were simply meant as samples and turned into alot of work
for very little return, so they may not be kept up to date.

> {Original Message removed}

'[SX]: Dual UART & IIC multimaster virtualperiphera'
2001\09\17@073210 by Russell McMahon

picon face
> I have also been looking at the multiple UART code supplied by Ubicom
> and found that the 8 UART code was also fatally flawed. The problem
> that I found was that at maximum baud rates, the code degenerated
> into doing only 1x oversampling of the input, which obviously would
> never work reliably, if at all. I wrote Ubicom about this and they
> indicated that they were aware that some of their samples were very
> buggy and were dropping them from their web site as a result.
>
> My need is to run 5 UARTs at 19200 or 38400 baud full-duplex, and I
> am just beginning to develop code for this.  I ran the calculations
> and it looks like it can be done at 50 MHz, but just barely. If you
> can provide any working samples that would be helpful, it would be
> most appreciated. I will be doing some IIC later, but haven't looked
> into that yet.

Nothwithstanding the "sample" state of the code I was surprised to find that
it was fatally imperfect - certainly so in the case of the UARTS and
apparently so (so far) i the case of the I2C.


The 2 UART code from the "I2C plus dual UART" should be extendable to 8
UARTS although you may have to look carefully at RAM usage..
I have extended it to 3 for my purposes and they seem to work OK.

Ubicom give the worst case send and receive time for 1 UART as 36 cycles
At 50 MHz and 50% utilisation and 38,400 baud you have about
50,000,000 / 38400 /2 /36 = 18 worst case UART send / receive calls.
This is indeed a "little tight" as it gives 18/8 = 2.25 UART calls per bit.
However this is worst case wiRX & TX in worst case mode every call whereas
most of the time they will not be.
Typical is probably 30 to 32 cycles - still tight but rememebr - this is at
50% cpu utilisation so there's a bit of slcak there.
Quite possibly you could "cheat" and gang all transmitters in lock step so
you start all active tx bytes at once and have an 8 bit parallel UART
routine. This should be able to be made much more cycle efficient. A new
character on a previously idle channel waits until the end of the current
cyel time and doesn't start asynchronously as it does now. The receivers do
not "know" about this synchronism. This "trick" cannot of course be applied
to the receivers  as they are from independent sources.


Re my change for RX - simple but necessary -
1.    Flaw in code is that the receive data ready bit is in a register in
the common RAM.
All UARTS set and clear the same bit so simultaneously arriving characters
will interfere with each other via this ready bit.

The simple fix is to use a bit in the RAM associated with each UART.
See "code" at end.

Whe the RAM is paged to the bank that belongs to that UART the proper bit is
used.
An alternative would be for each UART to have its own but in common RAM.

2.    The original dual UARTS were  in series within the same interupt tick.
Every N ticks the UART code was run BUT only one or other of the UARTs code
was run in that tick - they use a 0/1 bit to pass control to successive
UARTS.

I am only running at 4800 bps (set by existing equipment) which makes the
requirement less demanding
I slowed the interupt rate and adjusted the ticks per uaRT call
appropriately.
I then followed one UART with code for another to be run subsequently.
ie every N IRQs run a or b UART code
a = UART 1
b = UART 2 & then 3

UART 3 is now somewhat non-isochronous (ie its calling times "jitter" ) due
to the variable time taken by the preseding routine but this is acceptable.
Delays could be added if desired to UART 2 to make the code isochronous
(constant time to run under all situations).

Extra UARTS could also be added by adding extra parallel threads.
ie while each UART runs every N irqs they are staggered as to starting pont.
This is a standard method and necessary to get full processor utilisation.

More anon



       Russell McMahon


_______________________________________________

ORIGINAL CODE:

; **** This is where the receive status flag is defined
;        The simple but important change markeD ==> below
;         allows both UART receivers
;         to work indepently, as they are intended to.

;***************************************************************************
**************
; Global Register definitions
; NOTE: Global data memory starts at $0A on SX48/52 and $08 on SX18/20/28.
;***************************************************************************
**************
 org     global_org

main_temp equ global_org+1
isr_temp equ global_org+2  ; Temporary variable used by the ISR.
flags  equ global_org+3

; Replaced by bit in rx bank "rxflag"

; **** This bit is common to ALL UARTS (fatal)
uart_rx_flag  equ flags.0  ; flag set when data received by UART

active_uart_isr_flag  equ flags.1  ; uart flag used in ISR to switch between
UARTs

; =====================================================

; INSTEAD DO THIS


;***************************************************************************
******
; Bank 2 - Serial bank

;***************************************************************************
******

; ******** Standard assigns for serial receive.
 org     bank2_org
BANK2  = $
SERIAL1  =       $ ;UART bank 1
tx_high  ds      1 ;hi byte to transmit
tx_low  ds      1 ;low byte to transmit
tx_count ds      1 ;number of bits sent
tx_divide ds      1 ;xmit timing (/16) counter
rx_count ds      1 ;number of bits received
rx_divide ds      1 ;receive timing counter
rx_byte  ds      1 ;buffer for incoming byte
string  ds 1 ;used by send_string to store the address in memory
byte  ds 1 ;used by serial routines
hex  ds 1

; ==> ****** Here is the extra assignment needed for the local receive flag.

ruslrx  ds 1 ; rusl ..debug rx receive data bit
rxflag  equ ruslrx.0
ruslin  ds 1

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2001\09\17@095102 by Bob Ammerman

picon face
See my code at PICLIST.COM,
http://www.piclist.com/techref/microchip/16F84-rs232-8ch-ba.htm, that
implements 8 receive UART receive channels by performing all the operations
in parallel (using 'vertical math'). This code will handle up to 8 channels
at 9600 baud on a 16F84 at 20Mhz. You can save a little time by pulling out
a few instructions in the interrupt handler since you only want 5 input
channels.

The transmit side can  be implemented using similar vertical math
techniques, and should require less code per interrupt. Alternatively, since
the timer interrupt is 3x the bit rate, you could use more conventional
techniques and handle two outgoing channels on one interrupt, 2 on the next
and the remaining 1 on the third in each group of 3 interrupts.

With these techniques you should be able to handle 5 full duplex 19,200
channels at 50 Mhz CPU rate.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)


{Original Message removed}


'[SX]:'
2001\10\02@093804 by Wing Kent Kwan
flavicon
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'[SX]: Parallax Assembler "lint" ???'
2001\11\14@045835 by Russell McMahon
picon face
I'm using the Parallax assembler for SX processor but the following would
also apply
to PIC.

As is well known, when using Parallax's extended instructions, a skip
preceding such an
instruction will jump into the middle of the instruction. Obviously one
tries to avoid doing this but it can happen.

It would be nice if such an obviously unintended result would cause an
assembler error or, at least, a warning. It doesn't in the version I am
using. I am using the SXkey version 1.07 IDE. I'd change to a newer version
if it was known to address this but I suspect it doesn't. I could write a
program to check for this myself but surely others must have addressed this.
In the manual, Parallax basically say "be sure not to do this ".

Any thoughts?



regards


                           Russell McMahon

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'[SX]: Expression Evaluator'
2001\11\19@180649 by jamesnewton

face picon face
Just wanted to let you know about a new ASP page I've put up at
http://www.sxlist.com/techref/expeval2.asp

It is designed as a tool to help you translate math formulas into code for
the microcontroller. It first converts from infix to postfix and then
applies a few (but hopefully ever-increasing bag of) optimizations and
presents the resulting algorithm with links to applicable code generators or
library routines.

This is by no means a compiler for expressions! It is more of a utility /
learning tool or reminder for how math can be done on a uC.

It is also probably full of bugs, but I hope that with some FEEDBACK (hint,
hint...) I can fix it up... and extend it. If anyone wants to help, please
let me know and I will setup a CVS for it at sourceforge, but I think that
unless your interest is TEACHING, your time would be better spent on Scott's
C compiler port.

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'[SX]: "Real" IRQ driven I2C routines'
2002\01\16@022015 by Russell McMahon
picon face
Requirement:    FULLY interrupt driven I2C code that allows byte read and
write and ideally block write fully under interrupt control.
(The theory is easy - but hopefully someone has already invented this
wheel.)

Background:     I am using the UBICOM / Scenix interrupt driven IIC routines
on an SX28.
These worked after a little beating around the head - probably needed due to
using an integrated virtual peripheral where several VPs had been rolled
together as a demo (I used the I2C multimaster plus 2 uarts and extended
this to 3 uarts). The code was essentially sound but there were a few places
where eg RAM banking seemed inconsistent. Next time I use VPs I'll use the
single task version and integrate it myself with other VPs.

However, while the I2C core is interrupt driven, the majority of the I2C
state machine is run in the foreground and is not immediately amenable to
multitasking of other semi real time tasks. (eg - while the UART routines
will receive a single byte entirely under interupt control when left to
their own devices the I2C state machine must be driven in the foreground. As
presently conceived the I2C peripheral is called once in the foreground and
does not return control until the whole read or write task is completed. If
other time critical tasks occur (eg perhaps several serial ports delivering
data more or less simultaneously) then at higher baud rates the I2C task
must be interrupted if data is not to be lost (especially during I2C write
delays). (The UART tx/rx routines also hang until data is ready/sent as
supplied but are easily converted to useful operation by monitoring their
status and only calling them when they are free/data ready respectively).

This level of I2C peripheral autonomy compares extremely poorly with that
provided by hardware peripherals which can be set to process at least one
byte and usually several data bytes without further intervention. While it
would not be conceptually hard to take the Scenix I2C and drive the state
machine under interrupt control it may take some time to "get it right". A
look for available code (including at PICLIST & SX list sites) did not
disclose anything which does this fully automatically.

SO - has anyone got "fully" interrupt driven I2C code available for general
use?
(Or am I going to have to further automate the existing code myself :-( ).


regards



               Russell McMahon

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'[PICLIST] [sxtech] [SX]: "Real" IRQ driven I2C rou'
2002\01\17@054108 by Russell McMahon

picon face
> The last part of your description tells me that this 256kbit eeprom also
> uses 7-bit addressing.
> (7-bit meaning the id, 10-bit addressing is an extended i2c addressing
> mode).
> In my routines I have defined macros that access i2c devices like a stamp:
> I2cout id,address{\lowaddress},[dataout]
> I2cin id,address{\lowaddress},[datain]
> So I am pretty sure these routines can handle such an eeprom.

I'm confused :-).
I can't see how this could be "7 bit" addressing but if that's how someone
has defined it I am happy.

Please excuse the following "painful" description - you are clearly well
aware of IIC addressing etc but this may help others here wanting to use
this code.

I2C as provided in the original code sends a single byte write in 3 IIC bus
bytes as

   1010xyzW AAAAAAAA DDDDDDDD stop

1010 is device specific code
xyz USUALLY match the hardware strapping of 3 external address pins.
W is the read/write bit.
AAAAAAAA are the 8 address bits.
DDDDDDDD are the 8 data bits.
stop is STOP condition provided by cpu to indicate end of write sequence.

In the case of the 24C16 they cheat - the xyz bits are not compared to
hardware pins and are instead used as 3 extra TRUE address pins (even though
they may refer to them as bank bits). This means you can only have one such
IC in a given circuit. The hardware address pins are N/C.
The 11 bit address so formed may be addressed randomly between successive
writes. There is also a page mode allowing ??? bytes to be written
successively to a buffer.

The 24C256 addressing is

1010xyzW 0HHHHHHH LLLLLLLL DDDDDDDD stop

W as before
H is High address (7 bits)
L is low address (8 bits)

Any one of the 32k bytes may be addressed "randomly" on a given read or
write - to do this 15 address bits must be provided (7 + 8)
xyz are NOTIONALLY the same as before but NOW the 3 external device select
pins work and must match xyz for the EEROM to be addressed. xyz are now NOT
true address bits This allows up to 8 of them to be used in the same
circuit. Now xyz are NOT true address bits but are device select bits. This
device has a 64 byte page mode allowing up to 64 bytes to be written
successively for a single address write.
ie

           1010xyzW 0HHHHHHH LLLLLLLL DDDDDDDD DDDDDDDD
......................... DDDDDDDD stop

Note the 0 at the start of 0HHHHHHH - top bit is always zero.
This writes to an internal buffer and when the write is terminated the
buffer is written to the eerom proper. The EEROM will return a nack while
writing and performing reads is the formal way of establishing when the
write is completed - nacks will be returned to a read until writing is
complete.

The key thing here is, to change from small address devices to large address
devices you -

- Stop using xyz as true address bits
- Start using xyz as device select bits matching external chip-select pins
- Use two address bytes 0HHHHHHH LLLLLLLL in place of the single byte
AAAAAAAA
- QED




regards

               Russell McMahon

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2002\01\17@055844 by Alan B. Pearce

face picon face
>I'm confused :-).
>I can't see how this could be "7 bit" addressing but if that's how someone
>has defined it I am happy.

Check the Philips I2C spec document. The 7 bit addressing refers to the
first byte sent after the start condition. On a specific address in this
field a second address byte is sent which is also related to hardware
addressing, and between the two bytes can have a maximum 10 bit address.

Most EPROM's I have seen use the 7 bit address scheme with 4 bits fixed, and
3 bits strapped by external pins to allow a maximum of 8 EPROM's as you
describe. The 0HHHHHHH LLLLLLLL bytes you describe are data bytes, not
address bytes as far as the I2C spec goes, but are used within the EPROM as
an internal address, and have nothing to do with 7/10 bit addressing modes.

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'[SX]:Programming Scenix chips'
2002\02\06@152854 by David VanHorn
flavicon
face
At 12:13 PM 2/6/02 -0800, James Newtons' SXList wrote:
>source= http://www.piclist.com/postbot.asp?id=piclist\2002\02\06\131044a
>
>See
>http://www.sxlist.com for a complete review of the available options.

Thanks, that was what I was looking for.  I wasn't aware of SXlist.

>BTW: You do know they changed their name to Ubicom right?
>http://www.ubicom.com Their web site is a mess at the moment(they just
>changed the layout).

Yeah.. Another reason I figured I'd ask the list.

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2002\02\06@152913 by jamesnewton

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\02\06\131044a

See
http://www.sxlist.com for a complete review of the available options.

BTW: You do know they changed their name to Ubicom right?
http://www.ubicom.com Their web site is a mess at the moment(they just
changed the layout).


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2002\02\06@155156 by BryanW

flavicon
face
Hi,

Also there is the http://www.sx-forum.com always worth a visit.

Bryan

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To: <spamPICLISTspamspamspamMITVMA.MIT.EDU>
Sent: Wednesday, February 06, 2002 8:30 PM
Subject: Re: [SX]:Programming Scenix chips


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2002\02\06@160902 by Josh Koffman

flavicon
face
Anyone know why they changed their name? Did Microchip's lawyers start
hassling them? Maybe it's that Senix sounds like Linux, and we all know
there are PIC development tools written for Linux, so therefore, Senix
should be the intellectual property of Microchip.

Makes sense to me.

Josh

P.S. Your reply-to address is set James...you might get some personal
replies :)
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       -Douglas Adams


"James Newton. Admin 3" wrote:
{Quote hidden}

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'[SX]: Still no contest entries for Feb! Win a free'
2002\02\21@184636 by jamesnewton

face picon face
I must need to put more time into advertising the contest this month because
so far, I have NO ENTRIES. And there are only a few days left in the month!
The main prize is an SX-DEV debugger... that is a $180 value just by itself.

And I'm giving away Embedded Demo boards for people who's contest entry
involves embedded internet applications. This is a  complete embedded
internet development system!

All you have to do to enter the contest is get some SX code ready to
debug...
See:
http://www.sxlist.com/techref/ubicom/contest/starter.htm

And people... SX chips are just PIC16c54's on steroids... FLASH
programmable... 50 - 100 MIPS (not just MHz, MIPS!)... couple of extra
instructions to make paging and banking easier. You can even code in MPASM
if you want... the HEX file for a '54 can be loaded into an SX.

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'[SX]: SXLIST EMBEDDED STARTER CONTEST: February Wi'
2002\03\06@191809 by james
flavicon
face
FEBRURARY Entries:
- http://www.sxlist.com/ubicom/lib/io/dev/lamp/digilight.htm Timothy Stranex
[perspex at dream.za.net] send along his "first ever microcontroller
project." His Digilight "...changes the intensity of 6 lamps using pwm, the
pwm values are changed through an RS232 port. The lamps could be coloured
Red, Green and Blue and create some nice colour sequences for discos (and
for my imax-in-house project)." Timothy hopes to expand this project into
the Ethernet demo board

- http://www.sxlist.com/ubicom/lib/io/osi2/Morse.htm Guenther Daubach
http://www.g-daubach.com/ sent a very nice "description and the source code
for a Morse code keyer using an SX 28 device." Guenther is obviously a pro
and admits that he is writing a book on the SX chips for publication later
this year. I'll be looking to buy a copy when it comes out if it has more
projects like this on in it!

**** W I N N E R ****
Winner: Timothy Stranex. Tim has one SV-TEHS SX DEBUG and an SX Ethernet
Demo on the way. That is a complete $350 development system with In Circuit
Debugging, an SX 52, a RealTec Embedded Ethernet Adapter, switches, lights,
connectors, etc.. on a board with prototyping space. EVERYTHING needed for
embedded development with your PC.

Januarys Winner was:
- http://www.sxlist.com/ubicom/bindicator/index.htm the Bindicator remote
display by Timothy L. Hosey

There are no entries yet for March! Just get me some code:

THE SXLIST EMBEDDED STARTER CONTEST

For the new year, my goal is to enable YOU to get involved in SX embedded
microcontroller development especially if:

* You have worked with other microcontrollers and are looking for something
- - a bit faster ( 50-75 MIPS Not just MHz, MIPS!),
- - lower power use in low speed modes,
- - where you can watch it run (on-chip ICD),
- - and crank out new solutions with the same hardware (virtual
peripherals).

* You have time but not necessarily money. Students, mature kids, hobbyists,
retired persons and devoted computer enthusiasts. SX processors are one of
the lowest cost systems to get started with where you actually get a
complete and professional development environment.

* You like to learn new things but don't necessarily know anything about
computers. There is no better way to learn than to just get started...

To make this happen, starting in January 2002:

- I will give away at least one development system a month to the most
deserving applicant (in my humble opinion) who has written an original SX
program and is ready to debug it.

- I will give away Ethernet SX Stack Evaluation Kits like the ones used in
the SX FAST EMBEDDED ETHERNET contest to anyone who presents me with source
code for an SX stack application that is ready to try on the internet.

- I will answer questions, provide resources and make suggestions as
needed...

What do you have to do?

Just check out the site at
http://www.sxlist.com and then send me comments, questions, your ideas or
the one thing I REALLY want: CODE... SX code that needs a chip to run on and
a debugger to help clean it up.

---
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1-619-652-0593 VM 1-208-279-8767 FAX
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'[SX]:'
2002\03\12@224541 by jim

picon face

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'[SX]: SX18AC/SO obsolete?'
2002\03\25@051308 by Russell McMahon

face
flavicon
face
May be of interest to some here not on SX list, if true.

       RM


From: Tracy Allen <spamtracyspamemesystems.com>
To: <RemoveMEsxtechKILLspamspamKILLspamyahoogroups.com>

> At the Embedded Systems Conference I learned that Ubicom has
> obsoleted the SX18AC/SO in the SOIC package and now only will make it
> (the SX20AC/SS) in the SSOP package.  Does anyone have any inside
> information on that?  I see that Parallax still lists the SX18AC/SO
> for sale, but I wonder how long the stock is going to last.  It is
> harder to prototype with the SS package, but I guess they are trying
> to streamline their inventory.

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2002\03\25@235521 by James Newton, webmaster

face picon face
source=
http://www.piclist.com/postbot.asp?id=piclist\2002\03\25\051308a

Ubicom has consolidated the SX line. The biggest change I saw was
that the dropped the top speed back from 100Mhz to 75.

Still the fastest, but more focused on production and on the new
IP 2000 monster chip. Which is, by the way, upward compatible
with PICs. You can run PIC code on the IP2K because the entire 12
bit core instruction set is still in there.

See http://www.sxlist.com/techref/ubicom/ip2k.htm for details.


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'[SX]: Need a simulator for SX 48/52'
2002\03\28@113516 by dansimon

flavicon
face
I am currently using SXsim to test programs for SX18 and SX28. I went
cheap and bought the SX Blitz programmer, so ICE is just a dream for me.

Is there anything out there that will simulate the SX48 and SX52? Or
should I go buy a real SX key and use the Parallax software for ICE?

Also I keep finding links to something called "Chuck Glenn's Scenix
Toolkit" but the links are all dead. What's the story with that?

Thanks,
Dan

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'[SX]: C complier for SX??'
2002\03\30@102311 by Soon Lee

flavicon
face
Hi All

Is there any C complier for SX??
Any recommendations?


regards

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2002\03\30@115917 by Bob Blick

face picon face
Bytecraft makes an excellent C compiler for the SX, called SX-C.

Cheers,

Bob

On 30 Mar 2002 at 23:19, Soon Lee wrote:

> Hi All
>
> Is there any C complier for SX??
> Any recommendations?

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2002\03\31@014203 by Soon Lee

flavicon
face
Hi
Thanks for the infor

Do any one have any example file for me to try on

regards
----- Original Message -----
From: "Bob Blick" <KILLspambblickspamSONIC.NET>
To: <PICLISTspam_OUTspamspamMITVMA.MIT.EDU>
Sent: Saturday, March 30, 2002 8:59 AM
Subject: Re: [SX]: C complier for SX??


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'[SX]: SXLIST CONTEST: March Winner: ROV'
2002\04\03@172526 by james
flavicon
face
Ok, there was only one entry for March, so that was an easy contest. Of
course, there were only two entries in February...

...this isn't a real hard contest people! Easy to win some cool toys! Did I
mention that SX chips are pin compatible replacements for PIC 16C54's and
57's? Flash programmable? With ICD? Use MPLAB to develop? And they run at up
to 75 MIPS? 3.3v @ 50Mhz? 2.7v @ 32? See:
http://www.sxlist.com/techref/ubicom/picreplace.htm

Now accepting entries for April.

MARCH Entries:
- http://www.sxlist.com/techref/ubicom/rov/index.htm John Coleman [jlsilicon
at yahoo.com] has entered his "ROV - Remote Operated Vehicle" entry with
game boy camera and motor controller circuits ready to add to the Ethernet
Demo board. His code looks ready to debug with the embedded web server and
will allow remote operation from any web browser! Just add an 811.12
wireless Ethernet adapter and John will have a true virtual presence from
the internet.

**** W I N N E R ****
Winner: John Coleman has one SV-TEHS SX DEBUG and an SX Ethernet
Demo on the way. That is a complete $350 development system with In Circuit
Debugging, an SX 52, a RealTec Embedded Ethernet Adapter, switches, lights,
connectors, etc.. on a board with prototyping space. EVERYTHING needed for
embedded development with your PC.

Februarys Winner was:
- http://www.sxlist.com/ubicom/lib/io/dev/lamp/digilight.htm Timothy Stranex
[perspex at dream.za.net] Digilight computer lighting controller.

Januarys Winner was:
- http://www.sxlist.com/ubicom/bindicator/index.htm the Bindicator remote
display by Timothy L. Hosey

THE SXLIST EMBEDDED STARTER CONTEST
http://www.sxlist.com/techref/ubicom/contest/starter.htm

For the new year, my goal is to enable YOU to get involved in SX embedded
microcontroller development especially if:

* You have worked with other microcontrollers and are looking for something
- - a bit faster ( 50-75 MIPS Not just MHz, MIPS!),
- - lower power use in low speed modes,
- - where you can watch it run (on-chip ICD),
- - and crank out new solutions with the same hardware (virtual
peripherals).

* You have time but not necessarily money. Students, mature kids, hobbyists,
retired persons and devoted computer enthusiasts. SX processors are one of
the lowest cost systems to get started with where you actually get a
complete and professional development environment.

* You like to learn new things but don't necessarily know anything about
computers. There is no better way to learn than to just get started...

To make this happen, starting in January 2002:

- I will give away at least one development system a month to the most
deserving applicant (in my humble opinion) who has written an original SX
program and is ready to debug it.

- I will give away Ethernet SX Stack Evaluation Kits like the ones used in
the SX FAST EMBEDDED ETHERNET contest to anyone who presents me with source
code for an SX stack application that is ready to try on the internet.

- I will answer questions, provide resources and make suggestions as
needed...

What do you have to do?

Just check out the site at
http://www.sxlist.com and then send me comments, questions, your ideas or
the one thing I REALLY want: CODE... SX code that needs a chip to run on and
a debugger to help clean it up.

---
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1-619-652-0593 VM 1-208-279-8767 FAX
spamBeGonejamesnewton.....spamsxlist.com
SX FAQ: http://www.sxlist.com

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'[SX]: C compiler for SX ?'
2002\04\05@005731 by David Cary

picon face
Dear Soon Lee,

Many PIC C compilers claim to support both PIC and (Scenix) SX
microcontrollers.
  www.piclist.com/techref/microchip/languages.htm
  http://www.ccsinfo.com/compare.html

I hear that the
  Small Device C Compiler
  http://sdcc.sourceforge.net/
is being ported to the PIC. I'm sure they'd appreciate you giving it a spin
and sending them feedback on what went wrong.

--
David Cary

>Date:         Sat, 30 Mar 2002 23:19:34 -0800
>From: Soon Lee <.....psln@spam@spamSTARHUB.NET.SG>

...

>Is there any C complier for SX??
>Any recommendations?

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'[SX]: Simulator for SX52'
2002\04\07@113811 by Soon Lee

flavicon
face
Hi all is that any simalutor for SX 52

thanks

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'[SX]:How is this possible???'
2002\04\08@064811 by ISO-8859-1?Q?Ruben_J=F6nsson?=

flavicon
face
Hello

Env: SXKey Rev E, SXKey52 V1.20, SX Chip SX52BD/PQ AB0022AT, 10 MHz crystal oscillator.

I have a problem which is about to drive me crazy.

I set a breakpoint at address 0x8b5 in the following piece of code:

8B0- 01D                bank            EECTRL
8B1- 076                clr             EECTRL
8B2- 02D                mov             TMP3,w
8B3- 20B 03A            mov             EESXADR,TMP1
8B5- 20C                mov             w,TMP2          ;TMP2 is at location $0c
8B6- 03B                mov             EEBYTECOUNT,w
8B7- 20D                mov             w,TMP3
8B8- 70A                sb              f_EE_READ_BLOCK_0
8B9- A55                jmp             eeprom_write
8BA- A76                jmp             eeprom_read

Sometimes when the program stops at this breakpoint (when instruction mov w,TMP2 has been
executed) W is loaded with a different value from what is at location TMP2 (as indicated by the
SX key)! Since TMP2 is at location $0c the bank selection bits are ignored for this load and can't
be the source of my problem.

When W is loaded with the wrong value RTCC indicates that the ISR has just been executed.
The only source of interrupt is the RTCC rollover interrupt. The ISR is exited with mov w,#-130,
retiw so this should not be the source if my problem either.

I have tried to set the breakpoint at the instruction at 0x8b3 and stepped through the ISR when
the rollover interrupt has occurred right after this instruction but have found no problem.

What could cause this behavior?

Ruben==============================
Ruben Jönsson
AB Liros Electronic
Box 9124, 200 39 Malmö, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
rubenRemoveMEspampp.sbbs.se
==============================

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'[SX]: Availability of 100Mhz units'
2002\04\21@035533 by Tony N

picon face
Hello,
Are 100Mhz SX microcontrollers available anywhere? I see that they've been
discontinued, but am interested in buying a few. Out of curiosity, why were
they discontinued?


TG
[nerd in training]

_________________________________________________________________
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'[SX]: Jump table for 256 location for SX'
2002\05\01@044409 by Soon Lee
flavicon
face
Hi
Any one have any good idea in how to have a table that can jmp to 256
location?location range accross the pages.

thanks

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2002\05\02@102817 by Soon Lee

flavicon
face
----- Original Message -----
From: "Soon Lee" <spam_OUTpsln@spam@spamRemoveMESTARHUB.NET.SG>
To: <spamPICLISTspamspamMITVMA.MIT.EDU>
Sent: Wednesday, May 01, 2002 4:39 PM
Subject: [SX]: Jump table for 256 location for SX


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'[SX]: SXLIST EMBEDDED STARTER CONTEST: April Winne'
2002\05\15@133747 by jamesnewton

face picon face
Three entries for April and all three are winners!

No entries yet for May and we are half way through the month! It's not a
hard contest folks, just get some code ready to debug.

I'm noticing that most of the entries have been for complete designs
(hardware, full software, etc...) but you don't need to do that much; just
write some good code that does something not already covered on the
sxlist.com site. The code doesn't have to be perfect, just close. If you
win, you will have a dev system and debugger to work out the kinks. I do ask
that you stay in touch after winnings and email me updates as you find / fix
bugs or add new features.

If you are doing a hardware design, you might also be interested in the
PICList free PCB contest at
http://www.piclist.com/pcbcontest where you can submit a board design and
get it made free of charge by a very professional board house:
http://www.olimex.com These are top quality double sided boards with solder
mask, silk-screen and plated through holes. What an excellent way to make
your design into reality without spending any money! You only have to take
the time to learn the board layout software which is a marketable skill in
itself! Last month NO ONE ENTERED! And there are still no entries for this
month. Wow.

Back to the SX EMBEDDED STARTER CONTEST:

April Entries:
- http://www.sxlist.com/ubicom/lib/io/dev/stepper/3steppers-ja SX controlled
3 stepping motor controller: Jordan Anderson [esp at funkt.net] The end
usage is camera movement control(maybe ;). Each motor only requires a 2 pin
control. The setup also has a coarse/fine adjustment which changes the
behavior of the steppers. The standard setting is that each cycle when a
movement switch is depressed the motor will do 5 full step sequences, when
the cf button and movement are selected the motor(s) will complete only 1
step.  The controller has the ability to move all three motors
simultaneously (within a few micro seconds)in any combination of directions.
The step sequence will not be affected if both directions were to be
selected at the same time.

- http://www.sxlist.com/ubicom/contest/sxohm SX On-hold messaging switch:
Troy Duncan of Cable and Wireless Jamaica [tduncan2 at hotmail.com] The SX
On-hold Messaging switch device adds a level of flexibility to any company
that has a PBX and wants to add Message or music on hold features, they
would be able to play different music or messages depending on which
external telephone line a call is on;

- http://www.sxlist.com/ubicom/contest/wthsta SX Weather Station: Lyle
Aubrey [lyleaubrey at eudoramail.com] The Station is designed to include
Wind-speed and Direction,  A Temperature sensor, a Barometric-pressure
sensor, a Humidity sensor, and a Rain-guage sensor. It is intended to be
built as a portable module to link up to an Ethernet cable and place on the
porch (for example). This would give the User a quick reference to outside
weather conditions (via an indoor PC), and allow the User to upload (to a
File, Database, etc) continuous Weather Data throughout the
Day/Month/Year/etc. The User could then project Daily/Seasonal/Annual/etc
Graphs for his/her local Weather.


**** W I N N E R ****
All the entries this month are excellent and I've declared a 3 way tie. I'm
sending Ethernet Demo Boards
http://www.sxlist.com/ubicom/contest/ethernet to all three contestents and
one box also has an SV-TEHS SX-DEV DEBUGGER
http://www.sxlist.com/techref/scenix/debuggers.htm#SV The packages were
shuffled so luck of the draw will decide who gets it.

That is a complete $350 development system with In Circuit Debugging, an SX
52, a RealTec Embedded Ethernet Adapter, switches, lights, connectors, etc..
on a board with prototyping space. EVERYTHING needed for embedded
development with your PC.

in March the winner (and only entry) was
- http://www.sxlist.com/techref/ubicom/rov/index.htm John Coleman [jlsilicon
at yahoo.com] "ROV - Remote Operated Vehicle" entry with game boy camera and
motor controller circuits ready to add to the Ethernet Demo board. With the
embedded web server and will allow remote operation from any web browser!
Just add an 811.12 wireless Ethernet adapter and John will have a true
virtual presence from the internet.


Februarys Winner was:
- http://www.sxlist.com/ubicom/lib/io/dev/lamp/digilight.htm Timothy Stranex
[perspex at dream.za.net] Digilight computer lighting controller.

Januarys Winner was:
- http://www.sxlist.com/ubicom/bindicator/index.htm the Bindicator remote
display by Timothy L. Hosey

There are no entries yet for May! Just get me some code:

THE SXLIST EMBEDDED STARTER CONTEST

For the new year, my goal is to enable YOU to get involved in SX embedded
microcontroller development especially if:

* You have worked with other microcontrollers and are looking for something
- - a bit faster ( 50-75 MIPS Not just MHz, MIPS!),
- - lower power use in low speed modes,
- - where you can watch it run (on-chip ICD),
- - and crank out new solutions with the same hardware (virtual
peripherals).

* You have time but not necessarily money. Students, mature kids, hobbyists,
retired persons and devoted computer enthusiasts. SX processors are one of
the lowest cost systems to get started with where you actually get a
complete and professional development environment.

* You like to learn new things but don't necessarily know anything about
computers. There is no better way to learn than to just get started...

To make this happen, starting in January 2002:

- I will give away at least one development system a month to the most
deserving applicant (in my humble opinion) who has written an original SX
program and is ready to debug it.

- I will give away Ethernet SX Stack Evaluation Kits like the ones used in
the SX FAST EMBEDDED ETHERNET contest to anyone who presents me with source
code for an SX stack application that is ready to try on the internet.

- I will answer questions, provide resources and make suggestions as
needed...

What do you have to do?

Just check out the site at
http://www.sxlist.com and then send me comments, questions, your ideas or
the one thing I REALLY want: CODE... SX code that needs a chip to run on and
a debugger to help clean it up.

---
James Newton, Host of sxlist.com
1-619-652-0593 VM 1-208-279-8767 FAX
.....jamesnewtonspam.....sxlist.com
SX FAQ: http://www.sxlist.com

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'[SX]: IREAD instruction'
2002\05\27@070808 by ISO-8859-1?Q?Ruben_J=F6nsson?=

flavicon
face
Hello,

I have found a strange thing with the IREAD instruction in an
SX52 chip. When the IREAD is set up to read the word at address
$802 + the address of the IREAD instruction itself, it allways
returns $cff.

Could someone please test this and verify my results. Here is a
code snippet that demonstrates this:

       DEVICE  OSCXT2,BOR42,DRT18MS

       FREQ    10_000_000
       RESET   Startup

       org     $0a

       ROM_L           DS      1
       ROM_H           DS      1

       org     0
Startup
string_test
       mov             ROM_L,#(string & $ff)
       mov             ROM_H,#(string >> 8)
loop
       mov             w,ROM_H
       mov             m,w
       mov             w,ROM_L
       iread
       test            w
       snz
       jmp             $
       ; doesn't do anything usefull with w.
       inc             ROM_L
       snz
       inc             ROM_H
       jmp             loop

       org     $800

string
       dw              'ABCDEFGHIJKLMNOPQRSTUVWXYZ',0


This is assmebled, programmed and single stepped with the SX-
Key Rev E.

The IREAD fails when it is reading the 'J' from the string. The
IREAD instruction is at address $007 and the 'J' is at address
$809.

==============================
Ruben Jvnsson
AB Liros Electronic
Box 9124, 200 39 Malmv, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
RemoveMErubenRemoveMEspampp.sbbs.se
==============================

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2002\05\27@121001 by James Newton, webmaster

face picon face
source=
http://www.piclist.com/postbot.asp?id=piclist\2002\05\27\070808a

What is the date code on the SX52? Some older versions are not
supported with the SX-Key Rev E.
http://www.sxlist.com/techref/ubicom/sx48-52.htm

Is the failure reliable? If not, it may be a communications
failure between the SX-Key and the PC or excessive noise or bad
connection between the key and 52. I've seen a lot of "strange"
things with SX-Keys.

Try a test program that counts up a register from "A" and
compairs it with the data from the IREAD and turns on an LED if
they don't match, then run it off the SX-Key. If it works,
consider replaceing the SX-Key with rev F (latest) from Parallax
Inc or switch to the SX-DEV.
http://www.sxlist.com/techref/ubicom/debuggers.htm

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2002\05\28@041402 by ISO-8859-1?Q?Ruben_J=F6nsson?=

flavicon
face
Hello,


> What is the date code on the SX52? Some older versions are not
> supported with the SX-Key Rev E.
> http://www.sxlist.com/techref/ubicom/sx48-52.htm

The datecode is AB0022AT so it should be ok, i guess.

> Is the failure reliable? If not, it may be a communications
> failure between the SX-Key and the PC or excessive noise or bad
> connection between the key and 52. I've seen a lot of "strange"
> things with SX-Keys.

The failure is reliable but it doesn't seem to give exactly the same
results when single stepping, running with the debugger or running without
the debugger.

Here is a program that does fail, both single stepped with the debugger and
run without the debugger. When run with the debugger it reports 'Sleeping'
and doesn't lit either the red or green led, though:

       DEVICE  OSCXT2,BOR42,DRT18MS

       FREQ    10_000_000
       RESET   Startup

       r_LED_GREEN     equ     re
       b_LED_GREEN     equ     0
       f_LED_GREEN     equ     r_LED_GREEN.b_LED_GREEN
       m_LED_GREEN     equ     1<<b_LED_GREEN

       r_LED_RED       equ     re
       b_LED_RED       equ     1
       f_LED_RED       equ     r_LED_RED.b_LED_RED
       m_LED_RED       equ     1<<b_LED_RED

       E_INPUTS        equ     ~(m_LED_RED | m_LED_GREEN)
       E_DEFAULT       equ     m_LED_RED | m_LED_GREEN

       org     $0a

       ROM_L           DS      1
       ROM_H           DS      1
       REF             DS      1

       org     0
_iread_
       jmp             @_iread_doit

Startup
string_test
       mov             w,#$1f
       mov             m,w
       mov             !re,#E_INPUTS
       mov             re,#E_DEFAULT

       mov             ROM_L,#(string & $ff)
       mov             ROM_H,#(string >> 8)
       mov             REF,#'A'
loop
       mov             w,ROM_H
       mov             m,w
       mov             w,ROM_L
       call            _iread_
       test            w
       snz
       jmp             success
       xor             w,REF
       sz
       jmp             fail
       inc             REF
       inc             ROM_L
       snz
       inc             ROM_H
       jmp             loop
fail
       clrb            f_LED_RED
       skip
success
       clrb            f_LED_GREEN
       jmp             $

       org     $300
_iread_doit
       iread
       retp

       org     $b00
string
       dw              'ABCDEFGHIJKLMNOPQRSTUVWXYZ',0

I have had a lot of other problems when doing the software for my current
project; Doing a retp without setting the page bits, reading from a
register to w but w isn't correct after the read, rtcc rollover interrupt
not triggered and now this. Some of these errors I have discovered without
the debugger and could verify with the debugger, some only seems to exist
with the debugger or act differently with the debugger. Most of the errors
have disappeared when moving the code around to other banks or just within
the same bank.

Is there something I can do to reduce the amount of 'strange' things with
the SX-Key, except replacing it?

The original program I posted did succeed without the debugger but the
program I have here more resembles my real program that does fail without
(and with) the debugger.

These 'strange' things are beginning to take up too much time from real
programming work and changing IDE might work to some extent but not
entirely since some errors still appear without the IDE.

{Quote hidden}

==============================
Ruben Jvnsson
AB Liros Electronic
Box 9124, 200 39 Malmv, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
KILLspamrubenspam@spam@pp.sbbs.se
==============================

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'[SX]: VPP generation error'
2002\05\28@083130 by PSL

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face
Hi
Any one know what does  VPP generation error mean?
how to rectified it?

thanks

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'[SX]:IREAD instruction'
2002\05\28@091717 by parkiss

picon face
Ruben-

Your IDE is probably just fine.  Take a closer look at the cross-page
calling techniques.  Try the following change for starters:

...
loop
        mov             w,ROM_H
        mov             m,w
        mov             w,ROM_L
        call            @_iread_     ; was _iread_
        test            w
...

A simple call to _iread_ does not push any page info, so the retp is
going to give unsatisfactory results.

Also note the m register gets clobbered is setting up the IREAD, so
you may not be accessing the port registers in the manner you intend
subsequently.  Be sure to reset m (MODE instruction or whatever)
as needed after an iread.


Regards,

Steve

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2002\05\28@131018 by ISO-8859-1?Q?Ruben_J=F6nsson?=

flavicon
face
Se inline comments


> Ruben-
>
> Your IDE is probably just fine.  Take a closer look at the cross-page
> calling techniques.  Try the following change for starters:
>
> ...
>  loop
>          mov             w,ROM_H
>          mov             m,w
>          mov             w,ROM_L
>          call            @_iread_     ; was _iread_
>          test            w
> ...
>
You better look again...

This will not work. My iread instruction is located at address $300 which can't be called to  (bit 8 is 1), which is why I have the jmp @_iread_ above the startup code. This is a common technique to call into the second half of a page. The jmp is mostly located at the same page as the destination, though, but that is not necessary (as here).

> A simple call to _iread_ does not push any page info, so the retp is
> going to give unsatisfactory results.

No again.

All calls push all 12 address bits (PC0:8 + PA0,PA1 and PA2), always (there is only one call actually call @... is two instructions). retp always sets the pagebits to the returned page, ret doesn't. You can always use retp regardless of how the call was made.
>
> Also note the m register gets clobbered is setting up the IREAD, so
> you may not be accessing the port registers in the manner you intend
> subsequently.  Be sure to reset m (MODE instruction or whatever) as
> needed after an iread.

No again.

The M register is only used when you set the port up (configure it for input/output/schmitt trigger/cmos/ttl/pullup...) not when you access the port bits themselves (as I do after the iread instruction).

So, have anybody tried my code and watched the results?

>
>
> Regards,
>
> Steve
>
Regards,

Ruben
==============================
Ruben Jönsson
AB Liros Elektronik
Box 9124, 200 39 Malmö, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
@spam@rubenRemoveMEspampp.sbbs.se
==============================

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'[SX]: VPP generation error'
2002\05\29@100925 by Al Williams

flavicon
face
This always happens to me when I fry a chip. Try a new chip and the
problem will likely go away.

Al Williams
AWC
* Learn Programmable Logic
http://www.al-williams.com/acwe/pbx84.htm




> {Original Message removed}


'[SX]: VPP generation error'
2002\06\23@102031 by PSL
flavicon
face
The problem have been solve just add a cap between the power and gnd .
----- Original Message -----
From: "Al Williams" <alw@spam@spamEraseMEAL-WILLIAMS.COM>
To: <spam_OUTPICLISTspam_OUTspamRemoveMEMITVMA.MIT.EDU>
Sent: Wednesday, May 29, 2002 10:08 PM
Subject: Re: [SX]: VPP generation error


{Quote hidden}

> > {Original Message removed}


'[PICLIST] [SX] Interrupts for SX'
2002\07\06@040303 by PSL
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face
Any one experience with Interrupts in SX can offer some help

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2002\07\06@043945 by ISO-8859-1?Q?Ruben_J=F6nsson?=

flavicon
face
Help with what?

Ruben

> Any one experience with Interrupts in SX can offer some help
>
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> [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads
>
==============================
Ruben Jönsson
AB Liros Elektronik
Box 9124, 200 39 Malmö, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
RemoveMErubenspam.....pp.sbbs.se
==============================

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2002\07\06@064656 by PSL

flavicon
face
Hi
I have use two SX chip
one to continuous change the RB output every 1000 cycles
the other will Interrupts every time there is a high to low transition
so I should see result like 2,4,6,8,10,12,14.....

but the thing is the setup some time work some time don't.

do you have any code where I can refer to and compare to the one i have?

thanks
regards


{Original Message removed}

'[PICLIST] [SX] Interrupts heat up chips??'
2002\07\08@112241 by PSL

flavicon
face
Hi all

I am having some problem of the chip heating up when i use Interrupts, is
this normal?
when i am not using Interrupts the chip will not heat up. what can be the
possible problem can any one enlighten me? Cos when the chip heat up my it
causes a lot of false triggered Interrupts.

regards

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2002\07\08@130629 by jamesnewton

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\07\08\112241a

I doubt the problem is caused by the interrupts, but it is more likely that
it is an effect of something the interrupt routine is doing... or that the
code is not doing when the interrupt is running.

Hot chips are most often caused by
A) IO pins that are shorted or "fighting" against some external load. (see:
http://www.sxlist.com/techref/io/contention.htm )

B) Unused IO pins that are floating; not pulled up or tied to ground (see:
http://www.sxlist.com/techref/logic/xtrapins.htm )

The "effect of something the interrupt routine is doing" could be as simple
as changing the frequency or pattern of RF energy that the chip is
broadcasting into its own floating IO pins.

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2002\07\08@131041 by Andy Reynolds

flavicon
face
check your circuit
and then
check your circuit
again

> I am having some problem of the chip heating up when i use Interrupts, is
> this normal?

NO!
{Original Message removed}

'[SX]: Interrupts for SX'
2002\07\08@131048 by jamesnewton

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\07\06\064656a

It would be better if you would comment and post the code you have written
and let us take a look at it.


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2002\07\09@105407 by PSL

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face
part 1 1905 bytes content-type:text/plain; (decoded 7bit)


----- Original Message -----
From: "PSL" <.....pslnspamTakeThisOuTstarhub.net.sg>
To: <EraseMEjamesnewtonspamKILLspampiclist.com>
Sent: Tuesday, July 09, 2002 8:37 PM
Subject: Re: [SX]: Interrupts for SX


> Hi James
>
> Hope you can help me on this i really been struck for a few day on this
>
>
>
> I am using the ISR to capture data on a 4 bit bus line(P0-P3) the timing
> diagram. i think more of less the program is correct as i do get the
correct
> results once in the while.
> the attach File.txt is the SX with the ISR the data line is connect to
this
> other SX
>
> Can you please enlighten me if i have make any mistake in setting up the
> Interrupts ? it seem that normally for the first few trigger every thing
is
{Quote hidden}

written
{Quote hidden}


part 2 13086 bytes content-type:text/plain;
(decoded quoted-printable)



       
               DEVICE  SX28L,OSCHS3,TURBO
               RESET   RESET_ENTRY
               FREQ    50_000_000



;__________________________________________________________;

;       MACRO
;__________________________________________________________;

_BANK   MACRO   1
       BANK    \1
       IF \1 & %10000000               ;SX48BD AND SX52BD (PRODUCTION RELEASE) BANK INSTRUCTION                 SETB    FSR.7           ;MODIFIES FSR BITS 4,5 AND 6. FSR.7 NEEDS TO BE SET BY SOFTWARE.
       ELSE
               CLRB    FSR.7
       ENDIF
       ENDM
;__________________________________________________________;

_MODE   MACRO   1
               MOV     W,#\1           ;LOADS THE M REGISTER CORRECTLY FOR THE SX48BD AND SX52BD
               MOV     M,W
       ENDM
;__________________________________________________________;

DELAY4X         MACRO
               MOV     TEMP,W                  ;1 INITIALIZE COUNT1, COUNT2        
:DELAY4XLOOP    DJNZ    TEMP,:DELAY4XLOOP       ;4/2 DECREMENT UNTIL ALL ARE ZERO              
               ENDM        
;__________________________________________________________;

;__________________________________________________________;
;
;       INITIAL PORT VALUE
;__________________________________________________________;

RA_INIT         EQU     %11111111               ;SX18/20/28/48/52 RA_IO           EQU     %11111110               ;SX18/20/28/48/52
RB_INIT         EQU     %00001111               ;SX18/20/28/48/52 RB_IO           EQU     %00000000               ;SX18/20/28/48/52
RC_INIT         EQU     %00000000               ;SX18/20/28/48/52 RC_IO           EQU     %00000000               ;SX18/20/28/48/52

;__________________________________________________________;
;
;       PIN/PORT ASSIGNMENT
;__________________________________________________________;

RS232TX         EQU     RA.0
RXPIN           EQU     RA.1
;__________________________________________________________;
;
; GLOBAL REGISTER DEFINITIONS
;__________________________________________________________;
               ORG     $08                     ;GLOBAL DATA MEMORY STARTS AT $0A ON SX48/52

TEMP1X          DS      1
TEMP2X          DS      1
TEMP3X          DS      1
TFSR            DS      1
TSWAP           DS      1
;__________________________________________________________;        
;
; BANK 0        
;__________________________________________________________;
               ORG     $10     ;BANK 0 ADDRESS ON SX52
BANK0           =     $

;__________________________________________________________;        
;
; BANK 1        
;__________________________________________________________;
               ORG     $30     ;BANK 1 ADDRESS ON SX52
BANK1           =     $

;__________________________________________________________;        
;
; BANK 2        
;__________________________________________________________;
               ORG     $50     ;BANK 2 ADDRESS ON SX52
BANK2           =     $

;__________________________________________________________;        
;
; BANK 3        
;__________________________________________________________;
               ORG     $70     ;BANK 3 ADDRESS ON SX52
BANK3           =     $

;__________________________________________________________;        
;
; BANK 4        
;__________________________________________________________;
               ORG     $90     ;BANK 4 ADDRESS ON SX52
BANK4           =     $

;__________________________________________________________;        
;
; BANK 5        
;__________________________________________________________;
               ORG     $B0     ;BANK 5 ADDRESS ON SX52
BANK5           =     $

;__________________________________________________________;        
;
; BANK 6        
;__________________________________________________________;
               ORG     $D0     ;BANK 6 ADDRESS ON SX52
BANK6           =     $

;__________________________________________________________;        
;
; BANK 7        
;__________________________________________________________;
               ORG     $F0     ;BANK 7 ADDRESS ON SX52
BANK7           =     $

RS232DATA       DS      1       ;LOCATION TO KEEP TXDATA        
COMCOUNTER      DS      1       ;KEEP TRACK OF BIT COUNT
WCOUNTER        DS      1       ;KEEP TRACK DELAY COUNT
RXDAT           DS      1       ;LOCATION TO KEEP RXDATA
CRC_LO          DS      1       ;KEEP TRACK OF CRC HIGH VALUE
CRC_HI          DS      1       ;KEEP TRACK OF CRC HIGH VALUE
TEMP            DS      1       ;TEMP LOCATION
CBLOCK          DS      1       ;BLOCK COUNT
TEMPf           DS      1       ;BLOCK COUNT
;TFSR15         DS      1       ;TEMP FSR

WKPND_B         EQU     $19
WKED_B          EQU     $1A
WKEN_B          EQU     $1B
;__________________________________________________________;
;
; Interrupt Service Routine
;__________________________________________________________;
;
; Note: The interrupt code must always originate at address $0.
;
; Interrupt Frequency = (Cycle Frequency / -(retiw value))  For example:
; With a retiw value of -217 and an oscillator frequency of 50MHz, this
; code runs every 4.34us.
;
INT_PERIOD      EQU     108     ; INTERRUPT TO OPERATE AT 20NS X 108 = 2.16US
;__________________________________________________________;

       ORG     $000
INTERRUPT                                       ;3

       MODE    WKPND_B                         ;1
       MOV     W,#$00                          ;1
       MOV     !RB,W                           ;1
       MODE    $1F                             ;1
       MOV     W,RB                            ;1

       AND     W,#$0F                          ;1
       MOV     TEMP1X,W                        ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       NOP                                     ;1
       MOV     W,RB                            ;1

       AND     W,#$0F                          ;1
       MOV     TEMP2X,W
       SWAP    TEMP2X
       MOV     W,TEMP2X
       ADD     TEMP1X,W
       MOV     W,TEMP1X
       CALL    @TXDATA

       _MODE   WKPND_B
       MOV     W,#$00
       MOV     !RB,W
       
       



;ISR_END                
;       MOV     W,#-INT_PERIOD          ;REFRESH RTCC ON RETURN
       RETIW                           ;RETURN FROM THE INTERRUPT
                                               ; = 1/(INT_PERIOD*RTCC PRESCALER*1/50MHZ)
                                               ; = 1/(217*1*20NS) = 4.34US
               NOP
               NOP
               NOP
               NOP
;__________________________________________________________;
       

RESET_ENTRY
               MODE    $1F                     ; POINT MODE TO WRITE DDIR
                                               ;*(5-BIT VALUE USED TO ENSURE CORRECT VALUE
                                               ; FOR SX48/52, ONLY 4-BITS OF THIS VALUE ARE
                                               ; USED ON SX18/20/28)
               MOV     W,#RA_INIT              ; INITIALIZE DATA LATCHES FOR
               MOV     RA,W                    ; PORT A.
               MOV     W,#RA_IO                ; INITIALIZE DATA DIRECTION REGISTER FOR                
               MOV     !RA,W                   ; PORT A.
               MOV     W,#RB_INIT              ; INITIALIZE DATA LATCHES FOR
               MOV     RB,W                    ; PORT B.
               MOV     W,#RB_IO                ; INITIALIZE DATA DIRECTION REGISTER FOR
               MOV     !RB,W                   ; PORT B.        
               MOV     W,#RC_INIT              ; INITIALIZE DATA LATCHES FOR
               MOV     RC,W                    ; PORT C.
               MOV     W,#RC_IO                ; INITIALIZE DATA DIRECTION REGISTER FOR
               MOV     !RC,W                   ; PORT C.

               MOV     W,#'S'
               CALL    @TXDATA
               MOV     W,#'T'
               CALL    @TXDATA
               MOV     W,#'A'
               CALL    @TXDATA
               MOV     W,#'R'
               CALL    @TXDATA
               MOV     W,#'T'
               CALL    @TXDATA                
               _MODE   WKED_B
               MOV     W,#$0F
               MOV     !RB,W

               _MODE   WKPND_B
               MOV     W,#$00
               MOV     !RB,W

               _MODE   WKEN_B
               MOV     W,#$F0
               MOV     !RB,W

               _MODE   $1F
               
ENDLESS
               JMP     ENDLESS
               JMP     $


                       







TXDATA
               _BANK   BANK7
               MOV     RS232DATA,W
               MOV     COMCOUNTER,#$08
                ;START BIT            
               CLRB    RS232TX                         ;   1          
               MOV     WCOUNTER,#250                   ;   COMW1           DJNZ    WCOUNTER,COMW1                  ;1000
               MOV     WCOUNTER,#250                   ;   COMW1A          DJNZ    WCOUNTER,COMW1A                 ;1000
               MOV     WCOUNTER,#150                   ;
COMW1B          DJNZ    WCOUNTER,COMW1B                 ; 600
               NOP                                     ;   1
               NOP                                     ;   1
               NOP                                     ;   1

                ;BIT 0 TO 7
COMLOOP         SB      RS232DATA.0                     ;   -
               CLRB    RS232TX                         ;   -
               SNB     RS232DATA.0                     ;   -
               SETB    RS232TX                         ;   4

               MOV     WCOUNTER,#250                   ;   COMW2           DJNZ    WCOUNTER,COMW2                  ;1000
               MOV     WCOUNTER,#250                   ;   COMW2A          DJNZ    WCOUNTER,COMW2A                 ;1000
               MOV     WCOUNTER,#149                   ;    COMW2B          DJNZ    WCOUNTER,COMW2B                 ; 596

               RR      RS232DATA                       ;   1
               DJNZ    COMCOUNTER,COMLOOP              ;  4/2

                ;STOP BIT
               SETB    RS232TX                         ;   1          
               MOV     WCOUNTER,#250                   ;   COMW3           DJNZ    WCOUNTER,COMW3                  ;1000
               MOV     WCOUNTER,#250                   ;   COMW3A          DJNZ    WCOUNTER,COMW3A                 ;1000
               MOV     WCOUNTER,#175                   ;   COMW3B          DJNZ    WCOUNTER,COMW3B                 ; 700
               RETP                                    ;   3


;__________________________________________________________;        
;
RXDATA          
;__________________________________________________________;

               _BANK   BANK7                           ;1 GOTO BANK0
               CLR     RXDAT                           ;1
               MOV     COMCOUNTER,#8                   ;2
POLL            SNB     RXPIN                           ;1 CHECK RA0 FOR START BIT
               JMP     POLL                            ;1/3 LINE STILL LOW        
               MOV     WCOUNTER,#250                   ;   RXCOMW3         DJNZ    WCOUNTER,RXCOMW3                        ;1000
               MOV     WCOUNTER,#87                    ;   RXCOMW3A        DJNZ    WCOUNTER,RXCOMW3A               ;
               SNB     RXPIN                           ;1
               JMP     POLL                            ;3 FALSE START BIT
GET_NEXT_BIT
RXCOMW3XX       DJNZ    WCOUNTER,RXCOMW3XX              ;1000
               MOV     WCOUNTER,#250                   ;   RXCOMW3AXX      DJNZ    WCOUNTER,RXCOMW3AXX             ;1000
               MOV     WCOUNTER,#175                   ;   RXCOMW3BXX      DJNZ    WCOUNTER,RXCOMW3BXX             ; 700
               SNB     RXPIN                           ;1
               SETB    C                               ;1
               SB      RXPIN                           ;1
               CLRB    C                               ;1        
               RR      RXDAT                           ;1
               DECSZ   COMCOUNTER                      ;1/2
               JMP     GET_NEXT_BIT                    ;1

;RXCOMW3X       DJNZ    WCOUNTER,RXCOMW3X               ;1000
;               MOV     WCOUNTER,#250                   ;   ;RXCOMW3AX      DJNZ    WCOUNTER,RXCOMW3AX              ;1000
;               MOV     WCOUNTER,#175                   ;   ;RXCOMW3BX      DJNZ    WCOUNTER,RXCOMW3BX              ; 700
               MOV     W,RXDAT        
               RETP                                    ;2



       END



part 3 20496 bytes content-type:image/jpeg; (decode)


part 4 136 bytes
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'[SX]: SX Interrupts'
2002\07\14@125513 by PSL

flavicon
face
Hi Can any one help me on SX Interrupts

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'[SX]: Interrupts for SX'
2002\07\20@142551 by PSL

flavicon
face
Hi James
Thanks for you advices

Now the chip is not hot but
It seem that the result is still the same there is still a lot of false
trigger, have you experience this before?
i have tried with dip switch and it seems ok but when when link up with
another SX such problem occur?


----- Original Message -----
From: "James Newton. Admin 3" <spam_OUTjamesnewtonTakeThisOuTspamKILLspampiclist.com>
To: "PSL" <RemoveMEpsln@spam@spamspamstarhub.net.sg>
Sent: Thursday, July 18, 2002 6:39 AM
Subject: RE: [SX]: Interrupts for SX


> I've reviewed the code several times and I honestly don't see any problems
> other than the pins that are being set as inputs. IF the pins set for
input
> are not connected to anything, they could easily be oscillating rapidly
when
> the interrupt routine sends data via the TX routine.
>
> Try this: Change each unconnected pin from an input to an output. Check
the
> wiring of the connected pins for shorts (if they are outputs) or opens (if
> they are inputs) with the chip removed.
>
> Also, the hardware you are using to transmit data from the SX to the PC
via
{Quote hidden}

> {Original Message removed}

2002\07\21@074856 by PSL

flavicon
face
Hi
Final got it to work but I do not know whether the way I have use is the
correct way

What I did is that I disable the Interrupt when I am in the ISR and enable
it before exiting the ISR.
After doing this every thing is ok and there is no false trigger
but is this the correct way?

Regards


----- Original Message -----
From: "PSL" <pslnTakeThisOuTspam@spam@STARHUB.NET.SG>
To: <PICLISTTakeThisOuTspamspamBeGoneMITVMA.MIT.EDU>
Sent: Sunday, July 21, 2002 12:42 AM
Subject: Re: [SX]: Interrupts for SX


{Quote hidden}

problems
> > other than the pins that are being set as inputs. IF the pins set for
> input
> > are not connected to anything, they could easily be oscillating rapidly
> when
> > the interrupt routine sends data via the TX routine.
> >
> > Try this: Change each unconnected pin from an input to an output. Check
> the
> > wiring of the connected pins for shorts (if they are outputs) or opens
(if
{Quote hidden}

> > {Original Message removed}

'[SX]: New Beta SX-Key software from Parallax!'
2002\07\29@184405 by jamesnewton

face picon face
I've just finished porting my conditional macros to SASM for use with this
new IDE.
http://www.sxlist.com/techref/ubicom/sasmcond.src is the include and
http://www.sxlist.com/techref/ubicom/sasmtemp.src is a template with some
test code and it includes the sasmcond file.

These generate very tight asm code based on standard conditional structures
like:


       DoSelect
       DoCase 23,eq,24
         clr 25
       DoCase 26,eq,27
         clr 28
         DoSelect
         DoCase 29,eq,30
          clr 31
          DoIf 32,EqN,32
           clr 33
          DoElseIf 34,Lt,35
           clr 36
          DoElse
           clr 37
           DoEndIf
         DoCase 27,eq,25
          clr 25
         DoCaseElse
          clr 25
          DoCaseEnd
       DoCaseElse
        clr 25
        DoCaseEnd

       binjump intI,:zero, :notzero, :done, :outsideloop, :insideloop

       GotoW :zero, :notzero, :done, :outsideloop, :insideloop

Which generates:

 6530                  ;And now, lets KICK IT UP A BIT!!!
 6531
 6532                          DoSelect
 6552                          DoCase 23,eq,24
 6619  026A  0018   m   bank ??000E1  ;non-global
 6631  026B  0218   m   mov w, ??000E1
 6641  026C  0018   m   bank ??000DF  ;non-global
 6653  026D  0197   m   xor w, ??000DF
 6658  026E  0743   m   sz
 6707               m   ;mp +FAIL
 6711  0271  0079                clr 25
 6712                          DoCase 26,eq,27
 6724  =00000272    m  ??000E2 = $
 6725               m   ;mp +SUCCEED
 6740  =026F0274    m  :FAIL   =??000E3
 6793  0274  0018   m   bank ??000EB  ;non-global
 6805  0275  021B   m   mov w, ??000EB
 6815  0276  0018   m   bank ??000E9  ;non-global
 6827  0277  019A   m   xor w, ??000E9
 6832  0278  0743   m   sz
 6881               m   ;mp +FAIL
 6885  027B  007C                clr 28
 6886                            DoSelect
 6906                            DoCase 29,eq,30
 6973  027C  0018   m   bank ??000F2  ;non-global
 6985  027D  021E   m   mov w, ??000F2
 6995  027E  0018   m   bank ??000F0  ;non-global
 7007  027F  019D   m   xor w, ??000F0
 7012  0280  0743   m   sz
 7061               m   ;mp +FAIL
 7065  0283  007F                 clr 31
 7066                             DoIf 32,EqN,32
 7095  0284  0C20   m   mov w, #??000F7
 7139  0285  0019   m   bank ??000F5  ;non-global
 7151  0286  0180   m   xor w, ??000F5
 7156  0287  0743   m   sz
 7211  =00000288    m  :ComeFrom=$
 7212               m   ;mp +FAIL
 7216  028A  0061                  clr 33
 7217                             DoElseIf 34,Lt,35
 7225  =0000028B    m  :ComeFrom=$
 7226               m   ;mp +SUCCEED
 7241  =0288028D    m  :FAIL   =??000F9
 7293  028D  0019   m   bank ??000102  ;non-global
 7305  028E  0203   m   mov w, ??000102
 7315  028F  0019   m   bank ??000100  ;non-global
 7353  0290  0082   m   mov w, ??000100 - w
 7357  0291  0603   m   snc
 7381  =00000292    m  :ComeFrom=$
 7382               m   ;mp +FAIL
 7386  0294  0064                  clr 36
 7387                             DoElse
 7403  =00000295    m  :ComeFrom=$
 7404               m   ;mp +SUCCEED
 7419  =02920297    m  :FAIL   =??000104
 7423  0297  0065                  clr 37
 7424                              DoEndIf
 7444  =02950298    m  :FAIL   =??00010E
 7456                            DoCase 27,eq,25
 7468  =00000298    m  ??000112 = $
 7469               m   ;mp +SUCCEED
 7484  =0281029A    m  :FAIL   =??000113
 7537  029A  0018   m   bank ??00011B  ;non-global
 7549  029B  0219   m   mov w, ??00011B
 7559  029C  0018   m   bank ??000119  ;non-global
 7571  029D  019B   m   xor w, ??000119
 7576  029E  0743   m   sz
 7625               m   ;mp +FAIL
 7629  02A1  0079                 clr 25
 7630                            DoCaseElse
 7640  =000002A2    m  ??00011C = $
 7641               m   ;mp +SUCCEED
 7657  =029F02A4    m  :FAIL   =??00011D
 7660  02A4  0079                 clr 25
 7661                             DoCaseEnd
 7676  =02A202A5    m  :SUCCEED=??000122
 7699  =029802A5    m  :SUCCEED=??000122
 7741                          DoCaseElse
 7751  =000002A5    m  ??00012B = $
 7752               m   ;mp +SUCCEED
 7768  =027902A7    m  :FAIL   =??00012C
 7771  02A7  0079               clr 25
 7772                           DoCaseEnd
 7787  =02A502A8    m  :SUCCEED=??000131
 7810  =027202A8    m  :SUCCEED=??000131
 7852
 7853                          binjump intI,:zero, :notzero, :done,
:outsideloop, :insideloop
 7861  02A8  0011   m   page $
 7867  02A9  0652   m   jb intI.2, @MAIN:insideloop    ;=4
       02AA  0010 0B45
 7873  02AC  0632   m   jb intI.1, ??00013E
       02AD  0AB3
 7894  02AE  0712   m   jnb intI.0,@MAIN:zero
       02AF  0010 0B24
 7911  02B1  0010   m   jmp @MAIN:notzero
       02B2  0B34
 7922  =000002B3    m  ??00013E
 7937  02B3  0712   m   jnb intI.0,@MAIN:done
       02B4  0010 0B43
 7954  02B6  0010   m   jmp @MAIN:outsideloop
       02B7  0B44
 8010
 8011                          GotoW :zero, :notzero, :done, :outsideloop,
:insideloop
 8062  02B8  0403   m   clc
 8066  02B9  0361   m   rl WReg ;need long jumps
 8067               m   ;WARNING: Insure OPTION:RWT = 0
 8100  =000002BA    m   ??000141 = $
 8101  02BA  01E2   m   add PC,W ;jump to the jump
 8110  02BB  0B24   m   jmp MAIN:zero
 8120  02BC  0B34   m   jmp MAIN:notzero
 8130  02BD  0B43   m   jmp MAIN:done
 8140  02BE  0B44   m   jmp MAIN:outsideloop
 8150  02BF  0B45   m   jmp MAIN:insideloop

Note that there is a bug in SASM that makes it impossible to define a
variable in a macro without causeing any local labels after the macro is
used to be unreachable. Peter has provided me with a fix for that bug (as
well as others) which is not generally available and which makes the use of
these macros a lot more attractive.

Here is a list of the macros and what they do:

; BinJump <reg>, <Address> [, <Address>]
;  Call with the first parameter of the register to tbe tested and
;  the following parameters a list of addresses to jump to based on
;  the value of the register.
;  More effecient than a long jump table for 4 or fewer addresses

; GotoW <Address> [, <Address>]
;  Implements a jump table using space in the first low half page of memory.
;  must be invoked after all <Address>'s are defined.
;  Uses BinJump for less than 5 addresses

; Condition enum
(IsZero,Eq,Lt,LE,IsNotZero,NE,Gt,GE,EqN,LtN,LEN,NEN,GtN,GEN)
;  enum values ending in N indicate that the second operand will be a
constant

; Condition := [<reg>, <enum> | <reg>, <enum>, <reg> | <reg>, <enum>,
<constant> ]

; Skz <reg>, [IsZero | IsNotZero]
;  Generates a skip if the reg is zero or not zero

; Skc <reg1>, [Eq | Lt | LE | NE | Gt | GE], <reg2>
;  Generates a skip if reg1 compaires as specified to reg2

; Skc <reg>, [EqN | LtN | LEN | NEN | GtN | GEN], <constant>
;  Generates a skip if reg compaires as specified to constant

; StackPUSH, StackPOP, StackTOS and stack1...
;  Provide a compile time stack to record and retrieve the addresses of
;  locations were jumps need to be compiled once the jump-to address is
;  known. Used by the following macros:

; Repeat
;       <statements>
;       [forever | while <condition> | until <condition>]
;
;  compiles Skz or Skc with jumps to implement a structured loop

; DoIf <condition>
;       <statements>
; [
; DoElseIf <condition>
;       <statements>
;       ]...
; [
; DoElse
;       <statements>
;       ]
;       DoEndIf
;
;  Compiles Skz or Skc with jumps to implement a structured conditional
;  As many DoElseIf statements as desired may be included because each
DoElseIf
;   links to the next one at run time so that if the first DoElseIf
condition
;   is true, after its statements a jump will be compiled that will jump to
;   the simular jump after the next DoElseIf statements. To avoid this extra
;   run time, use DoSelect.

; DoSelect
; [
; DoCase <condition>
;       <statements>
;       ]...
; [
; DoCaseElse
;       <statements>
;       ]
; DoEndSelect
;
;  Compiles Skz or Skc with jumps to implement a structured conditional
;  A limited number of DoCase statments can be compiled because each
;   case compiles a jump to the end of the select after the statements
;   following the case condition and recording the position were these
;   jumps must be org'd takes up space on the "stack" provided by
;   StackPUSH, StackPOP and stack1...15

Next, I'll port the memory management macros so I don't have to screw with
what page I'm in...

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{Original Message removed}

'[SX]: SASM vs Parallax macros'
2002\07\30@062112 by ISO-8859-1?Q?Ruben_J=F6nsson?=

flavicon
face
Hello,

I am trying to convert a project done with the Parallax assembler to work with the SASM assembler (due to the new IDE).

Even though the SASM documentation says that macros for the Parallax assembler should work without change in the SASM assembler, I am having problem with the following macros for the Parallax assembler.

CHAR_3  MACRO   3
dw     (((\3 & $f0) << 4) + \1),(((\3 & $f) << 8) + \2)
ENDM

TXT     MACRO
NOEXPAND
IF (\0/3)>0
REPT \0/3
CHAR_3 \(((%-1)*3)+1),\(((%-1)*3)+2),\(((%-1)*3)+3)
ENDR
ENDIF
EXITM
IF (\0-((\0/3)*3)=2)
dw     \(\0-1),\(\0)
ENDIF
IF (\0-((\0/3)*3)=1)
dw     \(\0)
ENDIF
EXPAND
ENDM

The CHAR_3 macro stores 3 bytes in two words of program memory and the TXT MACRO uses the CHAR_3 macro to pack text, 3 characters per 2 words of program memory.

The problem seems to be the following line in the TXT macro:

CHAR_3 \(((%-1)*3)+1),\(((%-1)*3)+2),\(((%-1)*3)+3)

The SASM can't resolve the arguments to the CHAR_3 macro. I am sure it is possible in some way but I can't find out how.

Any takers?
==============================
Ruben Jönsson
AB Liros Elektronik
Box 9124, 200 39 Malmö, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
STOPspamrubenEraseMEspampp.sbbs.se
==============================

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'[SX]:SASM and include'
2002\08\05@044616 by ISO-8859-1?Q?Ruben_J=F6nsson?=
flavicon
face
Hello,

I have been using the Parallax IDE and assembler until now but as the new
IDE can use the SASM assembler, which amongst other things has the ability
to use the INCLUDE directive, I am trying to convert some projects to use
this assembler instead.

However, I have some problems.

If I define some variables in an include file (with equ or =) I have not
been able to use this variable in an expression in an IF directive (IF
<variable> != 0) in the main program. Is this correct? Shouldn't this be
possible? The variable can be used as a value to an instruction though (mov
w,#<variable>).

Also, the assembler doesn't generate an error if I try to include a file
that doesn't exist.

Ruben


==============================
Ruben Jvnsson
AB Liros Electronic
Box 9124, 200 39 Malmv, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
ruben@spam@spampp.sbbs.se
==============================

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'[SX]: Getting started with SV-TEHS SX-DEV'
2002\09\24@155525 by Philip Pemberton
face picon face
Hi,
   After winning an SV-TEHS SX-DEV module in the SXlist.com design contest,
I've finally plucked up the courage to connect it up to an SX. Problem is, I
can't get the SX28 LED flasher sample to work on the SX - it just sits
there, dumb. If I try to step through it in debug mode, the Program Counter
jumps all over the place.
   Can someone please send me a simple LED flashing program for the SX28AC
that will work under the SX-DEV IDE?

Thanks.
--
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2002\09\25@011548 by James Newton, webhost

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\09\24\155525a


Sounds like a communication or power supply problem. Just about any 16C57
code or any of the code on the CD that came with the SX-DEV should at least
step correctly.

Contact Alexey Vladamirov [avlad at mailbox,riga,lv] at SV-TEHS for
technical support. I have always seen excellent responses and quick
solutions from this company.

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2002\09\25@022051 by Philip Pemberton

face picon face
James Newton, webhost wrote:
> Sounds like a communication or power supply problem. Just about any
> 16C57 code or any of the code on the CD that came with the SX-DEV
> should at least step correctly.
> Contact Alexey Vladamirov [avlad at mailbox,riga,lv] at SV-TEHS for
> technical support. I have always seen excellent responses and quick
> solutions from this company.
Turns out it was my stupid mistake. The SX wasn't running because I forgot
the 1k resistor on the /MCLR line. As for the code, I mis-understood the
following line in the manual:
"To allow debug, user program *should not be located* on the following
addresses:
SX28    1FE...1FF, 78E...7FF"
In other words, I moved the RESET vector and ended up fouling up the code.
Now I'm going to have a go with some Virtual Peripherals. Some of the FSK
stuff looks interesting :-)

Later.
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'[SX]: What happened to all the info on scenix.com?'
2002\09\25@120241 by Philip Pemberton

face picon face
Hi,
   Does anyone know what happened to all the information that Scenix (now
Ubicom) put on their website (http://www.scenix.com)? I'm specifically interested
in Virtual Peripherals and application notes.

Thanks.
--
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2002\09\25@165211 by James Newton, webhost

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\09\25\120241a

They moved to sxlist.com

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'[AD]: [SX]: scenix SX28AC/DP and SX20AC/SS for sal'
2002\09\27@163608 by Mark W.

flavicon
face
At eBay - posted some Scenix / Ubicom chips for sale
at decent prices. Goto eBay and search either Scenix or
Ubicom - you will find the inventory available.

Also have some SX18AC/DP devices in limited qtys, not on
eBay. You are welcome to contact me directly.

Mark
mw3engspam_OUTspamTakeThisOuTgte.net

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'[SX]: SX programmer'
2002\09\30@193727 by Jinx

face picon face
As a faster alternative to PIC/AVR when needs demand, I'd like
to use the SX. I've found two sources in NZ and now have to get
a programmer. Currently I use the PicStart+ / MPLAB and AVR
Studio and a home-made AVR programmer. Any recommendations
for similar tools for SX would be appreciated. Not too pricey, but
nothing that needs too much fiddling about with either. Middle-range
semi-professional I guess you'd say

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2002\09\30@195039 by Russell McMahon

face
flavicon
face
The cheaper of the 2 Parallax offerings (Blitz I think) is a pure programmer
which works fine. Too dear for what it does but available locally to you. So
small it tends to get lost. Don't apply the power backwards or plug it into
the ISP socket backwards (which is easily enough done). No debug but who
needs debug :-)

A provocative thought. Zilog sell genuine ICE's with a trace buffer at a
fraction of what anyone else sells their entry level ICE product for. Wonder
what it would take to re-engineer this for PIC/SX :-)(Somewhat akin to
someone's comparison of burning toilet rolls from public toilets to keep
warm :-) ).(TANSTAAFL)



           RM



> As a faster alternative to PIC/AVR when needs demand, I'd like
> to use the SX. I've found two sources in NZ and now have to get
> a programmer. Currently I use the PicStart+ / MPLAB and AVR
> Studio and a home-made AVR programmer. Any recommendations
> for similar tools for SX would be appreciated. Not too pricey, but
> nothing that needs too much fiddling about with either. Middle-range
> semi-professional I guess you'd say

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'[SX]: SX programmer'
2002\10\01@025556 by Also-Antal Csaba
flavicon
face
Jinx wrote:
>
> As a faster alternative to PIC/AVR when needs demand, I'd like
> to use the SX. I've found two sources in NZ and now have to get
> a programmer. Currently I use the PicStart+ / MPLAB and AVR
> Studio and a home-made AVR programmer. Any recommendations

Try the fluffy, I use this some year ago whith good result.

udv
Csaba

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2002\10\18@200130 by Jinx

face picon face
> Try the fluffy, I use this some year ago whith good result.
>
> udv
> Csaba

Hmmm, I've tried it today whith not so good result ;-)

I made a Fluffy2 (what a name !!) programmer and got the IC-PROG
Win9x interface to go with it. However, it won't write and gives a failure
notice for location 0000h. I'm sure I'm doing something wrong. I've
checked the circuit "a few" times without finding any obvious errors.
The ZTX300500 aren't available so ZTX451/551 have been
substituted, and also the cap orientation on pin6 of the MAX232 has
been corrected, but apart from that it's as published. The DC input
is 16V, which gives 5.00V and 13.45V on the board in all the right
places

So next comes the s/w. The F84 seems to be running OK, it oscillates
and I've tried 3 with the same result. In the menu of supported devices
the SX18 isn't shown, but as the programming socket for the SX18 and
SX28 are paralleled I presume that the algorithm for the SX28 works for
the SX18 ?

And then there are the settings in IC-PROG. The I/O delay is set to 4 for
my 800MHz PC. I've tried other settings. Do any of the signal inversions
need to be set ?

Any suggestions ?

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2002\10\18@205641 by stanton54

picon face
Jinx,
I don't think there's anything wrong with the capacitor.
The ground should be on the positive side, and it should
face the same way as the rest.
IC-PROG is way too slow. The DOS program supports the
high speed interface (use -115k). I had to mess with the
source a little to get it to work in Windows.
I've used the Fluffy2 with both the SX28 and SX52 with
excellent results. If you want to use the 48 or 52 you
will have to change the programming software a little
since they have twice as much code space. The only
problem is that I use 2 9V batteries to power it and
it gobbles them up like crazy.

BTW, this is my first post to the list, please let
me know if Netscape doesn't format this properly

Jinx wrote:
{Quote hidden}

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2002\10\18@222315 by Jinx

face picon face
>  I don't think there's anything wrong with the capacitor.
> The ground should be on the positive side, and it should
> face the same way as the rest

Yes, you're right. I hand-drew my PCB and added a few more
convenient 0V points, which meant the pin 6 cap on MY overlay
is reversed to that of fluf2pcb, but it always has been soldered in
correctly. Sorry 'bout that, my bad

>  IC-PROG is way too slow. The DOS program supports the
> high speed interface (use -115k). I had to mess with the
> source a little to get it to work in Windows

The feedback I get back now is "Out Of Retry!", which goes
on forever until you End Task, so it's.attempting to do something.
I've seen comments at other sites about IC-PROG being slow. I'll
give DOS a go

>  I've used the Fluffy2 with both the SX28 and SX52 with
> excellent results. If you want to use the 48 or 52 you
> will have to change the programming software a little
> since they have twice as much code space. The only
> problem is that I use 2 9V batteries to power it and
> it gobbles them up like crazy.

Cheers, I'll get the SX18/28 sorted out first though !

> BTW, this is my first post to the list, please let
> me know if Netscape doesn't format this properly

Looks OK to me

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2002\10\19@020900 by Also-Antal Csaba

flavicon
face
> Hmmm, I've tried it today whith not so good result ;-)
>
> I made a Fluffy2 (what a name !!) programmer and got the IC-PROG

That is not suport the sx type micros, just the dos sw.

> So next comes the s/w. The F84 seems to be running OK, it oscillates
> and I've tried 3 with the same result. In the menu of supported devices
> the SX18 isn't shown, but as the programming socket for the SX18 and
> SX28 are paralleled I presume that the algorithm for the SX28 works for
> the SX18 ?

Try to use the dos sw: fluffy -com1 -test, and follow the instructions.

>
> And then there are the settings in IC-PROG. The I/O delay is set to 4 for
> my 800MHz PC. I've tried other settings. Do any of the signal inversions
> need to be set ?

I have a p3-600 and working well.

udv
Csaba

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2002\10\19@023424 by James Newton, webhost

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\10\18\200130a

There is a design contest at sxlist.com where you can win a VERY nice ICD
like programmer/debugger if you enter an SX based project with code that is
ready to debug.
http://www.sxlist.com/contest/starter

I personally use the SX-KEY from Parallax and have used the Kanda unit and
the SX-DEV. The SX-KEY and SX-DEV are right up there together. I have never
programmed a chip with a home built programmer, but I am planning to try the
members.rotfl.com/dturner/#Scenix%203Chip%20and%20Resources
super simple unit from the 3chip crew "real soon now"

There is a good list of SX programmers at
http://www.sxlist.com/devprogs.htm

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'[SX]: SX Support'
2002\10\19@162922 by Royce Simmons

picon face
Hello,

Would someone send me the URL for the SX support info,  such as assembler
and information on the chips?

Thanks,  Royce

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'[SX]: SX programmer'
2002\10\19@211357 by Jinx

face picon face
> Try to use the dos sw: fluffy -com1 -test, and follow the instructions.
>

I'm tantalisingly close with the command line

fluffy demo.hex -com1 -115k -fuse 408 -fusex 07c -chip sx1828new

or

fluffy demo.hex -com1 -115k -fuse 408 -fusex 07c -chip sx1828old

==============================

using serial uart at 3f8
resetting target... ok

chip    : SX1828NEW
port    : serial   [COM1]

initialising SX chip...ok
reading configuration...

current device config:
 Device         : [fff]
 Fusex          : [fff]
 Fuse           : [fff]

erasing... done
writing fusex [07c]...ok
writing fuse  [408].....write error
fatal error

=====================================================

It always fails with Fuse - any ideas why ????

If my maths is OK I think the Fuse parameter is correct

__FUSE      equ     _FUSEBASE ^ (_TURBO | _OPTIONX | _STACKX | _IRC_4MHZ)

__FUSEX    equ     _FUSEXBASE ^ (_8BANKS | _1PAGE)

; ^ = XOR  | = IOR

; _FUSEBASE  F08 ^ (800 | 200 | 100 | 000) = F08 ^ B00 = 408

; _FUSEXBASE 070 ^ (00C | 000) = 07C

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'[SX]: SX Support'
2002\10\19@220406 by James Newton, webhost

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\10\19\162922a

Ubicom SX chips are supported by forums at Ubicom and Parallax and by this
list (to some small degree) but the bulk of the information about actually
using the chips is at
http://www.sxlist.com

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'[SX]: SX programmer'
2002\10\20@021103 by Also-Antal Csaba

flavicon
face
Jinx wrote:
>
> > Try to use the dos sw: fluffy -com1 -test, and follow the instructions.
> >
>
> I'm tantalisingly close with the command line

Maybe the sx chip is damaged?

udv
Csaba

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2002\10\20@032443 by Jinx

face picon face
> Maybe the sx chip is damaged?

I've tried 3 straight out of the tube, same result. Very frustrating

> udv

^^^^^^^^^

What is udv ?

> Csaba

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2002\10\20@053155 by Also-Antal Csaba

flavicon
face
Jinx wrote:
>
> > Maybe the sx chip is damaged?
>
> I've tried 3 straight out of the tube, same result. Very frustrating
>
> > udv
>
> ^^^^^^^^^
>
> What is udv ?

Sort form of "udvozlet" hungarian word, in english ~greeting.

udv
Csaba

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2002\10\20@140659 by stanton54

picon face
You don't have to specify the fuse and fusex words on the command line,
they are part of the .hex file. (Those are the correct settings).
It is definitely getting into programming mode, it is quite good at
checking things. However I noticed that the hard-wired read-only DEVICE
word is showing FFF. It should always be FCE, FDE, or FEE. Also, it
thinks it's programming FUSEX but it's still just FFF.
Did you try the tests on the website (and take out the 100 ohm resistor
when you were finished?) I would be especially suspicious of the
programming voltage.
Also try changing the IRCTRIM bits - right now the oscillator is
trimmed to the minimum frequency, maybe that's confusing it. It is used
during programming.
The PINS bit is set to 18/20 pins, if you have an SX28 you'll need to
change it.
One last thing: the cable is very important with these programmers,
mine is < 6 inches long. Try using the low-speed interface - take out
the "-115k", and also do something to the PIC, I forget what...


Jinx wrote:
{Quote hidden}

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2002\10\20@194221 by Jinx

face picon face
> You don't have to specify the fuse and fusex words on the command
> line they are part of the .hex file. (Those are the correct settings)

I left them in the command line, although I realise you put them in
if you want to over-write those in the hex file

>  It is definitely getting into programming mode, it is quite good at
> checking things. However I noticed that the hard-wired read-only DEVICE
> word is showing FFF. It should always be FCE, FDE, or FEE. Also, it
> thinks it's programming FUSEX but it's still just FFF.

>  Did you try the tests on the website (and take out the 100 ohm resistor
> when you were finished?) I would be especially suspicious of the
> programming voltage.

Yes, I ran the h/w test and have checked the PCB visually and with
a meter. Vpp is 13.4V, Vcc is 5.0V

>  Also try changing the IRCTRIM bits - right now the oscillator is
> trimmed to the minimum frequency, maybe that's confusing it. It is used
> during programming.

You're using ICSXprog.asm in the PIC ? I can see a variable ICTR but
not IRCTRIM. Am I looking in the right program ?

>  One last thing: the cable is very important with these programmers,
> mine is < 6 inches long. Try using the low-speed interface - take out
> the "-115k", and also do something to the PIC, I forget what...

Changed to 38k4 - no difference. The cable is the 2m Picstart+ and I've
also tried a shorter 2-wire with the same result. The documentation says
that 38k4 should only be necessary for > 5m cables

Much as I hate to, I'll probably be picking up an SX Blitz. I could be
tinkering around with the Fluffy all week and still not get a result, which
is simply uneconomic and just another unwelcome hassle. One day I'd
like to see it running, but probably as a back-up or giveaway

One thing that puzzles me is that the web pages say Fluffy2 will work
with IC-PROG, yet list experiences suggest it's a no-goer. That kind
of yes-it-will-no-it-won't doesn't inspire confidence, and that's nudged
me towards a commercial product

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2002\10\20@202204 by stanton54

picon face
> >  Also try changing the IRCTRIM bits - right now the oscillator is
> > trimmed to the minimum frequency, maybe that's confusing it. It is used
> > during programming.
>
> You're using ICSXprog.asm in the PIC ? I can see a variable ICTR but
> not IRCTRIM. Am I looking in the right program ?
>

IRCTRIM is bits 11, 9, and 8 of the SX's FUSEX. 000 is the minimum
frequency
and 111 is the maximum. Each step is 3% so it's probably off quite a
bit.
The device depends on the internal RC oscillator to provide the 128 KHz
clock used during programming.
Try setting FUSEX to 37C or even B7C.

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2002\10\20@215108 by Jinx

face picon face
> The device depends on the internal RC oscillator to provide the
> 128 KHz clock used during programming.

> Try setting FUSEX to 37C or even B7C.

OK, thanks, done that. Still chokes on Fuse. Fusex is reported to have
programmed with 07c, 37c or b7c

I'm sure it's going to be something simple that will become
apparent in the fullness of time. Just for now I can't see WTF
is wrong, and I have to move on

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'[SX]: caller ID chips'
2002\10\23@131328 by James Newton, webhost

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\10\22\145932a

Caller ID has been done with the Ubicom SX PIC clone:

www.sxlist.com/images/com/ubicom/www/http/pdf_files/e2/an14.pdf
www.sxlist.com/images/com/ubicom/www/http/source_files/e2/call_id_dem
od.src


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'[SX] Newbie is stumped, SXKEY - "Programming Fail'
2002\11\02@164354 by Brad Woods
picon face
So I got my SXKey in the mail two days ago, rigged my breadboard, got some sample code to assemble properly. But no matter what I do SXKey always produces the error "Programming Failed", two days and no progress. I know I'm communicating with the chip and all that, it just won't take, I've read every bit of text I can get my hands on and nothing helps.

Any direction or assistance would be greatly appreciated. Here is the sample code...

device SX28
device turbo,stackx_optionx
reset start_point
org 0
start_point mov !rb,#0 ; make all of port b outputs
mov rb,#0 ; make all port b outputs = 0
sleep ; go to sleep

Sincerely,
Brad Woods

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2002\11\02@211655 by James Newton, webhost

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\11\02\164354a

Brad Woods said "So I got my SXKey in the mail two days ago, rigged my
breadboard, got some sample code to assemble properly. But no matter what I
do SXKey always produces the error "Programming Failed", two days and no
progress. "

Parallax support would be a better place to ask, but here is a quick
checklist, just in case it helps:
- is there actually 5v at the SX Vcc and is that connected to the SXKey Vcc
connection?
- is the Ground connected (SX and Key) and reading 0v with respect to
ground?
- are OSC1 and 2 connected correctly? I had them swapped for a good long
time one day.
- is NOTHING else connected to OSC1 and 2? No resonator or crystal or RC....
nothing.
- are the OSC1 and 2 leads short? i.e. less than an inch?
- is the chip hot? Check all the other pins and then replace the chip.
- is the SXKey hot?

After checking all that, try another SX chip, then call Parallax on the
phone (they give really good support).

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2002\11\03@123906 by Brad Woods

picon face
Success! I Changed 2 things. I shortened my lead wires to 1 inch and
scavenged a power supply that puts out just over 5v, the one I was using was
only putting out about 4.9.

I guess I better put a bench power supply on my Christmas wish list.

Thanks,
Brad


{Original Message removed}


'[SX]: What do I need?'
2002\12\02@115613 by Bob Ammerman
picon face
Believe it or not I am thinking of developing a project on an SX48. I have a
need for multiple UARTs at high baud rates, and you just can't do that on a
PIC. The only dual UART PICs are high pin count monsters, and that isn't
very appealing either. PICs, of course, don't have the speed to do it by
bit-banging, but the SX certainly does.

So, just what do I need to:

1: Do in-circuit programming
2: Do in-circuit debugging
3: Develop in assembly language

Finally,

are there any assembler choices that would allow me to use mChip style
assembly mnemonics to develop for the SX?

Bob Ammerman
RAm Systems

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2002\12\02@120239 by mark

flavicon
face
Have you looked at ATMEL as a lower cost and higher speed alternative?

On 2 Dec 2002 at 11:50, Bob Ammerman wrote:

{Quote hidden}

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2002\12\02@121902 by Mike Harrison

flavicon
face
On Mon, 2 Dec 2002 11:50:06 -0500, you wrote:

>Believe it or not I am thinking of developing a project on an SX48. I have a
>need for multiple UARTs at high baud rates, and you just can't do that on a
>PIC. The only dual UART PICs are high pin count monsters, and that isn't
>very appealing either. PICs, of course, don't have the speed to do it by
>bit-banging, but the SX certainly does.

How many channels and how fast ?
{Quote hidden}

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2002\12\02@160323 by pearl62

picon face
Hi Bob,

How many channels do you need? Any limitations on clock frequency? What type
of UARTS (with or without handshake, buffers, etc.)?

Cheers,
Stephen

{Original Message removed}

2002\12\02@161633 by Jinx

face picon face
> So, just what do I need to:
>
> 1: Do in-circuit programming
> 2: Do in-circuit debugging
> 3: Develop in assembly language

Try SX-Key. SX-Blitz is the programmer-only version

http://www.parallaxinc.com/html_files/sxtech/sxtech_home.htm

http://www.sxlist.com/techref/parallax/sxkey.htm

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2002\12\02@163042 by Wouter van Ooijen

face picon face
> are there any assembler choices that would allow me to use mChip style
> assembly mnemonics to develop for the SX?

In-line assembly in Jal uses uChip menmonics but targets (also) the
SX18, 28. I have not checked the 48, I'm not sure how different it is.

Note that the SX-es are 12-bit core clones with a few extensions. With a
few macros for the extensions and some tweak for the fuses (or set the
in the prog software) you can just use MPASM, but I don't recall whether
the SXbliz/SXkey software could read u uChip hex file.

Wouter van Ooijen

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2002\12\02@163657 by pearl62

picon face
The SXKey software can read the hex output from MPASM, but you'll have to
manually configure the device features before programming.


{Original Message removed}

2002\12\02@174212 by Mike Singer

picon face
Bob Ammerman wrote:
> Believe it or not I am thinking of developing a project
> on an SX48. I have a need for multiple UARTs at high
> baud rates, and you just can't do that on a PIC. The
> only dual UART PICs are high pin count monsters,
> and that isn't very appealing either. PICs, of course,
> don't have the speed to do it by bit-banging, but the
> SX certainly does...

  May be I'm missing something, but I can't understand
are SX48 REALY much faster then 18FXXXX ?
  18FXXXX have more efficient code, so they are not
4 times slower.

  Mike.

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2002\12\02@180232 by Jinx

face picon face
>    May be I'm missing something, but I can't understand
> are SX48 REALY much faster then 18FXXXX ?
>    18FXXXX have more efficient code, so they are not
> 4 times slower.

10MIPS vs 50 or 75MIPS is a big gap to close in s/w

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2002\12\02@200434 by pearl62

picon face
There's no way an 18Fxxxx can access IO at the speeds of an SX.

----- Original Message -----
From: "Mike Singer" <msingerTakeThisOuTspamKILLspamPOLUOSTROV.NET>
To: <PICLISTspamBeGonespamspamMITVMA.MIT.EDU>
Sent: Monday, December 02, 2002 1:44 PM
Subject: Re: [SX]: What do I need?


{Quote hidden}

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2002\12\02@222629 by Bob Ammerman

picon face
> Bob Ammerman wrote:
> > Believe it or not I am thinking of developing a project
> > on an SX48. I have a need for multiple UARTs at high
> > baud rates, and you just can't do that on a PIC. The
> > only dual UART PICs are high pin count monsters,
> > and that isn't very appealing either. PICs, of course,
> > don't have the speed to do it by bit-banging, but the
> > SX certainly does...
>
>    May be I'm missing something, but I can't understand
> are SX48 REALY much faster then 18FXXXX ?
>    18FXXXX have more efficient code, so they are not
> 4 times slower.
>
>    Mike.

SX48 = 50 to 75 MIPS
18FXXX = 10MIPS (or less depending on the value of XXX)

This is a 5x to 7.5x (or higher) difference.

For the low-level stuff I need to do, the 18F's coding advantages are just
not very significant.
Call it perhaps 1.2 vs. the SX

So...

Net is 5x/1.2 = 4.167 to 7.5x/1.2 = 6.25

Bob Ammerman
RAm Systems

----- Original Message -----
From: "Mike Singer" <spam_OUTmsingerEraseMEspam.....POLUOSTROV.NET>
To: <EraseMEPICLISTKILLspamspamspamMITVMA.MIT.EDU>
Sent: Monday, December 02, 2002 4:44 PM
Subject: Re: [SX]: What do I need?

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2002\12\02@223318 by Bob Ammerman

picon face
Actually, I already have code for up to 8 bit-banged UARTS (I published the
receiver half of it on the piclist.com). This interrupt-driver code works by
doing 'vertical' operations on all 8 UARTS at once.

I can currently get 9600 baud on a 20Mhz PIC16F chip (5 MIPS), so I feel
this code will let me go up to 115,200 on the SX (up to 75 MIPS).

Bob Ammerman
RAm Systems

{Original Message removed}

2002\12\03@024842 by Wouter van Ooijen

face picon face
>    May be I'm missing something, but I can't understand
> are SX48 REALY much faster then 18FXXXX ?
>    18FXXXX have more efficient code, so they are not
> 4 times slower.

An SX at 75 MHz run 75 (pic-12) MIPS (but 3 cycles for a jump), an 18F
at 10 MHz * 4 runs 10 (pic-16) MIPS. Voor certain tasks (for instance
bit-banging asynch comms) pic-12 and pic-16 don't differ that much.

Wouter van Ooijen

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'[SX]: SX stopwatch'
2002\12\04@035340 by Jinx

face picon face
Can someone with an SX stopwatch contact me off-list if
they're able to time a piece of SX code for me please

No (hardly) any work involved. It just needs plugging in and
executed to count cycles used

TIA

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'[SX]: SX18 internal RAM'
2002\12\06@232957 by Jinx

face picon face
I'm a little confused by the RAM memory map of the SX18.

The map shows that $08 to $0F are available as global RAM.
Then there are 8 banks of 16 RAM, with addresses  $10-$1F,
$20-$2F and so on

The program I'm writing now uses 27 variables, and two blocks
of 9 variables each of those 27 would be most efficiently used
via FSR/IND

What would be the best way to organise this ? For example, do
I use an ORG for each Bank, something like

org $10

variable1
to
variable9

org $20

variable10
to
variable18

If true, then does this mean FSR is loaded with the RAM address
in each Bank as you want to access them, similar to the way that
you would with the PIC to, for example, copy RAM from one bank
to another

mov fsr,#$10 to get to variable1 to variable9

mov fsr,#$20 to get to variable10 to variable18

TIA

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2002\12\07@004128 by pearl62

picon face
The RAM bank addresses that you mention are for an SX48 or SX52. The
SX18/20/28 RAM banks are at $30-3F, $50-5F, $70-7F, $90-9F, $B0-BF, $D0-DF
and $F0-FF.

Your method of allocating the variables and using FSR is correct, just use
the addresses above. You could also just use the BANK instruction, like bank
$30.


{Original Message removed}

2002\12\07@012730 by Jinx

face picon face
> The RAM bank addresses that you mention are for an SX48 or
> SX52. The SX18/20/28 RAM banks are at $30-3F, $50-5F,
> $70-7F, $90-9F, $B0-BF, $D0-DF and $F0-FF

The locations I quoted were from the SX-Key Development Manual,
which, now that you've pointed it out and I double-check, I see is just
a simplistic form of the SX18 datasheet. It's actually misleading
because it differs so much from the SX ds

> Your method of allocating the variables and using FSR is correct,
> just use the addresses above. You could also just use the BANK
> instruction, like bank $30

Thanks. My fault for not referring back to the SX manual, although
a piece of example code to illustrate would have been nice

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2002\12\07@015708 by pearl62

picon face
The SX datasheet has short examples of using the FSR and BANK intructions,
and most VP's (available from http://www.sxlist.com) also provide a good example.

Cheers,
Stephen
{Original Message removed}

2002\12\07@020535 by pearl62

picon face
The Parallax manuals were written without any review from Ubicom (Scenix at
the time), and always had some differences to the actual silicon datasheets,
so I would not stand behind the data provided there. It's always best to get
the information from the guys who made the product. Parallax can document
their tools well enough, but you should go to the Ubicom datasheets to get
the info on the chip...

BTW, here's a link to the VP's on the SX-List site...
http://www.sxlist.com/techref/ubicom/virtperf.htm

The 16-bit Timer VP is a simple example written in the standard template
that was used in later VP development
(http://www.sxlist.com/images/sxlist/timer_vp.src). There's alot there for
such a simple function, but the template provides defines for just about
every register in any of the SX's.


{Original Message removed}

2002\12\07@022623 by Jinx

face picon face
> Thanks. My fault for not referring back to the SX manual,
> although a piece of example code to illustrate would have
> been nice

In the manual I meant

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2002\12\07@035849 by Jinx

face picon face
> The SX datasheet has short examples of using the FSR and
> BANK intructions, and most VP's (available from http://www.sxlist.com)
> also provide a good example.

Thanks. I'm just getting the hang of these Virtual Peripherals.
It's a bit of a shock after being so spoiled with micros that have
all kinds of built-in analogue and h/w features to work again
with a plain vanilla device. But it's worth the effort. The current
project is transferring 8-bit data from a PIC to an SX between
the SX motor control pulses. A reliable pick-up in 60ns seems
to be working just fine - it's great having so many cycles to
play with

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2002\12\07@040512 by pearl62

picon face
Yeah, it's pretty amazing what can be done with a really fast clock and some
determinism...

Cheers,
Stephen

{Original Message removed}

'[SX]: Which do I want: SX-KEY or SX-DEV?'
2002\12\09@174411 by Bob Ammerman

picon face
Just  asthe SUBJ: asks.

Or is there something better than either to use.

What are the tradeoffs/advantages/disadvantages.

Bob Ammerman
RAm Systems

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2002\12\09@182734 by pearl62

picon face
SX-Dev is pretty new (relatively speaking), and I have not personally used
it since it was first released. At that time it was pretty buggy so I gave
up on it.

The SX-Key on the otherhand has had some recent developments being done by
Parallax (thanks Peter Montgomery) to freshen up the IDE. That, together
with it's very elegant hardware programmer, makes a pretty good solution.

Nohau also offers a programming/debugging solution, but I would only
recommend that if you needed to use (or have experience with) the Nohau
Seehau environment.

Cheers,
Stephen


{Original Message removed}

2002\12\10@155605 by James Newton

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\12\09\174411a

In a nutshell, SX-DEV: More features / SX-KEY: Larger base of users, more
local company, etc...

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'[SX]: Which do I want: SX-KEY or SX-DEV?Re:[SX]: W'
2002\12\10@161013 by James Newton

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\12\09\174411a

In a nutshell, SX-DEV: More features / SX-KEY: Larger base of users, more local company, etc...

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'[SX]: Simulator?'
2002\12\10@223605 by Bob Ammerman

picon face
Am I right in my conclusion after a bunch of googling and poking around on
SXLIST.COM that there are no simulators available for the SX48/SX52?

Bob Ammerman
RAm Systems

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2002\12\10@232641 by Jinx

face picon face
> Am I right in my conclusion after a bunch of googling and poking around on
> SXLIST.COM that there are no simulators available for the SX48/SX52?
>
> Bob Ammerman
> RAm Systems

SXDev ?

http://www.svtehs.com/sxdevug.pdf

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2002\12\10@233925 by Bob Ammerman

picon face
I am looking for software simulator. Not a hardware emulator.

Bob Ammerman
RAm Systems

----- Original Message -----
From: "Jinx" <KILLspamjoecolquittspamspam_OUTCLEAR.NET.NZ>
To: <@spam@PICLISTEraseMEspamTakeThisOuTMITVMA.MIT.EDU>
Sent: Tuesday, December 10, 2002 11:26 PM
Subject: Re: [SX]: Simulator?


> > Am I right in my conclusion after a bunch of googling and poking around
on
{Quote hidden}

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2002\12\10@235219 by pearl62

picon face
One of the beauties of having real-time in-system debugging is that you
don't need a simulator.

With that said, there are a few simulators available, just in case you don't
want to have to program the chip every time you want to test some code. They
can be found at http://www.sxlist.com/techref/ubicom/simulators.htm.

Stephen
{Original Message removed}

'[SX]: Which do I want: SX-KEY or SX-DEV?'
2002\12\11@022009 by ISO-8859-1?Q?Ruben_J=F6nsson?=

flavicon
face
Also take a lok at how much of the codespace is used up by the debugger. I think the SX Key uses less than SX Dev but on the other hand the SX Dev has more features (so I have been told - I have only used the SX Key).

Regards / Ruben==============================
Ruben Jönsson
AB Liros Electronic
Box 9124, 200 39 Malmö, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
RemoveMErubenTakeThisOuTspampp.sbbs.se
==============================

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'[SX]: Simulator?'
2002\12\11@072108 by Bob Ammerman

picon face
----- Original Message -----
From: "pearl62" <KILLspampearlsixtytwospamspamspam_OUTHOTMAIL.COM>
To: <spamPICLIST.....spamTakeThisOuTMITVMA.MIT.EDU>
Sent: Tuesday, December 10, 2002 11:51 PM
Subject: Re: [SX]: Simulator?


> One of the beauties of having real-time in-system debugging is that you
> don't need a simulator.
>
> With that said, there are a few simulators available, just in case you
don't
> want to have to program the chip every time you want to test some code.
They
> can be found at http://www.sxlist.com/techref/ubicom/simulators.htm.

And none of them do SX48/SX52!

Bob Ammerman
RAm Systems

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2002\12\11@075254 by Michael Rigby-Jones

picon face
> ----- Original Message -----
> From: "pearl62" <STOPspampearlsixtytwospamHOTMAIL.COM>
> To: <EraseMEPICLISTspam_OUTspamMITVMA.MIT.EDU>
> Sent: Tuesday, December 10, 2002 11:51 PM
> Subject: Re: [SX]: Simulator?
>
>
> > One of the beauties of having real-time in-system debugging is that you
> > don't need a simulator.
> >
> > With that said, there are a few simulators available, just in case you
> don't
> > want to have to program the chip every time you want to test some code.
> They
> > can be found at http://www.sxlist.com/techref/ubicom/simulators.htm.
>
> {Original Message removed}

2002\12\11@194505 by James Newton, webhost

face picon face
source= http://www.piclist.com/postbot.asp?id=piclist\2002\12\11\072108a

UMPs from VMDesign.com runs under Windows and simulates many processors and
external hardware. Includeing the SX48/52
http://www.vmdesign.com/html/p02.htm

The price, however, is not.... free.

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'[SX]:Strange program behaviour'
2002\12\13@192926 by Jinx

face picon face
I've a program and circuit here

http://home.clear.net.nz/pages/joecolquitt/PIC2SX.html

that's got me stumped. As a newbie to SX it's possibly because
of something I don't know about them

The problem is that the program will trundle along quite happily
for a definite repeatable time, then stop. The time taken to stop
is shorter the fewer the pulses the SX is asked to put out

It will dependably output > 31,000 pulse/sec for 30+ seconds and
then stop. Or put out  > 3300 pulse/sec for 20 seconds and stop

However, at 62,500 pulse/sec it seems to run indefinitely. I haven't
determined at what pulse rate it does change behaviour, but I'm
not sure that would be helpful information

Any help would be appreciated, especially if it's something to do
with the way the SX is set up. I'm torn between a rogue timer (but
how ? - they're all shut off) or some kind of voltage build up that
eventually latches. The SX and TTL switching/propagation times
are getting quite close, and that may be some part of it. Perhaps
there are special remedial measures I couild take to improve
transition times

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2002\12\13@235340 by stanton54

picon face
I think you have a banking problem. Buff1-Buff8 are globals 08 through
0F which is OK. Then Buff9 is 10.
The line
       mov neg,buff9
means set neg (through W) to byte 0 in whichever bank is selected by the
upper FSR bits - which looks to be bank 0.
But if you set INDF to 10 then FSR is byte 0 of bank 1.
The rest of the variables are semi-directly addressed, so again they are
in bank 0 and inaccessible only semi-directly accessible.

The explanation of INDF and FSR in the 48/52 manual (pages 18 & 19) is a
little bit better, you might want to look at that.

Also, in one spot you set bit 4 of !RA which I think only has 4 bits on
the 18/20/28.

Jinx wrote:
>
> I've a program and circuit here
>
> http://home.clear.net.nz/pages/joecolquitt/PIC2SX.html
>
> that's got me stumped. As a newbie to SX it's possibly because
> of something I don't know about them
>
<snip>

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2002\12\14@004215 by stanton54

picon face
I just noticed something else. Your device word does not include an
oscillator selection. You need to use HS2 or HS3. I don't know what
assembler you are using but SASM doesn't seem to be able to figure it
out from the frequency.

stanton54 wrote:
{Quote hidden}

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2002\12\14@004236 by Jinx

face picon face
----- Original Message -----
From: "stanton54" <spamstanton54.....spam@spam@EARTHLINK.NET>
To: <spam_OUTPICLISTspamspamMITVMA.MIT.EDU>
Sent: Saturday, December 14, 2002 5:50 PM
Subject: Re: [PICLIST] [SX]:Strange program behaviour


{Quote hidden}

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2002\12\14@004243 by Jinx

face picon face
(Sorry for other unedited message - hit Send instead of Reply)

> I think you have a banking problem. Buff1-Buff8 are globals 08
> through 0F which is OK. Then Buff9 is 10

Makes sense, and that's something I'll have another look at.
However, because the program seemingly works for quite a
while in at least some cases, I figured the compiler was sorting
out the RAM and banking. Feasible ?

Can you offer an explanation why the s/w and/or h/w would take
a definite time to fail ? And not fail above a certain pulse rate ?
That's what's got me. If there was such a basic error, then the
program should fail very quickly, possibly on the first iteration

> The line
>  mov neg,buff9
> means set neg (through W) to byte 0 in whichever bank is selected
> by the upper FSR bits - which looks to be bank 0.
> But if you set INDF to 10 then FSR is byte 0 of bank 1

Yes, understood

> Also, in one spot you set bit 4 of !RA which I think only has 4 bits on
> the 18/20/28.

That was a last-minute addition (which of course made no difference)
I just tried setting RTCC explicitly as an input, even though it already is

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2002\12\14@012437 by Jinx

face picon face
> I just noticed something else. Your device word does not include
> an oscillator selection. You need to use HS2 or HS3. I don't know
> what assembler you are using but SASM doesn't seem to be able
> to figure it out from the frequency

I'm using SX-Blitz / SX-Key with this. AFAICT

        device SX18L, turbo,stackx_optionx,bor42
        reset start
        freq 50_000_000

is enough / acceptable for this program. It's apparent looking at
pulse widths on the scope that the SX is indeed running the code
at 50MIPS

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2002\12\14@024805 by pearl62

picon face
While there's nothing glaringly wrong with yo code, there are a few things
that could cause problems, but it is hard to say which one...

Your memory allocation 'should' work, but it is far too simple and will soon
cause problems, if it is not already. Let me explain... The addresses from
$00-0F are global, so should be used sparingly. Those are global registers,
which means they can be directly addressed, and so do not depend on the
current value of the FSR. Assigning these as a buffer is ok, but kinda
wasteful.

The rest of the memory map for the SX is broken up into 8 banks of 16
registers, starting at addresses $10, $30, $50, $70, $90, $B0, $D0 and $F0.
These may seem strange, but in the internal architecture, the registers at
addresses $00-0F are made global by being shadowed accross $20, $40, $60,
$80, $A0, $C0, and $E0.

So, simply incrementing the FSR and then writing the value into the next
register gets you into trouble when you pass FSR = $1F. Or when trying to
write to memory allocated at $20, $40, $60, $80, $A0, $C0, or $E0. With FSR
= $20, writing to INDF puts the value into $00, which is strange as this is
the address of INDF itself! I'm not sure what would happen in this case.
Writing to $21 (really $01) will just write to the RTCC, and writing to $22
(really $02) writes to the PC, which is effectively the same as doing a JMP.
At this point you will have jumped to an address in memory being the value
you were intending to buffer!

You are currently only allocating up to $1E by my count, so you should still
be ok, however, you should be mindful of how you are allocating your
resources.

Here some macros I have used in the SX-Key environment in the past to
properly handle the banks, and increment or decrement pointers to buffers
properly to span banks.


;***************************************************************************
******
; Macro: _bank
; Sets the bank appropriately for all revisions of SX.
;
; This is required since the bank instruction has only a 3-bit operand, it
cannot
; be used to access all 16 banks of the SX48/52. For this reason FSR.4 (for
SX48/52BD/ES)
; or FSR.7 (SX48/52bd production release) needs to be set appropriately,
depending
; on the bank address being accessed. This macro fixes this.
;
; So, instead of using the bank instruction to switch between banks, use
_bank instead.
;
;***************************************************************************
******
_bank macro 1
bank \1

IFDEF SX48_52
  IFDEF SX48_52_ES
    IF \1 & %00010000  ;SX48BD/ES and SX52BD/ES (engineering sample) bank
instruction
 setb fsr.4  ;modifies FSR bits 5,6 and 7. FSR.4 needs to be set by
software.
    ENDIF
  ELSE
    IF \1 & %10000000  ;SX48BD and SX52BD (production release) bank
instruction
 setb fsr.7  ;modifies FSR bits 4,5 and 6. FSR.7 needs to be set by
software.
    ELSE
 clrb fsr.7
    ENDIF
  ENDIF
ENDIF
endm


;***************************************************************************
**************
; INCP/DECP macros for incrementing/decrementing pointers to RAM
;***************************************************************************
**************
INCP macro 1
 inc \1
IFNDEF SX48_52
 setb \1.4  ; If SX18 or SX28, keep bit 4 of the pointer = 1
ENDIF    ; to jump from $1f to $30, etc.
endm

DECP macro 1
IFDEF SX48_52
 dec \1
ELSE
 clrb \1.4  ; If SX18 or SX28, forces rollover to next bank
 dec \1  ; if it rolls over.  (Skips banks with bit 4 = 0)
 setb \1.4  ; Eg:  $30 --> $20 --> $1f --> $1f
ENDIF    ; AND: $31 --> $21 --> $20 --> $30
endm



Then functions like bufferInit, bufferPush and bufferPop shown below were
used...

;---------------------------------------------------------------------------
---
;VP: 62-byte buffer
; Subroutine:  Initialize the buffer.
; INPUTS:  None
; OUTPUTS:
;   - buffer[0] = NUL
;   - pushIndex->buffer[0]
;   - popIndex->buffer[0]
; CHANGES: buffer[0], pushIndex, popIndex
;---------------------------------------------------------------------------
---
bufferInit
_bank buffer
mov w,#buffer
mov pushIndex,w  ; set up indexes into the buffer
mov popIndex,w  ; pointers must point to #buffer.
clr buffer + 0  ; clear the first location in the buffer.
retp
;---------------------------------------------------------------------------
---
;VP: 62-byte buffer
; Subroutine:  Store W in buffer[pushIndex++]
; INPUTS:  data to store in W
; OUTPUTS: data stored in buffer[pushIndex++]
; CHANGES: localTemp1,pushIndex,buffer[pushIndex]
;---------------------------------------------------------------------------
---
bufferPush
mov localTemp1,w
_bank buffer
mov fsr,pushIndex
mov indf,localTemp1
_bank buffer
INCP pushIndex  ; Smart-Increment of the pointer to RAM
retp
;---------------------------------------------------------------------------
---
;VP: 62-byte buffer
; Subroutine:  Retrieve data in buffer[popIndex++]
; INPUTS:  popIndex
; OUTPUTS: data stored in buffer[popIndex] in W register
; CHANGES: popIndex
;---------------------------------------------------------------------------
---
bufferPop
_bank buffer
mov fsr,popIndex
mov w,indf
_bank buffer
INCP popIndex  ; Smart-Increment of the pointer to RAM
retp
;---------------------------------------------------------------------------
---


Also...

I notice that you're writing a 1 to RA.5, with the comment "RTCC pulled
low...". RTCC is a dedicated input pin, and has nothing to do with port A,
so setting this does nothing.

The device directives need to specifiy the OSC gain, ie. LP1, LP2, XT1, XT2,
HS1, HS2 or HS3. The SX datasheet explains what these are for. For 50MHz
operation, you will require HS2 or HS3 to operate reliably.

I hope this helps. While I don't see any specific failures (without
debugging the code), there are some standard practices which you are not
using that may haunt you.

{Original Message removed}

2002\12\14@044540 by Jinx

face picon face
> You are currently only allocating up to $1E by my count, so you
> should still be ok, however, you should be mindful of how you are
> allocating your resources

FSR is set to run between 08 and 1E and is reset on every loop
iteration. Which in some cases is over 1000 times before the
program stops for the mystery reason. This seems to be safely
within the bank's RAM limits

For other programs it may be necessary to look at how RAM is
managed, but I feel for the limited RAM this program needs what
is in place is OK. With all due respect to your opinion (and that's
not a politician's "due respect" - appreciate the help you and
Stanston are offering)

> I notice that you're writing a 1 to RA.5, with the comment "RTCC
> pulled low...". RTCC is a dedicated input pin, and has nothing to
> do with port A, so setting this does nothing

As noted in a previous post, sheer desperation to try anything

> The device directives need to specifiy the OSC gain, ie. LP1,
> LP2, XT1, XT2, HS1, HS2 or HS3. The SX datasheet explains
> what these are for. For 50MHz operation, you will require HS2
> or HS3 to operate reliably

It's not shown in the circuit diagram but the SXs are running on an
external 50MHz oscillator module. I believe that OSC settings don't
matter as there's no drive required. If there was a 50MHz crystal
on OSC1 OSC2 instead I'd have to give an OSCXT5 directive

The 50_000_000 directive is for debugging

> I hope this helps. While I don't see any specific failures (without
> debugging the code)

Well, when I find out what's going, that'll make two of us

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2002\12\14@114851 by pearl62

picon face
In regards to the 50MHz drive issue... Even with an external crystal
oscillator, the internal drive still needs to be specified. At 50MHz, you
may not notice a problem, but for reliability it is required, and even the
oscillator manafacturers themselves even recommend having that gain present.
I cannot remember the exact reasons, but at higher frequencies, the chip
would not even run without having HS3 specified. As an example, when we were
testing 100MHz (the only choice you have for an oscillator at these
freqencies is external), HS3 was absolutely required.

Have you tried enabling the watchdog timer? You could then test the PD and
TO bits immediately in the reset vector to see what got you there. In your
loop, you then add the instruction CLR !WDT to keep reseting the watchdog.
If for any reason your code ends up outside of that loop, then you will end
being reset. At least you could try to recover, and that would at least tell
you that the code is jumping into the weeds somewhere.

Cheers,
Stephen
{Original Message removed}

2002\12\14@161253 by Jinx

face picon face
> testing 100MHz (the only choice you have for an oscillator at
> these freqencies is external), HS3 was absolutely required

"Crystal-Max" is ticked in Device panel, which is the highest drive

> Have you tried enabling the watchdog timer? You could then test

> you that the code is jumping into the weeds somewhere.

I noticed last night that the program doesn't actually stop. It just
appears to on the scope. When it's putting out 30,000+ pps the
trace on the scope is quite bright because of the pulse density.
When the program "stops" what actually happens is that the
spacing between the pulses goes from 0.0319ms to 4.756ms.
The pulses themselves remain at 60ns. This wasn't apparent
until I used a digital scope, which showed triggering, so I turned
the brightness right up on the analogue scope and adjusted its
trigger. It's still not a definitive answer though - it's unclear whether
the PIC is generating wonky data or the SX is making its own.
What I hope to do in the next couple of days is upgrade my logic
analyser to at least 50MHz so I can get a better idea of what data
is being presented to the SX. Then I'll have a culprit

Thanks for the SRC file

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'[SX]:DJNZ cycles (sx28/sx52)'
2003\01\02@173357 by sebcath
flavicon
face
Hello,

I would like to know in the SX28 and 52 how much cycle uses
the djnz instruction.
I looked on the SX Instruction set table :
      http://www.sxlist.com/techref/ubicom/inst.htm

and it marked this :

  Instruction        cycles
  DJNZ fr,addr       2 *

but I does not understand what "2*" means.
I think that in reality DJNZ uses 5 cycles on a jump and if not 4.

could somebody give me the values exact ?
I cannot make real test, all that I does is theoretical.
and I would need some to write small a procedure of temporization.

thinks,

Best regards,
Sebastien

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2003\01\02@184658 by pearl62

picon face
DJNZ is a macro for the instructions,

DECSZ fr
JMP addr

So, 2 (1 for DEC, 1 for SKIP) or 4 (1 for DEC, 3 for JMP) cycles .

Cheers,
Stephen
{Original Message removed}

'[sxtech] [EE]: Re: Questions - Wiegand 26 bit?'
2003\01\03@032639 by sxtech

picon face
> What is "Wiegand 26 bit data"?


Never heard of it - but there are 1500+ Google hits.

Seems to be an "industry standard" data transfer protocol for eg card
readers, door locks and the like for the security industry.
26 bit version allows 16 bit data.

1st Google ref gives:

       http://www.xprsec.com/vision_range.html    see below

Spec at

       http://www.keyless.com/PDF/26BitWiegand.pdf


               RM
_______________________________

Wiegand Standalone Controllers
XPR introduces VISION range standalone products with Wiegand bus.

The VISION range products i.e. Master units, by way of "standard interface
concept" are interchangeable with any universally available Master units
with international standard Wiegand 26-bit format.

"Standard Interface concept"
The VISION Master units incorporate the industry standard protocol Wiegand
26-bit and hence support all types of Wiegand readers e.g. HID, EM,
MOTOROLA, DEISTER etc. It supports Wiegand readers independently of the
technology used i.e. keypad, proximity reader, magnetic card reader ...

The VISION Master units offer high reliability and security with flexibility
at a reasonable cost. They are user-friendly, networkable and, because of
their compatibility features, are able to be connected to readers using
other technologies. The MULTIX range multi-protocol readers are easily
connected to the VISION Master units thus enabling total interconnectivity.

The VISION range Master units have the option of selecting 26-bit or 30-bit
Wiegand protocol as desired.

In 26-bit Wiegand format, the user codes can be 0 to 65535.

30-bit Wiegand format increases the security level due to the greater number
of bits and hence increases the length of the codes (0 to 16777215).


The VISION range features:

Wiegand 26-bit protocol (selectable option of 30-bit Wiegand)
Supports all types of Wiegand readers
   e.g. HID, MOTOROLA, EM, DEISTER...
Operates on 12V DC
200 User memory
3 outputs
1 Exit button
Door contact
User codes/tags programmed directly from VISION Master units or using
Wiegand readers

The VISION Range of products includes: WMX, WEX and WVI.



Products


WMX : A standalone keypad, in an ergonomically designed ABS housing, for
single door control and home automation. WMX, with double tamper protection,
is networkable with WIEGAND readers and has 1 relay and 2 transistorised
outputs.

WEX : A robust standalone keypad with backlit keys that can either be
surface or flush mounted. In an aesthetically designed housing, WEX is
available in three colours to match any dicor. It is networkable with
WIEGAND readers and has 2 relays and 1 transistorised output.

WVI : A programmable control unit with 3 relay outputs for a wide variety of
applications. WVI is networkable with WIEGAND readers and programming is
done via the recessed silicone membrane keypad. It is designed to be
installed inside a secure area.


The MULTIX Range readers of different technologies can be networked via the
WIEGAND interface to the VISION range of products i.e. DUO-S, MONO-S, MINI,
INOX and LCS.









XPR Ltd. ) 2002. All Rights Reserved.






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'[SX]: Pin won't turn off properly'
2003\01\30@064232 by Jinx

face picon face
part 1 3502 bytes content-type:text/plain; (decoded 7bit)

I've got a 50MHz SX18AC that's giving me the hump. Attached
are pics of the operation of the following SX code. The Scenix
waits for a handshake (r_ack) from a PIC and signals receipt of
r_ack by triggering a 74HC123 (set to 8us) with s_ack. The PIC
sees this 8us pulse and then carries on to other functions

The top frame is the first 1+ ms after the two micros are told to
start talking. The second frame is a magnification of the problem
area, and the third frame is how the sequence should be (and is
with the extra clrb)

The problem is that s_ack will not clear unless it is told to twice.
I've tried more NOPs, delays of ridiculous length (this is meant
to be a high speed transfer routine), but only an extra clrb will
do it. I've noticed this happen on another output pin that has
just a 10k pulldown connected, and it happens on other SX18s.

The circuit has been checked and checked but there's nothing
I can see that should make a_ack go low for just 1 cycle and
then go high again

Any ideas ?

Oh yes, another thing. The SX appears to take about 160ns (8 IC)
to respond to its r_ack pin going high (the yellow trace, frame 2,
sb r_ack = 2 IC) yet I'd have thought this is much too long before
s_ack goes high

;==================================================

        pulse   equ  ra.0     ;show activity
        r_ack   equ  ra.2     ;receive acknowledge
        s_ack   equ  ra.3     ;send acknowledge (via 74HC123)

;==================================================

        org $00

start    mov     ra,#%0000       ;initialise port lines
        mov     rb,#%00000000

        mode    $0c             ;PortB Schmitt Trigger on
        mov     !rb,#%00000000

        mode    $0d             ;PortB as TTL
        mov     !rb,#%11111111

        mode    $0e
        mov     !rb,#%00000000  ;PortB pull-ups on

        mode    $0f             ;Set Mode to Direction configuration

        mov    !ra,#%0100       ;ra.2 as "Data Ready" input

;                     0           74LS123 trigger
;                      1          data ready
;                       0         direction
;                        0        pulse

        mov    !rb,#%11111111   ;i/p to parallel load data

        mov     count,#250      ;init delay
pud      call    delay
        decsz   count
        jmp     pud
        jmp     pbon

;================================================
;        Approx 250us delay
;================================================

del250   mov     cu_hi,#-16

dloop15  mov     cu_lo,#-195

dloop25  incsz   cu_lo
        jmp     dloop25

        incsz   cu_hi
        jmp     dloop15

        ret

;================================================

;start-up synchronisation of PIC and SX
;PIC and SX are both stopped here

pbon     sb      r_ack         ;wait until push button starts PIC
        jmp     $-1           ;and it sends pulse

        setb    s_ack         ;send acknowledge
        nop
        nop
        clrb    s_ack

tend     setb    pulse      ;loop here
        call    del250
        clrb    pulse
        call    del250
        jmp     tend

;SX will not clear s_ack pin unless an extra clrb is used

        setb    s_ack         ;send acknowledge
        nop
        nop
        clrb    s_ack
        nop
        clrb






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part 2 6700 bytes content-type:image/gif; (decode)


part 3 2 bytes
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2003\01\30@091343 by Chris Loiacono

flavicon
face
Have you tried placing a putting a dummy load in place of the '123? and
watching to see if the pin clears properly? I know it would be unusual, but
the input on the '123 may be to blame.

Do you have this line pulled down? Any other h/w on it?

Have you checked this with other HC123's, from different vendors? I vaguely
recall a similar situation with a part in the same family - Philips, I
believe. The problem went away with a part from a different maker. I believe
at one point Philips discontinued their 74HC123....


> The problem is that s_ack will not clear unless it is told to twice.
> I've tried more NOPs, delays of ridiculous length (this is meant
> to be a high speed transfer routine), but only an extra clrb will
> do it. I've noticed this happen on another output pin that has
> just a 10k pulldown connected, and it happens on other SX18s.

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2003\01\30@155449 by Jinx

face picon face
> Have you tried placing a putting a dummy load in place of the '123?

Yes. It doesn't matter what is attached (or not) to the pin, it
does the same thing. I'm wondering if there's some kind of
reflection going on, yet a.0 drives 60ns pulses into a 30cm
wire going to a level-shifting buffer with no problems at all

BTW the last lines of the original post should have been

        setb    s_ack         ;send acknowledge
        nop
        nop
        clrb    s_ack
        nop
        clrb    s_ack

The final s_ack got mislaid in the c&p.

What is interesting (I'll use "interesting" because I'm bored
with expletives) is that with or without the second clrb, the pin
does go low when required, but the second clrb seems to
reinforce the first, and the pulse is the correct length, ie does
not go L-H-L-H-L, but L-H-L. In the original pulse wave, the 1
cycle low before going high again is a real worry because
there's no code possible to make this pattern

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2003\01\30@220550 by Jinx

face picon face
Here's where I'm up to after some testing

To recap -

setb   ra.0
nop
clrb    ra.0

As described yesterday, ra.0 will go high, then low for 1 cycle,
then back to high, even though it's not been told to (by my s/w
anyway)

Adding

nop
clrb  ra.0

will make ra.0 do the pulse as it's meant to

Now I find this is repeatable on any ra pin, and tried that out
on 3 different SX batches (new date, AA, AB or AC). It matters
not a jot what is connected to the pin. And, furthermore, it doesn't
even have to be a clrb instruction to the same pin. Any pin
activity causes a proper clear. For example

setb   ra.0
nop
clrb     ra.0
nop
setb    ra.1

or even

setb    ra.0
nop
clrb     ra.0
nop
clrb     rb.0

PortB doesn't seem to suffer from the mysterious Phoenix-like
behaviour. Small comfort in this app because rb is used as an
8-bit wide input buss

I've d/led the latest SX18 manual - not a mention, so unless anyone
here has a clue I'll have to drop a line to Scenix. Although after their
last attempt to answer to a query I might as well ask the freakin' cat

Now that I'm aware of the nature and extent of the problem there
are some work-arounds I could try, but it'll be a thorough PITA
with the code timing so tight

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2003\01\31@024818 by Stephen

picon face
I still think you are seeing a read-modify-write issue. Have you tried 2
nops between the setb and clrb? It's possible that port a has some
slightly longer propogation delays that may explain it's different
results from other ports.

Also, what type load is being driven? I high capacitive load (long
traces?) could explain this behaviour.

The PORTRD bit was added in the SX48/52 to help combat this behaviour.
It enables the port latch to be read instead of the pin (as on the
SX18/20/28), so getting around the problem of a slow ramp on an output
pin.

{Original Message removed}

2003\01\31@033316 by Jinx

face picon face
> I still think you are seeing a read-modify-write issue. Have
> you tried 2 nops between the setb and clrb?

(Thanks for the reply)

Yes, as noted in the OP. Also tried 1000 - no change. The only
thing that works is in the post you replied to. Sometime over the
weekend I'll make a couple of PCBs with different layouts and
also see if the problem exists at frequencies other than 50MHz.
I have to get to the bottom of this before I can move on to other
code

> It's possible that port a has some slightly longer propogation
> delays that may explain it's different results from other ports

I can't comment as I don't see that parameter in the data.However,
the phenomenon still doesn't make sense to me. It's <spock> highly
illogical </spock>

> Also, what type load is being driven? I high capacitive load (long
> traces?) could explain this behaviour.

2" PCB traces (32mil) to a header connector. Either a 5mA resistive
load, no load or CMOS gate inputs. Any SX o/p pin is rated to drive
45mA, so I don't think that's the problem

> The PORTRD bit was added in the SX48/52 to help combat this
> behaviour

I'm not even sure what behaviour this is

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2003\01\31@075613 by Mr MCU

flavicon
face
Hi Jinx,

I have done similar applications with a SX28 without any problems.  Using it
to R/W on a Z80 buss.  Although not with PortA; however I have used PortA
with other high freq apps.  Always with the SX28 ... size is generally not a
problem in our products ...

Is the SX decoupled, (eg .1mf or tant cap right at the SX's power pins)?
The only other thing I can think of is to hack wire up a SX28.  I don't
believe that lead length, capacitance / inductance of the trace or any of
that other stuff is the problem.  Assuming that the SX18 is decoupled,  I
think the problem may be in the '18.

- Mike



Jinx wrote:

{Quote hidden}

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'[SX]: Pin won't turn off properly'
2003\02\02@131809 by John Ely
flavicon
face
I too have had timing problems with the Philips 74HC123 parts.  The
Philips part produced a significantly shorter pulse than Fairchild's
part.  We use the part for a long pulse (30 seconds or so) and by
using much larger capacitors could still only get to about 26 seconds.

I don't know if this will affect your application, but I can verify the
Philips' part is different.

Regards,

John


{Quote hidden}

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2003\02\02@133417 by Brian Aase

picon face
> I too have had timing problems with the Philips 74HC123 parts.  The
> Philips part produced a significantly shorter pulse than Fairchild's
> part.  We use the part for a long pulse (30 seconds or so) and by
> using much larger capacitors could still only get to about 26 seconds.

IIRC, several manufacturers include a cautionary statement in their
data sheets, to the effect that 74xx123 parts are not sutiable for
delays > 1 second.

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2003\02\02@160904 by Jinx

face picon face
> > I too have had timing problems with the Philips 74HC123

> IIRC, several manufacturers include a cautionary statement
> in their data sheets, to the effect that 74xx123 parts are not
> sutiable for delays > 1 second.

I'm using a Nat Semi 123. Components were calculated for 8us
and by golly that's what I got. The actual pulse length is largely
irrelephant as it needs to be there just long enough for the PIC
to see it

If you want fun with CMOS try different brands of 4046

I did plan to do all sorts of SX tests over the weekend but time
got gobbled up by other things. Came across a tube of the old
SX18 and will try those too. So far it looks like it's internal to the
SX (hope not, that scuppers a fair bit of timing s/w)

What's potentially depressing is that the project is just a proof-
of-concept prototype. After all the h/w s/w problems are sorted
out (and it all has to be working 100%), it might not even be
useable. But that's what learning curves are all about

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2003\02\02@163716 by Peter L. Peres

picon face
On Mon, 3 Feb 2003, Jinx wrote:

*>If you want fun with CMOS try different brands of 4046

4047 ?

Peter

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'[PIC]: [SX]: cheap SX 50MHz chip??'
2003\02\05@100706 by Roman Black

flavicon
face
Does anyone know of a Scenix/Ubicom chip good for
the high speeds but similar priced to a 12c509 or
16c505, ie a dollar or under? Number of pins and
peripherals not too important. :o)
-Roman

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