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Thread: what does bit SSPSTAT<7> do ?
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face BY : Stef Mientki email (remove spam text)




>What device are you refering to? There are some differences between PIC's.  
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>Using the 16F877 datasheet for example, the SMP bit controls wether or not slew rate limiting is applied in high speed (400KHz) mode.  If you refer to the "I2C Bus Data Requirements" under the Electrical Characteristics section, you will see "SDA and SCL Rise time" and "SDA and SCL Fall time".  For each parameter, a separate figure is given for 100KHz and 400KHz (high speed mode).  If you use the MSSP in high speed mode but with slew rate limiting disabled, you would (I think) get the same rise/fall times as the 100KHz mode.
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>The I2C/SMBus input threshold levels are controlled by the CKE bit and have nothing to do with slew rate.
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That's the clue  !!
Thanks very much  !!

Stef

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<43172713.6000500@mailbox.kun.nl> 7bit

In reply to: <23075D38FE1C8144847DFAECA3565F2704E54FB6@pai-smx-01.europe.bkhm.net>
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