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Intel Pentium Pro CPU

Picture of the die

History
The Pentium Pro was introduced in November 1995 as Intel's 6th generation x86 design -- code-named the "P6." The Pentium Pro offered some minor programming enhancements, four more address lines, and a large 2nd-level cache. By this time, the entire "secret" programming features of the Pentium had been revealed (mostly at the Intel Secrets Web Site: http://www.x86.org). Therefore, Intel abandoned their attempts at keeping most of their new P6 programming features as a secret. By adding four more address lines, the Pentium Pro could address up to 64 GB of main memory. The addition of the 2nd-level cache gave the Pentium Pro a nice performance boost, but was very expensive to manufacture.
Intel continued their attempts at closing the architecture to the exclusion and elimination of their competition. Intel managed to gain patent protection for some pins on the Pentium Pro socket; thus making this chip very difficult to clone without substantial legal liability. However, Intel wasn't paranoid enough. Intel introduced the Pentium II under the guise that the Pentium Pro could never achieve their performance goals. Intel alleged that the Pentium Pro 2nd-level cache could never run faster than 200 MHz, and therefore they must discontinue the development of this product line. The Pentium II abandoned the socket approach to microprocessors, and introduced the "slot" concept. The slot-1 of the Pentium II was further enshrouded in patent protection, thereby further raising the bar to the cost of competition. Now that the Pentium Pro is dead (along with the possibility that their competition will clone this product), Intel has ironically announced a 400 MHz Pentium II with a full-speed 2nd-level cache.
Regardless of Intel's continued monopolistic business practices, the P6 product line has diversified and flourished. The Pentium II added MMX enhancements and a variety of 2nd-level cache options. Intel has created the Celeron brand to compete in the sub-$1000 market. The Xeon was introduced to compete in the server market with a 100 MHz system bus. As time goes on, Intel will continue to diversify the P6 family product line, most likely with a 200 MHz system bus.
Intel's competitors have gone in a different direction than Intel. Intel's competitors have stayed with a Pentium-compatible pin-out. AMD has continued to develop the K6 processor and added MMX enhancements. Cyrix has added MMX enhancements to the MII product line. Centaur products always contained MMX enhancements. These three companies combined their abilities to create a common set MMX-3D instruction set extensions. All three companies have announced plans to create a 100 MHz system bus and an integrated 2nd-level cache (though Intel-fellow Fred Pollack has said publicly that the 2nd-level cache integration is electronically impossible).

See also:


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