[Menu]>[Electronic circuit beans collection]>[PLL synthesizing oscillator (3)]
14 Bit Binary Counter And Oscillator (4060B)
Make the circuit this time oscillate 4.096 MHz and it is using the output of the 12th bit (1/4096=1KHz) of the binary counter.
Phase Locked Loop(4046B)
There are two kinds of phase comparators. As for the 1st, it outputs the phase difference of the input signal (the reference frequency and the comparison frequency) simply as the pulse duration (The output 1). As for the 2nd, it outputs the phase difference of the input signal at the pulse duration and in the polarity (The output 2).
The circuit this time is using the output 2.
The VCO can make oscillate in about 1 MHz. The minimum frequency and the maximum frequency are decided at the value of R4, R5 and C4. Each relational expression is as follows.
Data sheet for 4046B
Programmable BCD Counter (4522B)
The basic operation is as follows.
4522 has the CAS(Cascade feedback) terminal. When this terminal is in the L condition, the "0" output doesn't become H.
Because it is, in the dividing of more than one figure, when connecting the "0" output of the higher rank figure with the CAS terminal of the lower rank, when the subtraction that the higher rank is the number of the specification doesn't complete, "0" of the lower rank figure doesn't become the H condition.
By connecting the Q4 output of the lower rank with the CLOCK terminal of the higher rank, CLOCK of 1/10 is inputted to the higher rank.
This switch has the graduation from 0 to 9 and the switch closes as follows with each position.
The mark shows the terminal which is connected with COMMON.