Design an inverting op-amp circuit that has potentiometers for gain
Assuming that the diode shown in the circuit below exactly follows the
equation with A and mV,
sketch versus over the input range -2 V
to +2 V. Show the scale on both axes.
Figure 8.10: Operational amplifier with diode in feedback.
Using two 1020-type DACs and two op-amps, design a circuit whose
analog output is proportional to the product of two digital numbers.
How many comparators are needed to build an 8-bit flash encoder?
Using a TDC, devise an experiment and show a complete block diagram of
a laboratory system to determine the speed of a bullet.
Consider the bad design of the synchronous counter shown below.
What must the JK inputs of the first flip-flop be connected to
for the circuit to ``count''?
What must the SR inputs be connected to for the flip-flop output
to be well defined?
Determine the truth table and decimal output for the synchronous
Using clocked D-latchs, design a divide-by-4 ripple through
Using clocked JK flip-flops, design a divide-by-4 synchronous
For the synchrnonous divide-by-4 up counter, add appropriate
gating so that it may be made to count down by using a mode control
In block diagram form, draw the simplest circuit that can
multiplex 16 parallel lines, transmit serially and then demultiplex
back into 16 lines.
You should build your multiplexer and demultiplexer using
parallel-to-serial and serial-to-parallel shift registers, and
anything else you think you need.
How may lines between the multiplexer and demultiplexer are needed?
Prepare a comparison table of the three different types of ADCs
presented in class.
Take into account complexity, resolution, accuracy and speed.
An ideal TTL buffer produces an output of either 0 V or 5 V for input
voltages of 0 V and > 0 V respectively.
Using ideal TTL buffers and ideal op-amps, design a 4-bit
digital-to-analog converter that can produce voltages in the range of
0 to 5 V.
A ramp signal generator is a useful device that gives an output
voltage that increases in fixed steps with increasing time.
Design a ramp signal generator circuit using 4-bit binary counters and
an 8-bit DAC.